CM6805(A;B;C)/CM6806(A;B;C) (ABC0401A03A/03C/05A ; ABC0401A06A/01B) 10-PIN Green-Mode PFC/PWM Combo CONTROLLER for High Density AC Adapter

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1 GENERAL DESCRIPTION The CM6805A an CM6806A series are monolithic ICs without software embee, the GreenMoe PFC/PWM Combo controller for High Density AC Aapter For the power supply less than 200Watt, its input current shaping PFC performance coul be very close to the performance of the CM6800 or ML4800 leaing ege moulation average current topology CM6805A/CM6806A offers the use of smaller, lower cost bulk capacitors, reuces power line loaing an stress on the switching FETs, an results in a power supply fully compliant to IEC specifications The CM6805A / CM6806A inclues circuits for the implementation of a leaing ege, input current shaping technique boost type PFC an a trailing ege, PWM The CM6805A s PFC an PWM operate at the same frequency, 675kHz A PFC OVP comparator shuts own the PFC section in the event of a suen ecrease in loa The PFC section also inclues peak current limiting for enhance system reliability Both PFC an PWM have the Green Moe Functions When the loa is below GMth, Green Moe Threshol, PFCOUT is turne off The GMth can be programme by the esigner PWM Green Moe will happen when the PWMCMP (PWM Comparator) Duty Cycle is less than ~ 6%, in the next cycle, the PWMOUT pulse will be remove until PWMCMP Duty Cycle is greater than 6%, then the next cycle, PWMOUT pulse appears PWM has a PWMtrifault pin which can sense the PWM short an etermine the GMth to turn off PFC FEATURES Patent File #5,565,761, #5,747,977, #5,742,151, #5,804,950, #5,798,635 Both PFC an PWM have the Green Moe to meet blue angel an energy star spec 10Pin SOIC package PWM pulse skipping for the green moe Use RAC as the Startup resistor which can be > 2000K or higher at IAC pin It can use the HV bipolar to start up the chip an it helps green moe Easy to configure into Boost Follower Enable lowest BOM for power supply with PFC Internally synchronize PFC an PWM in one IC Patente slew rate enhance voltage error amplifier with avance input current shaping technique Universal Line Input Voltage CCM boost or DCM boost with leaing ege moulation PFC using Input Current Shaping Technique Feeforwar IAC pin to o the automatic slope compensation PFCOVP, VCCOVP, Precision 1V PFC ILIMIT, PFC TriFault Detect comparator to meet UL1950 Low supply currents; startup: 100uA typical, operating current: 2mA typical Synchronize leaing PFC an trailing ege moulation PWM to reuce ripple current in the storage capacitor between the PFC an PWM sections an to reuce switching noise in the system VINOK Comparator to guarantee to enable PWM when PFC reach steay state High efficiency trailingege current moe PWM Exact 50% PWM maximum uty cycle UVLO, REFOK, an brownout protection Digital PFC an PWM soft start, ~10mS Precision PWM 15V current limit for current moe operation PWMtrifault to sense DC to DC short an Turn off PFC at GMth PWMtrifault also can be programme to o the Thermal Protection 2005/12/28 Preliminary Champion Microelectronic Corporation Page 1

2 APPLICATIONS PIN CONFIGURATION AC Aaptor 10 Pin SSOP (R10) Top View Open Frame 1 GND PWM OUT 10 2 IAC PFC OUT 9 3 ISENSE VCC 8 4 VEAO PWMTRIFAULT 7 5 VFB V I 6 PIN DESCRIPTION Pin No Symbol Description 1 GND Groun Operating Voltage Min Typ Max Unit 2 IAC Feeforwar input to o slope compensation an to start up the system During the start up, IAC is connecte to VCC until VCC is greater than 13V 0 1 V 3 I SENSE Current sense input to the PFC current limit comparator 5 07 V 4 VEAO PFC transconuctance voltage error amplifier output 0 6 V 5 V FB PFC transconuctance voltage error amplifier input V 6 V I PWM current limit comparator input 0 15 V 7 PWMTRIFAULT PWMTRIFAULT input; it can sense PWM Short or OVP 0 VCC V 8 VCC Positive supply V 9 PFC OUT PFC river output 0 VCC V 10 PWM OUT PWM river output 0 VCC V 2005/12/28 Preliminary Champion Microelectronic Corporation Page 2

3 ORDERING INFORMATION Part Number Operation Frequency Initial Accuracy (KHz) Temperature Range Package Min Typ Max CM6805IR/GIR* Fpwm = Fpfc = 50Khz to Pin SSOP(R10) CM6805AIR/AGIR* Fpwm = Fpfc = 675Khz to Pin SSOP(R10) CM6805BIR/BGIR* Fpwm = Fpfc = 100Khz to Pin SSOP(R10) CM6805CIR/CGIR* Fpwm = Fpfc = 135Khz to Pin SSOP(R10) CM6806IR/GIR* Fpwm = 2Fpfc = 100Khz to Pin SSOP(R10) CM6806AIR/AGIR* Fpwm = 2Fpfc = 135Khz to Pin SSOP(R10) CM6806BIR/BGIR* Fpwm = 2Fpfc = 200Khz to Pin SSOP(R10) CM6806CIR/CGIR* Fpwm = 2Fpfc = 270Khz to Pin SSOP(R10) Note: 1G : Suffix for Pb Free Prouct 2Initial Accuracy : T A = /12/28 Preliminary Champion Microelectronic Corporation Page 3

4 BLOCK DIAGRAM 2 IAC 4 VEAO ISENSE 3 R1A 1 2 R1B 1 2 IAC 1 R1C 2 UVB VCC PFC CMP 8 VCC VFB 5 GMV V To Ramp S R R Q Q UVB 25V VCC OVP FAULT VREFDK PFCOUT 9 18V 164V UVLO VCC 05V BROKENWIRE PFC OVP PFCCLK PWMCLK PFC CLK PWM CLK fpfc=70khz CM6805 fpwm=675khz CM6806 fpwm=135khz 275V 25V VFB VINOK S Q 25V R1 UVB PFC ILIMIT 075V R2 Q VREFDK 10 1V PWMOUT PWMTRIFAULT 7 VCC07V PWM SHORT GREEMPWM GND PWMFAULT V=17uA GND (VCC14V)/2 GREENMODE PWMCLK 10mS SS 15V PWM CMP GND 1 PROTECTED BY PATENT SOFT START 6 VI ABSOLUTE MAXIMUM RATINGS Absolute Maximum ratings are those values beyon which the evice coul be permanently amage Parameter Min Max Units V CC MAX 20 V IAC (after start up) GND03 10 V I SENSE Voltage 5 07 V PFC OUT GND 03 VCC 03 V PWM OUT GND 03 VCC 03 V VEAO 0 63 V PWMTrifault GND 03 VCC 03 V Voltage on Any Other Pin GND03 VCC 03 V I CC Current (Average) 40 ma Peak PFC OUT Current, Source or Sink 05 A Peak PWM OUT Current, Source or Sink 05 A PFC OUT, PWM OUT Energy Per Cycle 15 µj Junction Temperature 150 Storage Temperature Range Operating Temperature Range Lea Temperature (Solering, 10 sec) 260 Thermal Resistance (θ JA ) 80 /W 2005/12/28 Preliminary Champion Microelectronic Corporation Page 4

5 ELECTRICAL CHARACTERISTICS Unless otherwise state, these specifications apply Vcc=14V, T A =Operating Temperature Range (Note 1) Symbol Parameter Test Conitions Voltage Error Amplifier (g mv ) CM6805A/CM6806A Min Typ Max Input Voltage Range 0 5 V Transconuctance V NONINV = V INV, VEAO = 375V µmho Feeback Reference Voltage V Input Bias Current Note µa Output High Voltage V Output Low Voltage V Sink Current V FB = 3V, VEAO = 6V µa Source Current V FB = 15V, VEAO = 15V µa Open Loop Gain B Power Supply Rejection Ratio 11V < V CC < 165V B IAC Input Impeance ISENSE = 0V, T A = Ohm Input Impeance (CM6806/06A) ISENSE = 0V, T A = K VCC OVP Comparator Threshol Voltage V Hysteresis V PFC OVP Comparator Threshol Voltage V Hysteresis mv PFC I LIMIT Comparator Threshol Voltage V Delay to Output ns V IN OK Comparator Threshol Voltage V Hysteresis V PWM Digital Soft Start Digital Soft Start Timer (Note 2) Right After Start Up 10 ms V I Comparator Threshol Voltage Normal operation without soft start V Delay to Output (Note 2) Ns Threshol Voltage During soft start conition mv PFC TriFault Detect Comparator Fault Detect HIGH V Time to Fault Detect HIGH V FB =V FAULT DETECT LOW to V FB = OPEN, 470pF from V FB to GND Unit 2 4 ms Fault Detect LOW V PWM TriFault Detect Comparator DC to DC Short Sweep PWMtrifault VCC09 VCC01 V DC to DC OVP Sweep PWMtrifault 400mV (VCC14) (VCC1 /2 4)/2 400mV (VCC1 4)/2 V 2005/12/28 Preliminary Champion Microelectronic Corporation Page 5

6 ELECTRICAL CHARACTERISTICS (Conti)Unless otherwise state, these specifications apply Vcc=15V, R T = 523kΩ, C T = 470pF,T A =Operating Temperature Range (Note 1) Symbol Parameter Test Conitions CM6805A/CM6806A Min Typ Max Unit Oscillator Voltage Stability 10V < V CC < 15V 1 % Temperature Stability 2 % Total Variation Line, Temp khz PFC Dea Time (Note 2) us PFC Minimum Duty Cycle I AC =100uA,V FB =255V, I SENSE = 0V 1 % Maximum Duty Cycle I AC =0uA,V FB =20V, I SENSE = 0V % Output Low Rson ohm Output Low Voltage I OUT = 100mA V I OUT = 10mA, V CC = 8V V Output High Rson ohm Output High Voltage I OUT = 100mA, V CC = 15V V Rise/Fall Time (Note 2) C L = 1000pF 50 ns PWM Duty Cycle Range IC % Output Low Rson ohm Output Low Voltage I OUT = 100mA V I OUT = 10mA, V CC = 8V V Output High Rson ohm Output High Voltage I OUT = 100mA, V CC = 15V V Rise/Fall Time (Note 2) C L = 1000pF 50 ns Supply StartUp Current V CC = 11V, C L = ua Operating Current V CC = 15V, C L = ma Unervoltage Lockout Threshol V Unervoltage Lockout Hysteresis V Note 1: Limits are guarantee by 100% testing, sampling, or correlation with worstcase test conitions Note 2: Guarantee by esign, not 100% prouction test 2005/12/28 Preliminary Champion Microelectronic Corporation Page 6

7 TYPICAL PERFORMANCE CHARACTERISTIC Transconuctance (umho) VFB (V) Voltage Error Amplifier (g mv ) Transconuctance 2005/12/28 Preliminary Champion Microelectronic Corporation Page 7

8 Functional Description The CM6805A/CM6806A consists of an ICST (Input Current Shaping Technique), CCM (Continuous Conuction Moe) or DCM (Discontinuous Conuction Moe) boost PFC (Power Factor Correction) front en an a synchronize PWM (Pulse With Moulator) back en The CM6805A /CM6806A is esigne to replace FAN6803 (8 pin SOP package), which is the secon generation of the ML4803 with 8 pin package It is istinguishe from earlier combo controllers by its low count, innovative input current shaping technique, an very low startup an operating currents The PWM section is eicate to peak current moe operation It uses conventional trailingege moulation, while the PFC uses leaingege moulation This patente Leaing Ege/Trailing Ege (LETE) moulation technique helps to minimize ripple current in the PFC DC buss capacitor The main improvements from ML4803 are: 1 A Green Moe Functions for both PFC an PWM 2 Remove the one pin error amplifier an a back the slew rate enhancement gmv, which is using voltage input instea of current input This transconuctance amplifier will increase the transient response 5 to 10 times from the conventional OP 3 VFB PFC OVP comparator 4 PFC TriFault Detect for UL1950 compliance an enhance safety 5 A feeforwar signal from IAC pin is ae to o the automatic slope compensation This increases the signal to noise ratio uring the light loa; therefore, THD is improve at light loa an high input line voltage 6 CM6805A/CM6806A oes not require the blee resistor an it uses the more than 800k ohm resistor between IAC pin an rectifie line voltage to fee the initial current before the chip wakes up 7 VINOK comparator is ae to guarantee PWM cannot turn on until VFB reaches 25V in which PFC boost output is about steay state, typical 380V 8 A 10mS igital PWM soft start circuit is ae 9 10 pin SOP package 10 No internal Zener but with VCCOVP comparator The CM6805A/CM6806A operates both PFC an PWM sections at 67kHz This allows the use of smaller PWM magnetic an output filter components, while minimizing switching losses in the PFC stage Several protection features have been built into the CM6805A/CM6806A These inclue softstart, reunant PFC overvoltage protection, PFC TriFault Detect, VINOK, peak current limiting, uty cycle limiting, unervoltage lockout, reference ok comparator an VCCOVP Detaile Pin Descriptions IAC (Pin 2) Typically, it has a feeforwar resistor, RAC, 800K~5KK ohm resistor connecte between this pin an rectifie line input voltage This pin serves 2 purposes: 1) During the startup conition, it supplies the startup current; therefore, the system oes not requires aitional blee resistor to start up the chip 2) The current of RAC will program the automatic slope compensation for the system This feeforwar signal can increase the signal to noise ratio for the light loa conition or the high input line voltage conition Optional Resistor between IAC an VCC: This resistor is about 100K ohm, it can improve the THD of the input current at high line an light loa ISENSE (Pin 3) This pin ties to a resistor which senses the PFC input current This signal shoul be negative with respect to the IC groun It internally fees the pulsebypulse current limit comparator an the current sense feeback signal The ILIMIT trip level is 1V The ISENSE feeback is internally multiplie by a gain of four an compare against the internal programme ramp to set the PFC uty cycle The intersection of the boost inuctor current ownslope with the internal programming ramp etermines the boost offtime It requires a RC filter between ISENSE an PFC boost sensing resistor VEAO (Pin 4) This is the PFC slew rate enhance transconuctance amplifier output which nees to connecte with a compensation network Groun VFB (Pin 5) Besies this is the PFC slew rate enhance transconuctance input, it also tie to a couple of protection comparators, PFCOVP, an PFC TriFault Detect V I (Pin 6) This pin is tie to the primary sie PWM current sense resistor or transformer It provies the internal pulsebypulse current limit for the PWM stage (which occurs at 15V) an the peak current moe feeback path for the current moe control of the PWM stage Besies current information, the optocouple also goes into V I pin Therefore, it is the SUM Amplifier input Soft Start can be triggere by the following conitions: 1) During the startup (VCC is less than 10V) 2) DC to DC short (PWMtrifault is greater thanvcc07v) 2005/12/28 Preliminary Champion Microelectronic Corporation Page 8

9 PWMtrifault (Pin 7) This pin is to monitor the DC to DC faults PWMtrifault monitors the voltage which is translate by the photocouple output current When the output is short, photocouple an TL431 will not raw any current an PWMtrifault will go towar VCC When PWMtrifault is above VCC07V, the soft start will be triggere an PWMOUT is turne off When the loa is lighter, the TL431 will increase the Photocouple current When PWMtrifault is below (VCC14)/2, which means it is below GMth, Green Moe Threshol PFCOUT will be turne off ue the loa is below GMth The GMth can be programme by the user Typical the GMth is 20% of the full loa VCC (Pin 8) VCC is the power input connection to the IC The VCC startup current is 100uA The noloa ICC current is 2mA VCC quiescent current will inclue both the IC biasing currents an the PFC an PWM output currents Given the operating frequency an the MOSFET gate charge (Qg), average PFC an PWM output currents can be calculate as IOUT = Qg x F The average magnetizing current require for any gate rive transformers must also be inclue The VCC pin is also assume to be proportional to the PFC output voltage Internally it is tie to the VCC OVP comparator (179V) proviing reunant highspee overvoltage protection (OVP) of the PFC stage VCC also ties internally to the UVLO circuitry an VREFOK comparator, enabling the IC at 13V an isabling it at 10V VCC must be bypasse with a high quality ceramic bypass capacitor place as close as possible to the IC Goo bypassing is critical to the proper operation of the CM6805A/CM6806A VCC is typically prouce by an aitional wining off the boost inuctor or PFC Choke, proviing a voltage that is proportional to the PFC output voltage Since the VCC OVP max voltage is 179V, an internal shunt limits VCC overvoltage to an acceptable value An external clamp, such as shown in Figure 1, is esirable but not necessary VCC PFCOUT (Pin 9) an PWM OUT (Pin 10) PFC OUT an PWM OUT are the highcurrent power river capable of irectly riving the gate of a power MOSFET with peak currents up to 1A an 05A Both outputs are actively hel low when VCC is below the UVLO threshol level which is 15V or VREFOK comparator is low Power Factor Correction Power factor correction makes a nonlinear loa look like a resistive loa to the AC line For a resistor, the current rawn from the line is in phase with an proportional to the line voltage, so the power factor is unity (one) A common class of nonlinear loa is the input of most power supplies, which use a brige rectifier an capacitive input filter fe from the line The peakcharging effect, which occurs on the input filter capacitor in these supplies, causes brief highamplitue pulses of current to flow from the power line, rather than a sinusoial current in phase with the line voltage Such supplies present a power factor to the line of less than one (ie they cause significant current harmonics of the power line frequency to appear at their input) If the input current rawn by such a supply (or any other nonlinear loa) can be mae to follow the input voltage in instantaneous amplitue, it will appear resistive to the AC line an a unity power factor will be achieve To hol the input current raw of a evice rawing power from the AC line in phase with an proportional to the input voltage, a way must be foun to prevent that evice from loaing the line except in proportion to the instantaneous line voltage The PFC section of the CM6805A/CM6806A uses a boostmoe DCDC converter to accomplish this The input to the converter is the full wave rectifie AC line voltage No bulk filtering is applie following the brige rectifier, so the input voltage to the boost converter ranges (at twice line frequency) from zero volts to the peak value of the AC input an back to zero By forcing the boost converter to meet two simultaneous conitions, it is possible to ensure that the current raws from the power line matches the instantaneous line voltage One of these conitions is that the output voltage of the boost converter must be set higher than the peak value of the line voltage A commonly use value is 385VFB, to allow for a high line of 270VAC rms The other conition is that the current that the converter is allowe to raw from the line at any given instant must be proportional to the line voltage 1N5250B GND Figure 1 Optional VCC Clamp This limits the maximum VCC that can be applie to the IC while allowing a VCC which is high enough to trip the VCC OVP An RC filter at VCC is require between boost trap wining an VCC 2005/12/28 Preliminary Champion Microelectronic Corporation Page 9

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11 PFC Control: Leaing Ege Moulation with Input Current Shaping Technique (ICST) The only ifferences between the conventional PFC control topology an ICST is: the current loop of the conventional control metho is a close loop metho an it requires a etail unerstaning about the system loop gain to esign With ICST, since the current loop is an open loop, it is very straightforwar to implement it The en result of the any PFC system, the power supply is like a pure resistor at low frequency Therefore, current is in phase with voltage In the conventional control, it forces the input current to follow the input voltage In CM6805A/CM6806A, the chip thinks if a boost converter nees to behave like a low frequency resistor, what the uty cycle shoul be The following equations is CM6805A/CM6806A achieve: V R in e = (1) Iin I l = I in (2) try to Equation 2 means: average boost inuctor current equals to input current V in I l Vout I (3) Therefore, input instantaneous power is about to equal to the output instantaneous power For steay state an for the each phase angle, boost converter DC equation at continuous conuction moe is: V out V in 1 (1 ) = (4) Therefore, equation (6) becomes: I I toff ' = = I I (1 ) T = (7) sw Combine equation (7) an equation (5), an we get: I I I = ( = ' 2 ' ) ' V = R V out e out t T V off R sw e out R e From this simple equation (8), we implement the PFC control section of the CM6805A/CM6806A Leaing/Trailing Moulation Conventional Pulse With Moulation (PWM) techniques employ trailing ege moulation in which the switch will turn ON right after the trailing ege of the system clock The error amplifier output is then compare with the moulating ramp When the moulating ramp reaches the level of the error amplifier output voltage, the switch will be turne OFF When the switch is ON, the inuctor current will ramp up The effective uty cycle of the trailing ege moulation is etermine uring the ON time of the switch Figure 2 shows a typical trailing ege control scheme In case of leaing ege moulation, the switch is turne OFF right at the leaing ege of the system clock When the moulating ramp reaches the level of the error amplifier output voltage, the switch will be turne ON The effective utycycle of the leaing ege moulation is etermine uring OFF time of the switch Figure 3 shows a leaing ege control scheme (8) Rearrange above equations, (1), (2),(3), an (4) in term of Vout an, boost converter uty cycle an we can get average boost ioe current equation (5): I (1 ) = 2 V out R e (5) Also, the average ioe current can be expresse as: I 1 T off = I t t T ( ) 0 (6) sw If the value of the boost inuctor is large enough, we can assume I ( t) ~ I It means uring each cycle or we can say uring the sampling, the ioe current is a constant 2005/12/28 Preliminary Champion Microelectronic Corporation Page 11

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13 One of the avantages of this control technique is that it require only one system clock Switch 1(SW1) turns OFF an switch 2 (SW2) turns ON at the same instant to minimize the momentary noloa perio, thus lowering ripple voltage generate by the switching action With such synchronize switching, the ripple voltage of the first stage is reuce Calculation an evaluation have shown that the 120Hz component of the PFC s output ripple voltage can be reuce by as much as 30% using this metho, substantially reucing issipation in the highvoltage PFC capacitor Typical Applications PFC Section: PFC Voltage Loop Error Amp, VEAO The ML4803 utilizes an one pin voltage error amplifier in the PFC section (VEAO) In the CM6805A/CM6806A, it is using the slew rate enhance transconuctance amplifier, which is the same as error amplifier in the CM6800 The unique transconuctance profile can spee up the conventional transient response by 10 times The internal reference of the VEAO is 25V The input of the VEAO is VFB pin PFC Voltage Loop Compensation The voltageloop banwith must be set to less than 120Hz to limit the amount of line current harmonic istortion A typical crossover frequency is 30Hz The Voltage Loop Gain (S) V = V V OUT EAO 2 OUTDC VFB V * * VOUT V PIN * 25V * VEAO *S*C EAO FB DC *GM V * Z CV Z CV : Compensation Net Work for the Voltage Loop GM v : Transconuctance of VEAO P IN : Average PFC Input Power V OUTDC : PFC Boost Output Voltage; typical esigne value is 380V C DC : PFC Boost Output Capacitor V EAO : This is the necessary change of the VEAO to eliver the esigne average input power The average value is 6V3V=3V since when the input line voltage increases, the elta VEAO will be reuce to eliver the same to the output To over compensate, we choose the elta VEAO is 3V Internal Voltage Ramp The internal ramp current source is programme by way of VEAO pin voltage When VEAO increases the ramp current source is also increase This current source is use to evelop the internal ramp by charging the internal 30pF 12/ 10% capacitor The frequency of the internal programming ramp is set internally to 67kHz Design PFC ISENSE Filtering ISENSE Filter, the RC filter between Rs an ISENSE: There are 2 purposes to a a filter at ISENSE pin: 1) Protection: During start up or inrush current conitions, it will have a large voltage cross Rs, which is the sensing resistor of the PFC boost converter It requires the ISENSE Filter to attenuate the energy 2) Reuce L, the Boost Inuctor: The ISENSE Filter also can reuce the Boost Inuctor value since the ISENSE Filter behaves like an integrator before going ISENSE which is the input of the current error amplifier, IEAO 2005/12/28 Preliminary Champion Microelectronic Corporation Page 13

14 The I SENSE Filter is a RC filter The resistor value of the I SENSE Filter is between 100 ohm an 50 ohm By selecting R FILTER equal to 50 ohm will keep the offset of the IEAO less than 5mV Usually, we esign the pole of I SENSE Filter at fpfc/6, one sixth of the PFC switching frequency Therefore, the boost inuctor can be reuce 6 times without isturbing the stability Therefore, the capacitor of the I SENSE Filter, C FILTER, will be aroun 283nF IAC, R AC, Automatic Slope Compensation, DCM at high line an light loa, an Startup current There are 4 purposes for IAC pin: 1) For the leaing ege moulation, when the uty cycle is less than 50%, it requires the similar slope compensation, as the uty cycle of the trailing ege moulation is greater than 50% In the CM6805A/CM6806A, it is a relatively easy thing to esign Use an more than 800K ohm resistor, R AC to connect IAC pin an the rectifie line voltage It will o the automatic slope compensation If the input boost inuctor is too small, the R AC may nee to be reuce more 2) During the startup perio, Rac also provies the initial startup current, 100uA;therefore, the blee resistor is not neee 3) Since IAC pin with R AC behaves as a feeforwar signal, it also enhances the signal to noise ratio an the THD of the input current 4) It also will try to keep the maximum input power to be constant However, the maximum input power will still go up when the input line voltage goes up Start Up of the system, UVLO, VREFOK an Soft Start During the Startup perio, R AC resistor will provie the start up current~100ua from the rectifie line voltage to IAC pin Insie of CM6805A/CM6806A uring the startup perio, IAC is connecte to VCC until the VCC reaches UVLO voltage which is 15V an internal reference voltage is stable, it will isconnect itself from VCC During the Start up, the soft start function is triggere an the uration of the soft start will last aroun 10mS PFC section wakes up after Start up perio After Start up perio, PFC section will softly start since VEAO is zero before the startup perio Since VEAO is a slew rate enhance transconuctance amplifier (see figure 3), VEAO has a high impeance output like a current source an it will slowly charge the compensation net work which nees to be esigne by using the voltage loop gain equation Before PFC boost output reaches its esign voltage, it is aroun 380V an VFB reaches 25V, PWM section is off PWM section wakes up after PFC reaches steay state PWM section is off all the time before PFC VFB reaches 245V Then internal 10mS igital PWM soft start circuit slowly ramps up the softstart voltage PFC OVP Comparator PFC OVP Comparator sense VFB pin which is the same the voltage loop input The goo thing is the compensation network is connecte to VEAO The PFC OVP function is a relative fast OVP It is not like the conventional error amplifier which is an operational amplifier an it requires a local feeback an it make the OVP action becomes very slow The threshol of the PFC OVP is 25V10% =275V with 250mV hysteresis PFC TriFault Detect Comparator To improve power supply reliability, reuce system component count, an simplify compliance to UL1950 safety stanars, the CM6805A/CM6806A inclues PFC TriFault Detect This feature monitors VFB (Pin 5) for certain PFC fault conitions In case of a feeback path failure, the output of the PFC coul go out of safe operating limits With such a failure, VFB will go outsie of its normal operating area Shoul VFB go too low, too high, or open, PFC TriFault Detect senses the error an terminates the PFC output rive PFC TriFault etect is an entirely internal circuit It requires no external components to serve its protective function VCC OVP an generate VCC For the CM6805A/CM6806A system, if VCC is generate from a source that is proportional to the PFC output voltage an once that source reaches 179V, PFCOUT, PFC river will be off The VCC OVP resets once the VCC ischarges below 164V, PFC output river is enable It serves as reunant PFC OVP function Typically, there is a bootstrap wining off the boost inuctor The VCC OVP comparator senses when this voltage excees 179V, an terminates the PFC output rive Once the VCC rail has ecrease to below 164V the PFC output rive be enable Given that 16V on VCC correspons to 380V on the PFC output, 179V on VCC correspons to an OVP level of 460V It is a necessary to put RC filter between bootstrap wining an VCC For VCC=15V, it is sufficient to rive either a power MOSFET or a IGBT 2005/12/28 Preliminary Champion Microelectronic Corporation Page 14

15 UVLO The UVLO threshol is 13V proviing 3V hysteresis PFCOUT an PWMOUT Both PFCOUT an PWMOUT are CMOS rivers They both have aaptive antishoot through to reuce the switching loss Its pullup is a 30ohm PMOS river an its pullown is a 15ohm NMOS river It can source 05A an sink 1A if the VCC is above 15V PWM Section Green Moe CM6805A/CM6806A has the green moe function to improve the light loa efficiency PWM Green Moe will happen when the PWMCMP (PWM Comparator) Duty Cycle is less than ~ 6%, in the next cycle, the PWMOUT pulse will be remove until PWMCMP Duty Cycle is greater than 6%, then the next cycle, PWMOUT pulse appears In other wors, uring the green moe, PWM switching frequency will reuce to improve the efficiency With the proper external components, CM6805A/CM6806A can easily meet energy star an blue angel specification After 10mS igital soft start, CM6805A/CM6806A s PWM is operating as a typical current moe It requires a seconary feeback, typically, it is configure with CM431, an photo couple Since PWM Section is ifferent from CM6800 family, it nees the emitter of the photo couple to connecte with V I instea of the collector The PWM current information also goes into V I Usually, the PWM current information requires a RC filter before goes into the V I Therefore, V I actually is a summing noe from voltage information which is from photo couple an CM431 an current information which is from one en of PWM sensing resistor an the signal goes through a single pole, RC filter then enter the V I pin This RC filter at DCILMIT also serves several functions: 1) It protects IC 2) It provies level shift for voltage information 3) It filters the switching noise from current information At normal operation, the threshol voltage of the V I pin is 15V When the V I is greater than 15V, PWM output river will turn off the PWM Power MOSfet When the Soft Start is triggere, the VI threshol is aroun 150mV Soft Start Can be triggere by the following conitions: 1) During the startup (VCC is less than 10V) 2) DC to DC short (PWMtrifault is greater than VCC07V) During above 3 conitions, the V I threshol is aroun 150mV until the conitions have been remove After above 3 conitions have been remove, the internal Soft Start D to A will ramp up the voltage from ~150mV to 2V Each Soft Start Ramp can last aroun 10mS Short (PWMtrifault) When PWMtrifault is greater VCC07V, PWMOUT will be turne off It can be use to etecte the following 2 things: 1) Short Protection 2) Thermal Shut Down To achieve above item, it requires a negative temperature coefficient Resistor The following figure shows the typical circuit for PWMtrifault an V I pins Turn off PFC(PWMtrifault) When PWMtrifault is less than (VCC14V)/2, CM6805A/CM6806A will turn off PFC Usually; it means loa has been reuce to a level, which is the level of the Green Moe threshol Usually, we set the Green Moe threshol aroun 20% of the full loa After turning off PFC, the efficiency will be increase ue to the input voltage is higher an less switching events Component Reuction Components associate with the VRMS an IEAO pins of a typical PFC controller such as the CM6800 have been eliminate The PFC power limit an banwith oes vary with line voltage 2005/12/28 Preliminary Champion Microelectronic Corporation Page 15

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17 θ PACKAGE DIMENSION CM6805(A;B;C)/CM6806(A;B;C) 10 PinSSOP (R10) PIN 1 ID θ 2005/12/28 Preliminary Champion Microelectronic Corporation Page 17

18 NUMBERING SCHEME CM6805(A;B;C)/CM6806(A;B;C) Orering Number: CM6805AXY (note1) Orering Number: CM6805AGXY (note2) note1: X : Suffix for Temperature Range (note 3) Y : Suffix for Package Type (note 4) note2: G : Suffix for Pb Free Prouct X : Suffix for Temperature Range (note 3) Y : Suffix for Package Type (note 4) note 3: X= I : 40 ~125 note 4: R: SSOP /12/28 Preliminary Champion Microelectronic Corporation Page 18

19 IMPORTANT NOTICE Champion Microelectronic Corporation (CMC) reserves the right to make changes to its proucts or to iscontinue any integrate circuit prouct or service without notice, an avises its customers to obtain the latest version of relevant information to verify, before placing orers, that the information being relie on is current A few applications using integrate circuit proucts may involve potential risks of eath, personal injury, or severe property or environmental amage CMC integrate circuit proucts are not esigne, intene, authorize, or warrante to be suitable for use in lifesupport applications, evices or systems or other critical applications Use of CMC proucts in such applications is unerstoo to be fully at the risk of the customer In orer to minimize risks associate with the customer s applications, the customer shoul provie aequate esign an operating safeguars HsinChu Heaquarter Sales & Marketing 5F, No 11, Park Avenue II, ScienceBase Inustrial Park, HsinChu City, Taiwan 11F, No 3063, Sec 1, Ta Tung R, Hsichih, Taipei Hsien 221 Taiwan, ROC T E L : T E L : F A X : F A X : /12/28 Preliminary Champion Microelectronic Corporation Page 19