NDS9953A Dual P-Channel Enhancement Mode Field Effect Transistor
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1 February 996 NS99A ual P-Channel Enhancement Mode Field Effect Transistor General escription Features These P-Channel enhancement mode power field effect -.9A, -V. R S(ON) V = -V. transistors are produced using Fairchild's proprietary, high cell density, MOS technology. This very high density High density cell design for extremely low R S(ON). process is especially tailored to minimize on-state resistance, High power and current handling capability in a widely used provide superior switching performance, and withstand high surface mount package. energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage ual MOSFET in surface mount package. applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed Absolute Maximum Ratings T A = C unless otherwise noted Symbol Parameter NS99A Units V SS rain-source Voltage - V V S Gate-Source Voltage ± V I rain Current - Continuous (Note a) ±.9 A - Pulsed ± P Power issipation for ual Operation W Power issipation for Single Operation (Note a).6 (Note b) (Note c).9,t STG Operating and Storage Temperature Range - to C THERMAL CHARACTERISTICS R θja Thermal Resistance, Junction-to-Ambient (Note a) 78 C/W R θjc Thermal Resistance, Junction-to-Case (Note ) C/W 997 Fairchild Semiconductor Corporation NS99A.SAM
2 Electrical Characteristics (T A = C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BV SS rain-source Breakdown Voltage V = V, I = - µa - V I SS Zero Gate Voltage rain Current V S = - V, V = V - µa = C - µa I SF Gate - Body Leakage, Forward V = V, V S = V na I SR Gate - Body Leakage, Reverse V = - V, V S = V - na ON CHARACTERISTICS (Note ) V (th) Gate Threshold Voltage V S = V, I = - µa V = C R S(ON) Static rain-source On-Resistance V = - V, I = -. A.. Ω = C.. V = -. V, I = -. A.7. = C.. I
3 Electrical Characteristics (T A = C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units RAIN-SOURCE IOE CHARACTERISTICS AN MAXIMUM RATIN I S Maximum Continuous rain-source iode Forward Current -. A V S rain-source iode Forward Voltage V = V, I S = -. A (Note ) V t rr Reverse Recovery Time V = V, I F = -. A, di F /dt = A/µs ns Notes:. R θja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R θjc is guaranteed by design while R θca is determined by the user's board design. P (t) = TA RθJ A(t) = TA = I R θj C +R (t) R S(ON ) TJ θca(t) Typical R θja for single device operation using the board layouts shown below on."x" FR- PCB in a still air environment: a. 78 o C/W when mounted on a. in pad of oz cpper. b. o C/W when mounted on a. in pad of oz cpper. c. o C/W when mounted on a. in pad of oz cpper. a b c Scale : on letter size paper. Pulse Test: Pulse Width < µs, uty Cycle <.%. NS99A.SAM
4 Typical Electrical Characteristics I, RAIN-SOURCE CURRENT (A) V = -V R S(on), NORMALIZE RAIN-SOURCE ON-RESISTANCE.. V = -.V V, RAIN-SOURCE VOLTAGE (V) S I, RAIN CURRENT (A) - - Figure. On-Region Characteristics. Figure. On-Resistance Variation with Gate Voltage and rain Current..6 R S(ON), NORMALIZE RAIN-SOURCE ON-RESISTANCE...8 I = -.9A V = -V R S(on), NORMALIZE RAIN-SOURCE ON-RESISTANCE. V = -V T = C J C - C , JUNCTION TEMPERATURE ( C) I, RAIN CURRENT (A) - - Figure. On-Resistance Variation with Temperature. Figure. On-Resistance Variation with rain Current and Temperature. -. I, RAIN CURRENT (A) V = -V S T = - C J C C V th, NORMALIZE GATE-SOURCE THRESHOL VOLTAGE..9.8 V = V S I = -µa V, GATE TO SOURCE VOLTAGE (V) T, JUNCTION TEMPERATURE ( C) J Figure. Transfer Characteristics. Figure 6. Gate Threshold Variation with Temperature. NS99A.SAM
5 FS S SS Typical Electrical Characteristics (continued) BV, NORMALIZE RAIN-SOURCE BREAKOWN VOLTAGE I = -µa T J, JUNCTION TEMPERATURE ( C) Figure 7. Breakdown Voltage Variation with Temperature. -I, REVERSE RAIN CURRENT (A)... V = V T = C J C - C V S, BOY IOE FORWAR VOLTAGE (V) Figure 8. Body iode Forward Voltage Variation with Current and Temperature. CAPACITANCE (pf) 8 f = MHz V = V C iss C oss C rss -V, GATE-SOURCE VOLTAGE (V) 8 6 I = -.9A V = -V S -V -V... -V S, RAIN TO SOURCE VOLTAGE (V) 6 8 Q g, GATE CHARGE (nc) Figure 9. Capacitance Characteristics. Figure. Gate Charge Characteristic. g, TRANSCONUCTANCE (SIEMENS) 6 V = -V S - I T = - C J C -, RAIN CURRENT (A) C -8 - Figure. Transconductance Variation with rain Current and Temperature. NS99A.SAM
6 Typical Thermal Characteristics. STEAY-STATE POWER ISSIPATION (W). b c Total Power for ual Operation a Power for Single Operation."x" FR- Board o T A = C Still Air oz COPPER MOUNTING PA AREA (in ) I, STEAY-STATE RAIN CURRENT (A) a b c."x" FR- Board o T A = C Still Air V = -V..... oz COPPER MOUNTING PA AREA (in ) Figure. SO-8 ual Package Maximum Steady-State Power issipation versus Copper Mounting Pad Area. Figure. Maximum Steady-State rain Current versus Copper Mounting Pad Area. -I, RAIN CURRENT (A)... RS(ON) LIMIT V = -V SINGLE PULSE R = See Note c θja T = C A s C ms V S, RAIN-SOURCE VOLTAGE (V) s ms ms Figure. Maximum Safe Operating Area. us r(t), NORMALIZE EFFECTIVE TRANSIENT THERMAL RESISTANCE = Single Pulse..... t, TIME (sec) P(pk) R θja (t) = r(t) * R θja R = See Note c θja t t - T = P * R (t) A θja uty Cycle, = t / t Figure. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note c. Transient thermal response will change depending on the circuit board design. NS99A.SAM
7 TRAEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ISCLAIMER ACEx Bottomless CoolFET CROSSVOLT E CMOS TM FACT FACT Quiet Series FAST FASTr GTO HiSeC ISOPLANAR MICROWIRE POP PowerTrench QFET QS Quiet Series SuperSOT - SuperSOT SuperSOT -8 SyncFET TinyLogic UHC VCX FAIRCHIL SEMICONUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PROUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR ESIGN. FAIRCHIL OES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PROUCT OR CIRCUIT ESCRIBE HEREIN; NEITHER OES IT CONVEY ANY LICENSE UNER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHIL S PROUCTS ARE NOT AUTHORIZE FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT EVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHIL SEMICONUCTOR CORPORATION. As used herein:. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PROUCT STATUS EFINITIONS efinition of Terms. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. atasheet Identification Product Status efinition Advance Information Preliminary No Identification Needed Formative or In esign First Production Full Production This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. E
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