NDS351N N-Channel Logic Level Enhancement Mode Field Effect Transistor
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1 NS3N N-Channel Logic Level Enhancement Mode Field Effect Transistor General escription These N-Channel logic level enhancement mode power field effect transistors are produced using ON Semiconductor's proprietary, high cell density, MOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMCIA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package. Features.A, 3V. R S(ON) = V GS =.V. Proprietary package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low R S(ON). Exceptional on-resistance and maximum C current capability. Compact industry standard SOT-3 surface mount package. G S Absolute Maximum Ratings T A = C unless otherwise noted Symbol Parameter NS3N Units V SS rain-source Voltage 3 V V GSS Gate-Source Voltage - Continuous V I Maximum rain Current - Continuous (Note a) ±. A - Pulsed ± P Maximum Power issipation (Note a) W (Note b).,t STG Operating and Storage Temperature Range - to C THERMAL CHARACTERISTICS R θja Thermal Resistance, Junction-to-Ambient C/W (Note a) R θjc Thermal Resistance, Junction-to-Case (Note ) 7 C/W 997 Semiconductor Components Industries, LLC. September-7, Rev. Publication Order Number: NS3N/
2 Electrical Characteristics (T A = C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BV SS rain-source Breakdown Voltage V GS = V, I = µa 3 V I SS Zero Gate Voltage rain Current V S = V, V GS = V µa = C µa I GSSF Gate - Body Leakage, Forward V GS = V, V S = V na I GSSR Gate - Body Leakage, Reverse V GS = - V, V S = V - na ON CHARACTERISTICS (Note ) V GS(th) Gate Threshold Voltage V S = V GS, I = µa.8. V = C.3. R S(ON) Static rain-source On-Resistance V GS =. V, I =. A.8 Ω = C..37 V GS = V, I =. A.3. I (ON) On-State rain Current V GS =. V, V S = V A g FS Forward Transconductance V S = V, I =. A. S YNAMIC CHARACTERISTICS C iss Input Capacitance V S = V, V GS = V, pf C oss Output Capacitance f =. MHz 8 pf C rss Reverse Transfer Capacitance 8 pf SWITCHING CHARACTERISTICS (Note ) t d(on) Turn - On elay Time V = V, I = A, 9 ns t r Turn - On Rise Time V GS = V, R GEN = Ω 3 ns t d(off) Turn - Off elay Time ns t f Turn - Off Fall Time 9 ns Q g Total Gate Charge V S = V, I =. A, 3. nc Q gs Gate-Source Charge V GS = V nc Q gd Gate-rain Charge nc
3 Electrical Characteristics (T A = C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units RAIN-SOURCE IOE CHARACTERISTICS AN MAXIMUM RATINGS I S Maximum Continuous rain-source iode Forward Current. A I SM Maximum Pulsed rain-source iode Forward Current A V S rain-source iode Forward Voltage V GS = V, I S =. A (Note ).8. V Notes:. R θja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R θjc is guaranteed by design while R θca is determined by the user's board design. P (t) = T A = T A = RθJ A(t) RθJ C+RθCA(t) I (t) R S (ON ) TJ Typical R θja using the board layouts shown below on."x" FR- PCB in a still air environment: a. o C/W when mounted on a. in pad of oz cpper. b. 7 o C/W when mounted on a. in pad of oz cpper. a b Scale : on letter size paper. Pulse Test: Pulse Width < 3µs, uty Cycle <.%. 3
4 Typical Electrical Characteristics I, RAIN-SOURCE CURRENT (A) 8 V = V GS... 3 V, RAIN-SOURCE VOLTAGE (V) S. Figure. On-Region Characteristics R S(on), NORMALIZE RAIN-SOURCE ON-RESISTANCE.. V = 3.V GS 3. 8 I, RAIN CURRENT (A) Figure. On-Resistance Variation with Gate Voltage and rain Current.... R S(ON), NORMALIZE RAIN-SOURCE ON-RESISTANCE....8 I =.A V GS =.V R S(on), NORMALIZE RAIN-SOURCE ON-RESISTANCE.. T = C J C - C V GS =. V , JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation with Temperature 8 I, RAIN CURRENT (A) Figure. On-Resistance Variation with rain Current and Temperature I, RAIN CURRENT (A) 3 V S = V = - C C V th, NORMALIZE GATE-SOURCE THRESHOL VOLTAGE V = V S GS I = -µa 3 V GS, GATE TO SOURCE VOLTAGE (V) Figure. Transfer Characteristics T, JUNCTION TEMPERATURE ( C) J Figure. Gate Threshold Variation with Temperature
5 S SS Typical Electrical Characteristics (continued) BV, NORMALIZE RAIN-SOURCE BREAKOWN VOLTAGE....9 I = µa T J, JUNCTION TEMPERATURE ( C) Figure 7. Breakdown Voltage Variation with Temperature I, REVERSE RAIN CURRENT (A)... V GS = V T = C J C - C V, BOY IOE FORWAR VOLTAGE (V) S Figure 8. Body iode Forward Voltage Variation with Current and Temperature 3 CAPACITANCE (pf) 3 f = MHz V GS = V C iss C oss C rss V GS, GATE-SOURCE VOLTAGE (V) 8 I =.A S V = V S V.. 3 V, RAIN TO SOURCE VOLTAGE (V) S 3 Q g, GATE CHARGE (nc) Figure 9. Capacitance Characteristics Figure. Gate Charge Characteristics V t on t off t d(on) tr t d(off) t f V IN R L 9% 9% V GS R GEN G UT V OUT Output, Vout Input, Vin % % % 9% % Inverted S % Pulse Width Figure. Switching Test Circuit Figure. Switching Waveforms
6 Typical Electrical Characteristics (continued) g, TRANSCONUCTANCE (SIEMENS) FS V S = V 8 I, RAIN CURRENT (A) T = - C J C C Figure 3. Transconductance Variation with rain Current and Temperature I, RAIN CURRENT (A).. RS(ON) LIMIT V GS = V SINGLE PULSE T = C A s C ms... 3 s ms V, RAIN-SOURCE VOLTAGE (V) S Figure. Maximum Safe Operating Area us ms = r(t), NORMALIZE EFFECTIVE TRANSIENT THERMAL RESISTANCE R θja (t) = r(t) * R θja R = C/W θja.. P(pk)... Single Pulse t t - T = P * R (t) A θja. uty Cycle, = t /t t, TIME (sec) Figure. Transient Thermal Response Curve Note : Characterization performed using the conditions described in note c. Transient thermal response will change depending on the circuit board design.
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FCMT80N65S3 N-Channel SUPERFET III Easy-Drive MOSFET 650 V, 7 A, 80 mω Features 700 V @ T J = 50 o C Typ. R DS(on) = 52 mω Ultra Low Gate Charge (Typ. Q g = 33 nc) Low Effective Output Capacitance (Typ.
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Power MOSFET V, A, m, Single P Channel Features Small Footprint (3.3 x 3.3 mm) for Compact esign Low R S(on) to Minimize Conduction Losses Low Q G and Capacitance to Minimize river Losses NVTFS5PLWF Wettable
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Power MOSFET 6 V, 78 m,.5 A, N Channel Automotive Power MOSFET designed to minimize gate charge and low on resistance. AEC Q qualified MOSFET and PPAP capable suitable for automotive applications. Features.5
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dvanced Power MOSFET FETURES IEEE802.3af Compatible! valanche Rugged Technology! Rugged Gate Oxide Technology! Lower Input Capacitance! Improved Gate Charge! Extended Safe Operating rea! Lower Leakage
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More informationIs Now Part of To learn more about ON Semiconductor, please visit our website at
Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC
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