Description. Symbol Parameter FCP260N65S3 Unit V DSS Drain to Source Voltage 650 V

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1 FCP260N65S3 N-Channel SuperFET III MOSFET 650 V, 2 A, 260 mω Features 700 T J = 50 o C Typ. R DS(on) = 222 mω Ultra Low Gate Charge (Typ. Q g = 24 nc) Low Effective Output Capacitance (Typ. C oss(eff.) = 248 pf) 00% Avalanche Tested RoHS Compliant Applications Computing / Display Power Supplies Telecom / Server Power Supplies Industrial Power Supplies Lighting / Charger / Adapter Description SuperFET III MOSFET is ON Semiconductor s brand-new high voltage super-junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on-resistance and lower gate charge performance. This advanced technology is tailored to minimize conduction loss, provide superior switching performance, and withstand extreme dv/dt rate. Consequently, SuperFET III MOSFET is very suitable for various power system for miniaturization and higher efficiency. D G DS TO-220 G Absolute Maximum Ratings T C = 25 o C unless otherwise noted. Symbol Parameter FCP260N65S3 Unit S Drain to Source Voltage 650 V V GSS I D Gate to Source Voltage Drain Current Thermal Characteristics - DC ±30 V - AC (f > Hz) ±30 V - Continuous (T C = 25 o C) 2 - Continuous (T C = 00 o C) 7.6 I DM Drain Current - Pulsed (Note ) 30 A E AS Single Pulsed Avalanche Energy (Note 2) 57 mj I AS Avalanche Current (Note ) 2.3 A E AR Repetitive Avalanche Energy (Note ) 0.9 mj dv/dt P D MOSFET dv/dt 00 Peak Diode Recovery dv/dt (Note 3) 20 Power Dissipation (T C = 25 o C) 90 W A V/ns - Derate Above 25 o C 0.72 W/ o C T J, T STG Operating and Storage Temperature Range -55 to +50 o C T L Maximum Lead Temperature for Soldering, /8 from Case for 5 Seconds 300 o C Symbol Parameter FCP260N65S3 Unit R θjc Thermal Resistance, Junction to Case, Max..39 R θja Thermal Resistance, Junction to Ambient, Max S o C/W Semiconductor Components Industries, LLC, 207 July, 207, Rev..0 Publication Order Number: FCP260N65S3/D

2 Package Marking and Ordering Information Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity FCP260N65S3 FCP260N65S3 TO-220 Tube N/A N/A 50 units Electrical Characteristics T C = 25 o C unless otherwise noted. Symbol Parameter Test Conditions Min. Typ. Max. Unit Off Characteristics V GS = 0 V, I D = ma, T J = 25 C V BS Drain to Source Breakdown Voltage V GS = 0 V, I D = ma, T J = 50 C V ΔBS Breakdown Voltage Temperature I / ΔT J Coefficient D = ma, Referenced to 25 o C V/ o C = 650 V, V GS = 0 V - - I DSS Zero Gate Voltage Drain Current μa = 520 V, T C = 25 o C I GSS Gate to Body Leakage Current V GS = ±30 V, = 0 V - - ±00 na On Characteristics V GS(th) Gate Threshold Voltage V GS =, I D =.2 ma V R DS(on) Static Drain to Source On Resistance V GS = 0 V, I D = 6 A mω g FS Forward Transconductance = 20 V, I D = 6 A S Dynamic Characteristics C iss Input Capacitance = 400 V, V GS = 0 V, pf C oss Output Capacitance f = MHz pf C oss(eff.) Effective Output Capacitance = 0 V to 400 V, V GS = 0 V pf C oss(er.) Energy Related Output Capacitance = 0 V to 400 V, V GS = 0 V pf Q g(tot) Total Gate Charge at 0V = 400 V, I D = 6 A, nc Q gs Gate to Source Gate Charge V GS = 0 V nc Q gd Gate to Drain Miller Charge (Note 4) nc ESR Equivalent Series Resistance f = MHz Ω Switching Characteristics t d(on) Turn-On Delay Time ns t r Turn-On Rise Time V DD = 400 V, I D = 6 A, ns t d(off) Turn-Off Delay Time V GS = 0 V, R g = 4.7 Ω ns t f Turn-Off Fall Time (Note 4) ns Source-Drain Diode Characteristics I S Maximum Continuous Source to Drain Diode Forward Current A I SM Maximum Pulsed Source to Drain Diode Forward Current A V SD Source to Drain Diode Forward Voltage V GS = 0 V, I SD = 6 A V t rr Reverse Recovery Time V GS = 0 V, I SD = 6 A, ns Q rr Reverse Recovery Charge di F /dt = 00 A/μs μc Notes:. Repetitive rating: pulse-width limited by maximum junction temperature. 2. I AS = 2.3 A, R G = 25 Ω, starting T J = 25 C. 3. I SD 6 A, di/dt 200 A/μs, V DD 400 V, starting T J = 25 C. 4. Essentially independent of operating temperature typical characteristics. 2

3 Typical Performance Characteristics RDS(ON), ID, Drain Current[A] Drain-Source On-Resistance [Ω] Figure. On-Region Characteristics 40 0 V GS = 0.0V 8.0V 7.0V 6.5V 6.0V 5.5V. 250μs Pulse Test 2. T C = 25 o C , Drain-Source Voltage[V] Figure 2. Transfer Characteristics V GS, Gate-Source Voltage[V] Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage Drain Current and Gate Voltage Variation vs. Source Current and Temperature *Note: T C = 25 o C V GS = 0V V GS = 20V IS, Reverse Drain Current [A] ID, Drain Current[A] = 20V μs Pulse Test 50 o C. V GS = 0V μs Pulse Test 50 o C -55 o C 25 o C -55 o C 25 o C I D, Drain Current [A] Figure 5. Capacitance Characteristics V SD, Body Diode Forward Voltage [V] Figure 6. Gate Charge Characteristics *Note: I D = 6A Capacitances [pf] *Note:. V GS = 0V 2. f = MHz Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd C iss C oss C rss , Drain-Source Voltage [V] VGS, Gate-Source Voltage [V] = 30V = 400V Q g, Total Gate Charge [nc] 3

4 Typical Performance Characteristics (Continued) BVDSS, [Normalized] Drain-Source Breakdown Voltage Figure 7. Breakdown Voltage Variation vs. Temperature T J, Junction Temperature [ o C] Figure 9. Maximum Safe Operating Area 00. V GS = 0V 2. I D = 0mA Figure 8. On-Resistance Variation vs. Temperature RDS(on), [Normalized] Drain-Source On-Resistance V GS = 0V 2. I D = 6A T J, Junction Temperature [ o C] Figure 0. Maximum Drain Current vs. Case Temperature 5 ID, Drain Current [A] 0 ms 00μs 30μs 0ms DC Operation in This Area is Limited by R DS(on) 0.. T C = 25 o C 2. T J = 50 o C 3. Single Pulse , Drain-Source Voltage [V] ID, Drain Current [A] T C, Case Temperature [ o C] Figure. Eoss vs. Drain to Source Voltage 6 4 E OSS [μj] , Drain to Source Voltage [V] 4

5 Typical Performance Characteristics (Continued) r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE DUTY CYCLE-DESCENDING ORDER D = SINGLE PULSE Figure 2. Transient Thermal Response Curve t, RECTANGULAR PULSE DURATION (sec) P DM t t 2 NOTES: Z θjc (t) = r(t) x R θjc R θjc =.39 o C/W Peak T J = P DM x Z θjc (t) + T C Duty Cycle, D = t / t 2 5

6 I G = const. Figure 3. Gate Charge Test Circuit & Waveform R L 90% R G V GS V DD V 0V GS DUT 0% V GS t d(on) t r t d(off) tf t on t off Figure 4. Resistive Switching Test Circuit & Waveforms V GS Figure 5. Unclamped Inductive Switching Test Circuit & Waveforms 6

7 V GS R G DUT I SD Driver + _ L Same Type as DUT dv/dt controlled by RG I SD controlled by pulse period V DD V GS ( Driver ) Gate Pulse Width D = Gate Pulse Period 0V I FM, Body Diode Forward Current I SD ( DUT ) di/dt I RM Body Diode Reverse Current ( DUT ) Body Diode Recovery dv/dt V SD V DD Body Diode Forward Voltage Drop Figure 6. Peak Diode Recovery dv/dt Test Circuit & Waveforms 7

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