FDP047N10 N-Channel PowerTrench MOSFET 100V, 164A, 4.7mΩ Description
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1 FDP047N N-Channel PowerTrench MOSFET 0V, 164A, 4.7mΩ Description R DS(on) = 3.9mΩ ( V GS = V, I D = 75A Fast switching speed Low gate charge High performance trench technology for extremely low R DS(on) High power and current handing capability RoHS compliant General Description March 2008 tm This N-Channel MOSFET is producedusing Fairchild Semiconductor s advance PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. Application DC to DC converters / Synchronous Rectification D G G D S TO-220 S MOSFET Maximum Ratings T C = 25 o C unless otherwise noted* Symbol Parameter Ratings Units V DSS Drain to Source Voltage 0 V V GSS Gate to Source Voltage ±20 V Drain Current - Continuous (T C = 25 o C) 164* A I D - Continuous (T C = 0 o C) 116* A I DM Drain Current - Pulsed (Note 1) 656* A E AS Single Pulsed Avalanche Energy (Note 2) 1153 mj dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns P D Power Dissipation (T C = 25 o C) 375 W - Derate above 25 o C 2.5 W/ o C T J, T STG Operating and Storage Temperature Range -55 to +175 o C T L Maximum Lead Temperature for Soldering Purpose, 1/8 from Case for 5 Seconds 300 o C *Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 0A. Thermal Characteristics Symbol Parameter Ratings Units R θjc Thermal Resistance, Junction to Case 0.4 R θcs Thermal Resistance, Case to Sink Typ. 0.5 R θja Thermal Resistance, Junction to Ambient 62.5 o C/W 2008 Fairchild Semiconductor Corporation 1
2 Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDP047N FDP047N TO Electrical Characteristics T C = 25 o C unless otherwise noted Symbol Parameter Test Conditions Min. Typ. Max. Units Off Characteristics BV DSS Drain to Source Breakdown Voltage I D = 250µA, V GS = 0V, T J = 25 o C V BV DSS T J On Characteristics Breakdown Voltage Temperature Coefficient Dynamic Characteristics Switching Characteristics I D = 250µA, Referenced to 25 o C V/ o C V DS = 0V, V GS = 0V I DSS Zero Gate Voltage Drain Current µa V DS = 0V, V GS = 0V, T C = 150 o C I GSS Gate to Body Leakage Current V GS = ±20V, V DS = 0V - - ±0 na V GS(th) Gate Threshold Voltage V GS = V DS, I D = 250µA V R DS(on) Static Drain to Source On Resistance V GS = V, I D = 75A mω g FS Forward Transconductance V DS = V, I D = 75A (Note 4) S C iss Input Capacitance pf V DS = 25V, V GS = 0V C oss Output Capacitance pf f = 1MHz C rss Reverse Transfer Capacitance pf t d(on) Turn-On Delay Time ns t r Turn-On Rise Time V DD = 50V, I D = 75A ns t d(off) Turn-Off Delay Time V GS = V, R GEN = 25Ω ns t f Turn-Off Fall Time (Note 4, 5) ns Q g(tot) Total Gate Charge at V V DS = 80V, I D = 75A nc Q gs Gate to Source Gate Charge V GS = V nc Q gd Gate to Drain Miller Charge (Note 4, 5) nc Drain-Source Diode Characteristics I S Maximum Continuous Drain to Source Diode Forward Current A I SM Maximum Pulsed Drain to Source Diode Forward Current A V SD Drain to Source Diode Forward Voltage V GS = 0V, I SD = 75A V t rr Reverse Recovery Time V GS = 0V, I SD = 75A ns Q rr Reverse Recovery Charge di F /dt = 0A/µs (Note 4) nc Notes: 1. Repetitive Rating: Pulse width limited by maximum junction temperature 2. L = 0.41mH, I AS = 75A, V DD = 50V, R G = 25Ω, Starting T J = 25 C 3. I SD 75A, di/dt 200A/µs, V DD BV DSS, Starting T J = 25 C 4. Pulse Test: Pulse width 300µs, Duty Cycle 2% 5. Essentially Independent of Operating Temperature Typical Characteristics 2
3 Typical Performance Characteristics ID,Drain Current[A] RDS(ON) [mω], Drain-Source On-Resistance Figure 1. On-Region Characteristics V 8V 7V 2. T C = 25 o C V DS,Drain-Source Voltage[V] 6.5 V 6.0 V 5.5 V V GS = 5V µs Pulse Test 5 Figure 2. Transfer Characteristics 1. V DS = 20V µs Pulse Test V GS,Gate-Source Voltage[V] Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage Drain Current and Gate Voltage Variation vs. Source Current and Temperature VGS = V V GS = 20V *Note: T J = 25 o C I D, Drain Current [A] ID,Drain Current[A] IS, Reverse Drain Current [A] o C 175 o C -55 o C 25 o C 25 o C 1. V GS = 0V µs Pulse Test V SD, Body Diode Forward Voltage [V] Capacitances [pf] Figure 5. Capacitance Characteristics C iss C oss C rss Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd V DS, Drain-Source Voltage [V] *Note: 1. V GS = 0V 2. f = 1MHz 30 VGS, Gate-Source Voltage [V] Figure 6. Gate Charge Characteristics V DS = 20V V DS = 50V V DS = 80V *Note: I D = 75A Q g, Total Gate Charge [nc] 3
4 Typical Performance Characteristics (Continued) BVDSS, [Normalized] Drain-Source Breakdown Voltage ID, Drain Current [A] Figure 7. Breakdown Voltage Variation vs. Temperature V GS = 0V 2. I D = 250µA T J, Junction Temperature [ o C] Figure 9. Maximum Safe Operating Area Operation in This Area is Limited by R DS(on) 0µs 1ms ms DC 1. T C = 25 o C 2. T J = 175 o C 3. Single Pulse µs RDS(on), [Normalized] Drain-Source On-Resistance ID, Drain Current [A] Figure 8. On-Resistance Variation vs. Temperature V GS = V 2. I D = 75A T J, Junction Temperature [ o C] Figure. Maximum Drain Current vs. Case Temperature Limited by package V DS, Drain-Source Voltage [V] T C, Case Temperature [ o C] Figure 11. Transient Thermal Response Curve 1 Thermal Response [Z θjc ] Single pulse 1. Z θjc (t) = 0.4 o C/W Max. 2. Duty Factor, D= t 1 /t 2 3. T JM - T C = P DM * Z θjc (t) 1E Rectangular Pulse Duration [sec] P DM t 1 t 2 4
5 Gate Charge Test Circuit & Waveform Resistive Switching Test Circuit & Waveforms Unclamped Inductive Switching Test Circuit & Waveforms 5
6 Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + V GS I SD V DS _ L Driver R G Same Type as DUT dv/dt controlled by RG I SD controlled by pulse period V DD V GS ( Driver ) Gate Pulse Width D = Gate Pulse Period V I FM, Body Diode Forward Current I SD ( DUT ) di/dt I RM Body Diode Reverse Current V DS ( DUT ) Body Diode Recovery dv/dt V SD V DD Body Diode Forward Voltage Drop 6
7 Mechanical Dimensions (1.70) ± ± ±0. (1.46) (1.00) 1.27 ± ±0.20 (8.70) ø3.60 ±0. (45 ) (3.00) (3.70) 1.52 ±0. TO ± ±0..08 ± MAX ± TYP [2.54 ±0.20] 0.80 ± TYP [2.54 ±0.20] ± ±0.20 7
8 tm tm tm TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidianries, and is not intended to be an exhaustive list of all such trademarks. ACEx Build it Now CorePLUS CROSSVOLT CTL Current Transfer Logic EcoSPARK EZSWITCH * Fairchild Fairchild Semiconductor FACT Quiet Series FACT FAST FastvCore FlashWriter * FPS FRFET Global Power Resource SM Green FPS Green FPS e-series GTO i-lo IntelliMAX ISOPLANAR MegaBuck MICROCOUPLER MicroFET MicroPak MillerDrive Motion-SPM OPTOLOGIC OPTOPLANAR PDP-SPM Power220 POWEREDGE Power-SPM PowerTrench Programmable Active Droop QFET QS QT Optoelectronics Quiet Series RapidConfigure SMART START SPM STEALTH SuperFET SuperSOT -3 SuperSOT -6 SuperSOT -8 SupreMOS SyncFET The Power Franchise TinyBoost TinyBuck TinyLogic TINYOPTO TinyPower TinyPWM TinyWire µserdes UHC Ultra FRFET UniFET VCX * EZSWITCH and FlashWriter are trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support, device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Preliminary No Identification Needed Obsolete Formative or In Design First Production Full Production Not In Production This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I33 8
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500V N-Channel MOSFET May 2001 QFET TM General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe, DMOS technology. This
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600V N-Channel MOSFET General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar, DMOS technology. This advanced technology has
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FQA11N90 FQA11N90 900V N-Channel MOSFET September 2000 QFET TM General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe,
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60V N-Channel MOSFET May 2001 QFET TM General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe, DMOS technology. This
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100V N-Channel MOSFET General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe, DMOS technology. This advanced technology
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400V N-Channel MOSFET General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar, DMOS technology. This advanced technology has
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500V N-Channel MOSFET November 2001 General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar, DMOS technology. This advanced
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200V N-Channel MOSFET General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar, DMOS technology. This advanced technology has
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