FDB5800 N-Channel Logic Level PowerTrench MOSFET
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1 FDB58 N-Channel Logic Level PowerTrench MOSFET 6V, 8A, 7mΩ Features r DS(ON) = 5.5mΩ (Typ.), V GS = 5V, I D = 8A High performance trench technology for extermely low Rdson Low Gate Charge High power and current handling capability Qualified to AEC Q RoHS Compliant Applications Motor/ Body Load Control ABS Systems Power Train Management Injection Systems DC-DC Converters and Off-Line UPS September 25 D GATE G SOURCE TO-263AB FDB SERIES DRAIN (FLANGE) S 25 Fairchild Semiconductor Corporation
2 MOSFET Maximum Ratings T C = 25 C unless otherwise noted Symbol Parameter Ratings Units V DSS Drain to Source Voltage 6 V V GS Gate to Source Voltage ±2 V I D Drain Current Continuous (T C < 2 o C, V GS = V) 8 A Continuous (T C < 9 o C, V GS = 5V) 8 A Continuous (T amb = 25 o C, V GS = V, with R θja = 43 o C/W) 4 A Pulsed Figure 4 A E AS Single Pulse Avalanche Energy (Note ) 652 mj Power dissipation 242 W P D Derate above 25 o C.6 W/ o C T J, T STG Operating and Storage Temperature -55 to 75 o C Thermal Characteristics R θjc Thermal Resistance Junction to Case TO o C/W R θja Thermal Resistance Junction to Ambient TO-263 ( Note 2) 62.5 o C/W R θja Thermal Resistance Junction to Ambient TO-263, in 2 copper pad area 43 Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDB58 FDB58 TO-263AB 33mm 24mm 8 units Electrical Characteristics T C = 25 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics B VDSS Drain to Source Breakdown Voltage I D = 25µA, V GS = V V I DSS Zero Gate Voltage Drain Current V DS = 48V - - V GS = V T C = 5 o C I GSS Gate to Source Leakage Current V GS = ±2V - - ± na o C/W µa On Characteristics V GS(TH) Gate to Source Threshold Voltage V GS = V DS, I D = 25µA V r DS(ON) Drain to Source On Resistance Dynamic Characteristics I D = 8A, V GS = V I D = 8A, V GS = 4.5V I D = 8A, V GS = 5V I D = 8A, V GS = V, T J = 75 o C C ISS Input Capacitance pf V DS = 5V, V GS = V, C OSS Output Capacitance pf f = MHz C RSS Reverse Transfer Capacitance pf R G Gate Resistance V GS =.5V, f = MHz Ω Q g(tot) Total Gate Charge at V V GS = V to V Q g(5) Total Gate Charge at 5V V GS = V to 5V nc Q V DD = 3V g(th) Threshold Gate Charge V GS = V to V nc I D = 8A Q gs Gate to Source Gate Charge nc I g =.ma Q gs2 Gate Charge Threshold to Plateau nc mω nc Q gd Gate to Drain Miller Charge nc 2
3 Switching Characteristics (V GS = 5V) t ON Turn-On Time ns t d(on) Turn-On Delay Time ns t r Rise Time V DD = 3V, I D = 8A ns t d(off) Turn-Off Delay Time V GS = 5V, R GS = 2Ω ns t f Fall Time ns t OFF Turn-Off Time ns Drain-Source Diode Characteristics V SD Source to Drain Diode Voltage I SD = 8A V I SD = 4A - -. V t rr Reverse Recovery Time I SD = 6A, di SD /dt = A/µs ns Q RR Reverse Recovered Charge I SD = 6A, di SD /dt = A/µs nc Notes: : Starting T J = 25 C, L = mh, I AS = 36A, V DD = 54V, V GS = V. 2: Pulse width = s. This product has been designed to meet the extreme test conditions and environment demanded by the automotive industry. For a copy of the requirements, see AEC Q at: All Fairchild Semiconductor products are manufactured, assembled and tested under ISO9 and QS9 quality systems certification. 3
4 Typical Characteristics T C = 25 C unless otherwise noted POWER DISSIPATION MULTIPLIER Figure. Z θjc, NORMALIZED THERMAL IMPEDANCE 2. T C, CASE TEMPERATURE ( o C) Normalized Power Dissipation vs Case Temperature DUTY CYCLE - DESCENDING ORDER I D, DRAIN CURRENT (A) Figure 2. R θjc =.62 C/W CURRENT LIMITED BY PACKAGE VGS = 5V VGS =V T C, CASE TEMPERATURE ( C) Maximum Continuous Drain Current vs Case Temperature NOTES: DUTY FACTOR: D = t /t 2 SINGLE PULSE PEAK T J = P DM x R θjc + T C t, RECTANGULAR PULSE DURATION (s) P DM t t 2 Figure 3. Normalized Maximum Transient Thermal Impedance I DM, PEAK CURRENT (A) V GS = 5V TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION T C = 25 o C FOR TEMPERATURES ABOVE 25 o C DERATE PEAK CURRENT AS FOLLOWS: I = I 75 - T C t, PULSE WIDTH (s) Figure 4. Peak Current Capability 4
5 Typical Characteristics T C = 25 C unless otherwise noted I D, DRAIN TCURRENT (A) I D, DRAIN TCURRENT (A). Figure OPERATION IN THIS AREA MAY BE LIMITED BY r DS(ON) SINGLE PULSE T J = MAX RATED T C = 25 o C µs µs ms ms ms DC V DS, DRAIN TO SOURCE VOLTAGE (V) V DS = 6V Forward Bias Safe Operating Area PULSE DURATION = 8µs DUTY CYCLE =.5% MAX T A = 25 o C 4 T A = 25 o C 2 T A = -55 o C V GS, GATE TO SOURCE VOLTAGE (V) I AS, AVALANCHE CURRENT (A) 5 NOTE: Refer to Fairchild Application Notes AN754 and AN755 I D, DRAIN TCURRENT (A) Figure 6. If R = t AV = (L)(I AS )/(.3*RATED BV DSS - V DD ) If R t AV = (L/R)ln[(I AS *R)/(.3*RATED BV DSS - V DD ) +] STARTING T J = 5 o C STARTING T J = 25 o C.. t AV, TIME IN AVALANCHE (ms) Unclamped Inductive Switching Capability 5.V V 4.5V 4.V PULSE DURATION = 8µs DUTY CYCLE =.5% MAX 3.5V 3.V V DS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Transfer Characteristics Figure 8. Saturation Characteristics R DS(ON), ON-RESISTANCE(OHM) I D = 2A T A = 25 o C PULSE DURATION = 8µs DUTY CYCLE =.5% MAX T A = 75 o C NORMALIZED DRAIN TO SOURCE ON-RESISTANCE I D = 8A V GS = V PULSE DURATION = 8µs DUTY CYCLE =.5% MAX V GS, GATE TO SOURCE VOLTAGE (V) T J, AMBIENT TEMPERATURE ( o C) 2 Figure 9. On-Resistance Variation vs Gate-to- Source Voltage Figure. Normalized Drain to Source On Resistance vs Junction Temperature 5
6 Typical Characteristics T C = 25 C unless otherwise noted NORMALIZED GATE THRESHOLD VOLTAGE T J, AMBIENT TEMPERATURE ( o C) Figure. CAPACITANCE (pf) 2 V GS = V DS I D = 25µA Normalized Gate Threshold Voltage vs Junction Temperature f = MHz V GS = V C RSS C ISS C OSS. V DS, DRAIN TO SOURCE VOLTAGE (V) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE V GS, GATE- SOURCE VOLTAGE.. I D = 25µA T J, AMBIENT TEMPERATURE ( o C) Figure 2. Normalized Drain to Source Breakdown Voltage vs Junction Temperature VDD =3V WAVEFORMS IN ASCENDING ORDER: ID = 8A ID = A Q g, GATE CHARGE (nc) Figure 3. Capacitance vs Drain to Source Voltage Figure 4. Gate Charge Waveforms for Constant Gate Current 6
7 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx FAST ActiveArray FASTr Bottomless FPS Build it Now FRFET CoolFET GlobalOptoisolator CROSSVOLT GTO DOME HiSeC EcoSPARK I 2 C E 2 CMOS i-lo EnSigna ImpliedDisconnect FACT IntelliMAX FACT Quiet Series Across the board. Around the world. The Power Franchise Programmable Active Droop DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms ISOPLANAR LittleFET MICROCOUPLER MicroFET MicroPak MICROWIRE MSX MSXPro OCX OCXPro OPTOLOGIC OPTOPLANAR PACMAN POP Power247 PowerEdge PowerSaver PowerTrench QFET QS QT Optoelectronics Quiet Series RapidConfigure RapidConnect μserdes SILENT SWITCHER SMART START SPM Stealth SuperFET SuperSOT -3 SuperSOT A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Product Status Definition SuperSOT -8 SyncFET TinyLogic TINYOPTO TruTranslation UHC UltraFET UniFET VCX Wire Advance Information Preliminary No Identification Needed Formative or In Design First Production Full Production This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I6
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