Description. TO-220F FDPF Series. Symbol Parameter FDP20N50 FDPF20N50 Unit

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1 FDP20N50 / FDPF20N50 500V N-Channel MOSFET Features 20A, 500V, R DS(on) = GS = 10 V Low gate charge ( typical 45.6 nc) Low C rss ( typical 27 pf) Fast switching 100% avalanche tested Improved dv/dt capability G D S TO-220 FDP Series G D S Description April 2007 UniFET TM These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies and active power factor correction. TO-220F FDPF Series G S D Absolute Maximum Ratings Symbol Parameter FDP20N50 FDPF20N50 Unit S Drain-Source Voltage 500 V Drain Current - Continuous (T C = 25 C) - Continuous (T C = 100 C) Thermal Characteristics * 12.9 * M Drain Current - Pulsed (Note 1) * A V GSS Gate-Source voltage ±30 V E AS Single Pulsed Avalanche Energy (Note 2) 1110 mj I AR Avalanche Current (Note 1) 20 A E AR Repetitive Avalanche Energy (Note 1) 25 mj dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns P D Power Dissipation (T C = 25 C) - Derate above 25 C T J, T STG Operating and Storage Temperature Range -55 to +150 C T L Maximum Lead Temperature for Soldering Purpose, 1/8 from Case for 5 Seconds * Drain current limited by maximum junction temperature A A W W/ C 300 C Symbol Parameter FDP20N50 FDPF20N50 Unit R θjc Thermal Resistance, Junction-to-Case C/W R θcs Thermal Resistance, Case-to-Sink Typ C/W R θja Thermal Resistance, Junction-to-Ambient C/W 2007 Fairchild Semiconductor Corporation 1

2 Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDP20N50 FDP20N50 TO FDPF20N50 FDPF20N50 TO-220F Electrical Characteristics T C = 25 C unless otherwise noted Symbol Parameter Conditions Min. Typ. Max Units Off Characteristics BS Drain-Source Breakdown Voltage V GS = 0V, = 250μA V ΔBS Breakdown Voltage Temperature / ΔT J Coefficient SS Zero Gate Voltage Drain Current = 500V, V GS = 0V = 400V, T C = 125 C = 250μA, Referenced to 25 C V/ C I GSSF Gate-Body Leakage Current, Forward V GS = 30V, = 0V na I GSSR Gate-Body Leakage Current, Reverse V GS = -30V, = 0V na On Characteristics V GS(th) Gate Threshold Voltage = V GS, = 250μA V R DS(on) Static Drain-Source On-Resistance V GS = 10V, = 10A Ω g FS Forward Transconductance = 40V, = 10A (Note 4) S Dynamic Characteristics C iss Input Capacitance = 25V, V GS = 0V, pf C oss Output Capacitance f = 1.0MHz pf C rss Reverse Transfer Capacitance pf Switching Characteristics t d(on) Turn-On Delay Time V DD = 250V, = 20A ns t r Turn-On Rise Time R G = 25Ω ns t d(off) Turn-Off Delay Time ns (Note 4, 5) t f Turn-Off Fall Time ns Q g Total Gate Charge = 400V, = 20A nc Q gs Gate-Source Charge V GS = 10V nc Q gd Gate-Drain Charge (Note 4, 5) nc Drain-Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain-Source Diode Forward Current A I SM Maximum Pulsed Drain-Source Diode Forward Current A V SD Drain-Source Diode Forward Voltage V GS = 0V, I S = 20A V t rr Reverse Recovery Time V GS = 0V, I S = 20A ns Q rr Reverse Recovery Charge di F /dt =100A/μs (Note 4) μc μa μa NOTES: 1. Repetitive Rating: Pulse width limited by maximum junction temperature 2. L = 5.0mH, I AS = 20A, V DD = 50V, R G = 25Ω, Starting T J = 25 C 3. I SD 20A, di/dt 200A/μs, V DD BS, Starting T J = 25 C 4. Pulse Test: Pulse width 300μs, Duty Cycle 2% 5. Essentially Independent of Operating Temperature Typical Characteristics 2

3 Typical Performance Characteristics Figure 1. On-Region Characteristics 10 1 V GS Top : 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V Bottom : 5.5 V , Drain-Source Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage μs Pulse Test 2. T C = 25 o C Figure 2. Transfer Characteristics 150 o C 25 o C -55 o C 1. = 40V μs Pulse Test V GS, Gate-Source Voltage [V] Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperatue R DS(ON) [Ω], Drain-Source On-Resistance V GS = 10V V GS = 20V * Note : T J = 25 o C R, Reverse Drain Current [A] o C 25 o C *Notes : 1. V GS = 0V μs Pulse Test V SD, Source-Drain voltage [V] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics Capacitances [pf] C oss C iss C rss , Drain-Source Voltage [V] C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss = C gd * Note : 1. V GS = 0 V 2. f = 1 MHz V GS, Gate-Source Voltage [V] = 100V = 250V = 400V * Note : = 20A Q G, Total Gate Charge [nc] 3

4 Typical Performance Characteristics (Continued) Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation vs. Temperature vs. Temperature BS, (Normalized) Drain-Source Breakdown Voltage V GS = 0 V 2. = 250 μa T J, Junction Temperature [ o C] R DS(ON), (Normalized) Drain-Source On-Resistance T J, Junction Temperature [ o C] Figure 9-1. Maximum Safe Operating Area Figure 9-2. Maximum Safe Operating Area - FDP20N50 - FDPF20N V GS = 10 V 2. = 10 A Operation in This Area is Limited by R DS(on) , Drain-Source Voltage [V] 10 μs 100 μs 1 ms 10 ms 100 ms DC 1. T C = 25 o C 2. T J = 150 o C 3. Single Pulse Operation in This Area is Limited by R DS(on) 10 μs 100 μs 1 ms 10 ms 100 ms DC 1. T C = 25 o C 2. T J = 150 o C 3. Single Pulse , Drain-Source Voltage [V] Figure 10. Maximum Drain Currentvs. Case Temperature T C, Case Temperature [ o C] 4

5 Typical Performance Characteristics (Continued) Figure Transient Thermal Response Curve - FDP20N50 Z θjc (t), Thermal Response D= single pulse t 1 t 2 * N otes : 1. Z θ JC (t) = 0.5 o C/W Max. 2. D uty F actor, D = t 1 /t 2 3. T JM - T C = P DM * Z θ JC (t) t 1, Square W ave Pulse Duration [sec] Figure Transient Thermal Response Curve - FDPF20N50 P DM D=0.5 Z θjc (t), Thermal Response single pulse P DM t 1 t 2 * N otes : 1. Z θ JC (t) = 3.3 o C/W Max. 2. D uty F actor, D = t 1 /t 2 3. T JM - T C = P DM * Z θ JC (t) t 1, Square W ave Pulse Duration [sec] 5

6 Gate Charge Test Circuit & Waveform Resistive Switching Test Circuit & Waveforms Unclamped Inductive Switching Test Circuit & Waveforms 6

7 Peak Diode Recovery dv/dt Test Circuit & Waveforms 7

8 Mechanical Dimensions TO Dimensions in Millimeters 8

9 Mechanical Dimensions ± ±0.10 TO-220F ±0.20 ø3.18 ± ±0.20 (7.00) (0.70) 6.68 ±0.20 (1.00x45 ) ± ±0.30 MAX ±0.10 (30 ) 0.35 ±0.10 # ± TYP [2.54 ±0.20] 2.54TYP [2.54 ±0.20] 9.40 ± ±

10 tm TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx Across the board. Around the world. ActiveArray Bottomless Build it Now CoolFET CROSSVOLT CTL Current Transfer Logic DOME E 2 CMOS EcoSPARK EnSigna FACT Quiet Series FACT FAST FASTr FPS FRFET GlobalOptoisolator GTO HiSeC i-lo ImpliedDisconnect IntelliMAX ISOPLANAR MICROCOUPLER MicroPak MICROWIRE Motion-SPM MSX MSXPro OCX OCXPro OPTOLOGIC OPTOPLANAR PACMAN PDP-SPM POP Power220 Power247 PowerEdge PowerSaver Power-SPM PowerTrench Programmable Active Droop QFET QS QT Optoelectronics Quiet Series RapidConfigure RapidConnect ScalarPump SMART START SPM STEALTH SuperFET SuperSOT -3 SuperSOT -6 SuperSOT -8 SyncFET TCM The Power Franchise TM TinyBoost TinyBuck TinyLogic TINYOPTO TinyPower TinyWire TruTranslation µserdes UHC UniFET VCX Wire tm DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor.The datasheet is printed for reference information only. Rev. I

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