FDN359BN N-Channel Logic Level PowerTrench TM MOSFET

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N-Channel Logic Level PowerTrench TM MOSFET January 26 General Description This N-Channel Logic Level MOSFET is produced using Fairchild s Semiconductor s advanced PowerTrench process that has been

1 N-Channel Logic Level PowerTrench TM MOSFET January 26 General Description This N-Channel Logic Level MOSFET is produced using Fairchild s Semiconductor s advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. Features 2.7 A, 3 V. Very fast switching speed. Low gate charge (5nC typical) R DS(ON) =.46 V GS = V R DS(ON) =.6 V GS = 4.5 V High performance version of industry standard SOT-23 package. Identical pin out to SOT-23 with 3% higher power handling capability. D D S TM SuperSOT -3 G G S Absolute Maximum Ratings T A =25 o C unless otherwise noted Symbol Parameter Ratings Units V DSS Drain-Source Voltage 3 V V GSS Gate-Source Voltage ±2 V I D Maximum Drain Current Continuous (Note a) 2.7 A Pulsed 5 P D Maximum Power Dissipation (Note a).5 (Note b).46 T J, T STG Operating and Storage Temperature Range 55 to +5 C Thermal Characteristics R θja Thermal Resistance, Junction-to-Ambient (Note a) 25 C/W R θjc Thermal Resistance, Junction-to-Case (Note ) 75 C/W Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity 359B 7 8mm 3 units W 26 Fairchild Semiconductor Corporation Rev A(W)

2 Electrical Characteristics T A = 25 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BV DSS Drain Source Breakdown Voltage V GS = V, I D = 25 µa 3 V BVDSS T J I DSS Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current I D = 25 µa,referenced to 25 C 2 mv/ C V DS = 24 V, V GS = V µa T J = -55 O C µa I GSS Gate Body Leakage V GS = ±2 V, V DS = V ± na On Characteristics (Note 2) V GS(th) Gate Threshold Voltage V DS = V GS, I D = 25 µa.8 3 V VGS(th) Gate Threshold Voltage T J Temperature Coefficient I D = 25 µa,referenced to 25 C 4 mv/ C R DS(on) Static Drain Source V GS = V, I D = 2.7 A Ω On Resistance V GS = 4.5 V, I D = 2.4 A.32.6 V GS = V, I D = 2.7 A, T J = 25 C I D(on) On State Drain Current V GS = V, V DS = 5 V 5 A g FS Forward Transconductance V DS = 5V, I D = 2.7 A S Dynamic Characteristics C iss Input Capacitance V DS = 5 V, V GS = V, pf C oss Output Capacitance f =. MHz 5 4 pf C rss Reverse Transfer Capacitance 65 pf R G Gate Resistance f =. MHz.8 Ω Switching Characteristics (Note 2) t d(on) Turn On Delay Time V DD = 5V, I D = A, 7 4 ns t r Turn On Rise Time V GS = V, R GEN = 6 Ω 5 ns t d(off) Turn Off Delay Time 2 35 ns t f Turn Off Fall Time 2 4 ns Q g Total Gate Charge V DS = 5 V, I D = 2.7 A, 5 7 nc Q gs Gate Source Charge V GS = 5 V.3 nc Gate Drain Charge.8 nc Q gd Rev A(W)

3 Electrical Characteristics T A = 25 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Drain Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain Source Diode Forward Current.42 A V SD Drain Source Diode Forward Voltage V GS = V, I S =.42 A (Note 2).7.2 V trr Diode Reverse Recovery Time IF = 2.7A, dif/dt = A/µs 2 2 ns Qrr Diode Reverse Recovery Charge 3 5 nc otes:. R θja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R θjc is guaranteed by design while R θca is determined by the user's board design. a) 25 C/W when mounted on a.2 in 2 pad of 2 oz. copper. b) 27 C/W when mounted on a minimum pad. Scale : on letter size paper 2. Pulse Test: Pulse Width 3 µs, Duty Cycle 2.% Rev A(W)

4 Typical Characteristics V GS = V 4.5V 4.V 3.5V 3.V 2.5V V DS, DRAIN-SOURCE VOLTAGE (V) Figure. On-Region Characteristics. R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE V GS = 3.V 3.5V 4.V 4.5V 5.V Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 6..V.2.8 R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE..9 I D = 2.7A V GS = V R DS(ON), ON-RESISTANCE (OHM).6.4 T A = 25 o C T A = 25 o C I D =.35A T J, JUNCTION TEMPERATURE ( o C) Figure 3. On-Resistance Variation with Temperature V GS, GATE TO SOURCE VOLTAGE (V) Figure 4. On-Resistance Variation with Gate-to-Source Voltage V DS = 5V T A = 25 o C 25 o C -55 o C V GS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. I S, REVERSE DRAIN CURRENT (A).... V GS = V T A = 25 o C 25 o C -55 o C V SD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. Rev A(W)

5 Typical Characteristics V GS, GATE-SOURCE VOLTAGE (V) I D = 2.7A 8 V DS = V 6 5V 4 2 2V CAPACITANCE (pf) C oss C iss f = MHz V GS = V C rss Q g, GATE CHARGE (nc) V DS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. 3. R DS(ON) LIMIT V GS = V SINGLE PULSE R θja = 27 o C/W T A = 25 o C ms s DC ms ms µs P(pk), PEAK TRANSIENT POWER (W) SINGLE PULSE R θja = 27 C/W T A = 25 C... V DS, DRAIN-SOURCE VOLTAGE (V)... t, TIME (sec) Figure 9. Maximum Safe Operating Area. Figure. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE.. D = SINGLE R θja (t) = r(t) * R θja R θja = 27 C/W t t 2 T J - T A = P * R θja(t) Duty Cycle, D = t / t t, TIME (sec) P(pk) Figure. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note b. Transient thermal response will change depending on the circuit board design. Rev A(W)

6 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx FAST ActiveArray FASTr Bottomless FPS Build it Now FRFET CoolFET GlobalOptoisolator CROSSVOLT GTO DOME HiSeC EcoSPARK I 2 C E 2 CMOS i-lo EnSigna ImpliedDisconnect FACT IntelliMAX FACT Quiet Series Across the board. Around the world. The Power Franchise Programmable Active Droop DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms ISOPLANAR LittleFET MICROCOUPLER MicroFET MicroPak MICROWIRE MSX MSXPro OCX OCXPro OPTOLOGIC OPTOPLANAR PACMAN POP Power247 PowerEdge PowerSaver PowerTrench QFET QS QT Optoelectronics Quiet Series RapidConfigure RapidConnect μserdes ScalarPump SILENT SWITCHER SMART START SPM Stealth SuperFET SuperSOT A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Product Status Definition SuperSOT -6 SuperSOT -8 SyncFET TCM TinyLogic TINYOPTO TruTranslation UHC UltraFET UniFET VCX Wire Advance Information Preliminary No Identification Needed Formative or In Design First Production Full Production This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I8

Features. TA=25 o C unless otherwise noted

Features. TA=25 o C unless otherwise noted Dual N-Channel.V Specified PowerTrench MOSFET July 3 General Description These N-Channel.V specified MOSFETs use Fairchild Semiconductor s advanced PowerTrench process. It has been optimized for power