J108/J109/J110/MMBFJ108

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N-Channel Switch This device is designed for digital switching applications where very low on resistance is mandatory. Sourced from Process 8. J8/J9/J/MMBFJ8 TO-92. Drain 2. Source 3.

1 N-Channel Switch This device is designed for digital switching applications where very low on resistance is mandatory. Sourced from Process 8. J8/J9/J/MMBFJ8 TO-92. Drain 2. Source 3. Gate 3 2 SuperSOT-3 Marking: I8. Drain 2. Source 3. Gate J8/J9/J/MMBFJ8 Absolute Maximum Ratings * T A =2 C unless otherwise noted Symbol Parameter alue Units DG Drain-Gate oltage 2 GS Gate-Source oltage -2 I GF Forward Gate Current ma T J, T stg Operating and Storage Junction Temperature Range - ~ + C * These ratings are limiting values above which the serviceability of any semiconductor device may be impaired. NOTES: ) These ratings are based on a maximum junction temperature of degrees C. 2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations. Electrical Characteristics T A =2 C unless otherwise noted Symbol Parameter Test Condition Min. Max. Units Off Characteristics (BR)GSS Gate-Source Breakdwon oltage I G = -µa, DS = -2 I GSS Gate Reverse Current GS = -, DS = GS = -, DS =, T A = C GS (off) Gate-Source Cutoff oltage DS =, I D = na 8 9 On Characteristics I DSS Zero-Gate oltage Drain Current * DS =, I GS = 8 9 r DS (on) Drain-Source On Resistance DS., GS = 8 9 Small Signal Characteristics C dg (on) C sg (off) Drain Gate & Source Gate On Capacitance * Pulse Test: Pulse Width 3µs, Duty Cycle 2.% na na ma ma ma DS =, GS =, f =.MHz 8 pf C dg (on) Drain-Gate Off Capacitance DS =, GS = -, f =.MHz pf C sg (off) Source-Gate Off Capacitance DS =, GS = -, f =.MHz pf Ω Ω Ω 22 Fairchild Semiconductor Corporation Rev. B, November 22

2 Thermal Characteristics T A =2 C unless otherwise noted Symbol Parameter Max. J8 - *MMBFJ8 Units P D Total Device Dissipation Derate above 2 C mw mw/ C R θjc Thermal Resistance, Junction to Case 2 C/W R θja Thermal Resistance, Junction to Ambient 37 6 C/W * Device mounted on FR-4 PCB.6.6.6" J8/J9/J/MMBFJ8 22 Fairchild Semiconductor Corporation Rev. B, November 22

3 Typical Characteristics I D - DRAIN CURRENT (ma) Common Drain-Source GS = T = 2캜 A C TYP GS(off) = DS - DRAIN-SOURCE OLTAGE () (Ω) r DS - DRAIN "ON" RESISTANCE Parameter Interactions I DS =., GS = PULSED r DS = m, GS = DS =., I D = 3. na r DS I DSS, _.. GS (OFF) - GATE CUTOFF OLTAGE () I DSS - DRAIN CURRENT (ma) J8/J9/J/MMBFJ8 Figure. Common Drain-Source Figure 2. Parameter Interactions C ts (C rs ) - CAPACITANCE (pf) Common Drain-Source f =. -. MHz C iss ( DS =.) C ( = ) rss DS I - DRAIN CURRENT (ma) D Common Drain-Source T = 2캜 A C TYP GS(off) = -.7 GS = GS - GATE-SOURCE OLTAGE () DS- DRAIN-SOURCE OLTAGE () Figure 3. Common Drain-Source Figure 4. Common Drain-Source r DS - NORMALIZED RESISTANCE 2 2 Normalized Drain Resistance vs Bias µa GS(off) r = DS r DS - GS GS(off) GS / GS(off) - NORMALIZED GATE-SOURCE OLTAGE () Figure. Normalized Drain Resistance vs Bias oltage e - NOISE OLTAGE (n / Hz) n Noise oltage vs Frequency DG = BW = 6. f = Hz, Hz f. khz I D = ma I D =. ma f - FREQUENCY (khz) Figure 6. Noise oltage vs Frequency 22 Fairchild Semiconductor Corporation Rev. B, November 22

4 Typical Characteristics (Continued) t ON - TURN-ON TIME (ns) Switching Turn-On Time vs Gate-Source Cutoff oltage T A = 2 C 캜 DD =. GS(off) = - 2 I D = ma I D = 3 ma GS(off) - GATE-SOURCE CUTOFF OLTAGE () t OFF - TURN-OFF TIME (ns) Switching Turn-On Time vs Drain Current T A = 2캜 C DD =. GS(off) = I - DRAIN CURRENT (ma) D GS(off) = - 8. GS(off) = -. GS(off) = - 3. J8/J9/J/MMBFJ8 Figure 7. Switching Turn-On Time vs Gate-Source Cutoff oltage Figure 8. Switching Turn-On Time vs Drain Current (Ω) r DS - DRAIN "ON" RESISTANCE On Resistance vs Drain Current GS(off) = 캜 C 2 C 캜 2캜 C 2캜 C = GS - C 캜 GS(off) = -. I D - DRAIN CURRENT (ma) g os - OUTPUT CONDUCTANCE ( mhos) µ GS(off) Output Conductance vs Drain Current. -. f =. khz. I - DRAIN CURRENT (ma) D =. DG T A = 2캜 C Figure 9. On Resistance vs Drain Current Figure. Output Conductance vs Drain Current g fs - TRANSCONDUCTANCE (mmhos) T A = 2캜 C DG = f =. khz Transconductance vs Drain Current T = - 캜 C A T = 2캜 A C T = 2캜 A C GS(off) = -. GS(off) = - 3. GS(off) = -.. I D - DRAIN CURRENT (ma) Figure. Transconductance vs Drain Current PD - POWER DISSIPATION(mW) 7 6 TO-92 4 SuperSOT TEMPERATURE ( o C) Figure 2. Power Dissipation vs Ambient Temperature 22 Fairchild Semiconductor Corporation Rev. B, November 22

5 Package Dimensions 3.86MAX.46 ±..27TYP [.27 ±.2].2 ± ±.2.27TYP [.27 ±.2] (R2.29) TO-92 (.2) 4.47 ± ± J8/J9/J/MMBFJ8 Dimensions in Millimeters 22 Fairchild Semiconductor Corporation Rev. B, November 22

6 Package Dimensions (Continued) SuperSOT-3 J8/J9/J/MMBFJ8 Dimensions in Millimeters 22 Fairchild Semiconductor Corporation Rev. B, November 22

7 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx ActiveArray Bottomless CoolFET CROSSOLT DOME EcoSPARK E 2 CMOS EnSigna FACT FACT Quiet series FAST FASTr FRFET GlobalOptoisolator GTO HiSeC I 2 C Across the board. Around the world. The Power Franchise Programmable Active Droop ImpliedDisconnect ISOPLANAR LittleFET MicroFET MicroPak MICROWIRE MSX MSXPro OCX OCXPro OPTOLOGIC OPTOPLANAR PACMAN POP Power247 PowerTrench QFET QS QT Optoelectronics Quiet Series RapidConfigure RapidConnect SILENT SWITCHER SMART START SPM Stealth SuperSOT -3 SuperSOT -6 SuperSOT -8 SyncFET TinyLogic TruTranslation UHC UltraFET CX DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. 22 Fairchild Semiconductor Corporation Rev. I

TA = 25 C unless otherwise noted. Symbol Parameter Value Units

TA = 25 C unless otherwise noted. Symbol Parameter Value Units G S D PN PN PN TO-92 This device is designed for low current DC and audio applications. These devices provide excellent performance as input stages for sub-picoamp instrumentation or any high impedance