Digital Control of DC DC Buck Converter

Transcription

1 Digital ontrol of D D uck onverter Smruthi M Krihnan Department of Electrical and Electronic Engineering R V ollege of Engineering, angalore, Karnataka, India Prof. Vaudeva anninthaa K ociate Profeor, Department of Electrical and Electronic Engineering R V ollege of Engineering, angalore, Karnataka, India btract The paper decribe the deign and implementation of a digital controller for D D uck onverter. Digital controller are increaingl replacing their analog counterpart due to it improved flexibilit, eaier integration, programmabilit, reduced deign time, ize, cot and improved reliabilit. Switching device are elected baed on the power handling capabilit and high frequenc witching. Voltage mode control i ued in order to get fater repone. Propoed D D uck onverter are controlled uing PD controller and Full State Feedback ontroller deigned uing Pole Placement technique. The PD controller ha been implemented on an tmega3-8 bit Microcontroller. The Full State Feedback controller ha been imulated in MTL/SIMULINK.. Introduction The field of power electronic i concerned with the proceing of electrical power uing electronic device. The ke element i the witching converter. In general, a witching converter contain a power input, control input and a power output port a hown in fig. The raw input power i proceed a pecified b the control input, ielding the conditioned output power. In a dc dc converter, the dc input voltage i converted to a dc output voltage having a larger or maller magnitude. Power input Feedforward Switching converter ontroller ontrol input Reference Feedback Power output Figure. General Switching onverter with ontroller Digital controller implementation ha the following advantage: improved flexibilit, reduced deign time, programmabilit, elimination of dicrete tuning component, improved tem reliabilit, eaier tem integration, and poibilit to include variou performance enhancement.. onverter Topolog and Operation The converter topolog elected i buck converter. The input voltage i V and output voltage ha to be regulated to 5V. The load current i - range. The witching frequenc of f = 6kHz i elected. It i deired to maintain a tight voltage regulation. In buck converter the average output voltage i leer than the dc input voltage[][3][4]. The output voltage i controlled b controlling the witching dut ccle. The witching buck converter i alo called a tep down converter i hown in fig. The ratio of output to input i given b v Iin D v I i

2 The term D i the dut ratio and defined a the ratio of the ON time of the witch to the total witching period. Iin Switch L anali doe not include an paraitic reitance (all ideal cae). v Dut Ratio D. 46 v i D Vi il D Figure. uck onverter ircuit I R.3 Inductor From Fig we can derive a implified differential equation baed on the aumption that the voltage acro the load, and thereb acro the capacitor, i fairl contant. The differential equation in term of the current through the inductor, when the witch i cloed, ma now be written a Uing Kirchoff voltage and Kirchoff current law, the dnamic i decribed b the following et of equation When witch u= di L v dt dv vo i dt R When witch u= di L v dt dv vo i dt R comparing the above equation we get di L v uv i dt dv vo i dt R.. Deign Specification Input voltage v = V Output voltage v = 5V Load current I = Switching frequenc f = 6KHz Time period T =.6 m. Dut ccle For calculation of the dut ratio we will firt of all aume that the converter i in tead tate. The witche are treated a being ideal, and the loe in the inductive and the capacitive element are neglected. lo it i important to point out that the following v i L v v D / f i I ripple The current ripple will be limited to 3% of maximum load. I ripple.3i. 6 L Tranformer core election The ize of a power tranformer i determined b rea product, and i given b the product of the core cro ection ( c ) and the window area ( w ) rea product ( p ) = ro ection area ( c ) x Window area ( w ) n appropriate core will be elected which mut have area product greater than the calculated p [4]. rea product i calculated before electing the uitable core b uing below formula. p ( D P = 38.7mm 4 out ( H )) /( k Where, k w =.5 =.3T J = 6/mm w f J K w =Window Utilization Factor; J=urrent Denit; =Flux Denit; P out =Output Power; F =Switching Frequenc; D=Maximum Dut cle =Efficienc.4.. ore election 6 )

3 ore part number : T6-6 Material : Iron Powder Inductor factor L : 93nH/T.4.. Number of turn Inductance L i given b L = L * N L : inductor factor N = 3 Turn.4.3. Selection of wire guage Wire gauge i elected baed on the RMS current in each winding. RMS current for each winding can be calculated a Irm I D rea of conductor = Irm.5mm J The reitance increaed due to Skin depth and calculated a follow conductivit 7 Permeabilit(µ) =.4 turn/ Therefore elected wire hould have a diameter le than.897mm(or * )..5 apacitor The output capacitor i aumed to be o large a to ield v (t) =V. However, the ripple in the output voltage with a practical value of capacitance can be calculated. uming that all of the ripple component in i L flow through the capacitor and it average component flow through the load reitor. Effective erie reitance (ESR) i ued to dominate the voltage ripple and when ESR requirement i met, the capacitor capacitance i uuall adequate. The ripple voltage i limited to % of maximum load. dv. v. 5V dv I ripple ( I 3. ontroller Deign ripple f * er) f F The output voltage of the witch-mode D-D converter are regulated to be within a pecified range in repone to change in the input voltage and the load current. There are two control method for D-D converter: voltage mode control and current mode control. There are three main problem that can be examined in the tud of tem in the control: tem dnamic, tem identification or modelling, and tem control. In tem control, the tem i known, and the input to the tem that produce a deired output mut be determined. In the lat ection we aw that the tead-tate output of a dc-dc converter, uuall the output voltage, i controlled b the dut ratio. To account for change in load current, input voltage, loe, and non idealitie in the converter, feedback baed control i required. The ened output voltage i multiplied b a feedback gain before being compared with a reference value. The error i fed to an appropriate error compenator that generate a control voltage, which i converted to dut ratio d b the PWM block[][6]. The propoed digital controller i hown in fig 3. The output voltage i ened and compared with a reference voltage. The error ignal i given a the input to the PD regulator. The output of PD regulator i given a the input to the pule width modulator. The dut ccle i adjuted baed on the error ignal to make the output voltage follow the reference value. V Switching onverter Pule width modulation ontroller /D converter Figure 3. lock Diagram of Digital ontroller controller ha to be deigned to regulate the output voltage of a buck converter to a contant value. The pecification and parameter are input voltage i v and output voltage i regulated to 5v. The load current i - range. The witching frequenc of f = 6 KHz i elected The tranfer function of tem i given b 3

4 v vi L rc ( rc rl) 3.. PD ontroller digital PID controller and it variant can be deigned uing a variet of method available in literature [4,5,6]. PD controller i a imple two term controller. The tranfer function of the mot baic form of PD controller i given b u dx/dt - Plant X c ) ( kp kd -k Where k p proportional gain k d derivative gain R _ e ontroller () u Plant G() Figure 5. Full State Feedback Regulator ckermann formula ma be ued with ingle-input, ingle-output (SISO) tem. ckermann formula i n n K... ] M (... I) [ c n n Figure 4. PD ontroller lock Diagram Figure 4 how the PD controller in a cloed loop unit feedback tem. The variable e denote the tracking error, which i ent to the PD controller. The control ignal u from the controller to the plant i equal to the proportional gain (k p ) time the magnitude of the error plu the derivative gain (k d ) time the derivative of the error. Four major characteritic of the cloed-loop tep repone are rie time, overhoot, tead tate error, ettling time. The controller gain were determined experimentall. The following figure how the imulation reult of PD controller applied to uck onverter 3.. ontroller Deign uing Pole Placement Technique For a tem that i completel controllable and where all the tate are acceible, feedback of all of the tate through a gain matrix can be ued to place the pole at an deired location in the complex plane [5]. The control law ued for tate feedback i u kx which ue the matrix K to place the pole of the tem at deired location. Thi tpe of compenator i aid to emplo full tate feedback (FSF). FSF regulator i hown in fig State Space Model Modeling uing tate pace averaging i well known method ince man ear. The tate pace averaged model of the converter can be expreed a x x cx u The tate variable are the output voltage and inductor current x v v i o t The matrice of the tem are written a follow L R vd L The main advantage of tate pace controller i pole placement. Thi method allow placing pole of the tem to obtain deired output. The above tem i completel controllable and obervable. In thi cae we chooe the damping factor ξ and time of regulation t r. 3 tr n 4

5 Plant r u dx/dt -k - X -k Figure 6. Full State Feedback ontroller Let, r = tem input when tate variable feedback i emploed σ= feedback ignal obtained from tate variable u= plant input The feedback ignal i obtained from tate feedback and it i related to the tate variable b the equation kx Therefore plant input i given b the control law u = r kx comparing between the characteritic polnomial of tem with the deired polnomial give the deign equation of the feedback coefficient. 4. Simulation Reult The controller wa imulated in MTL/SIMULINK to verif the propertie of propoed controller. The parameter of converter ued in imulation are L=8 μh,, = μf, R=. Damping factor and time of regulation for voltage loop ξ=.6, t r =.4. Figure 8. Simulation of Full State Feedback ontroller uing Pole Placement Technique 5. Hardware Setup Digital control of buck converter i done uing Tmega3 controller. Switch : Power MOSFET IRF54N v 33. With thee rating, the ame power MOSFET wa being ued in the main witch Inductor: The inductance value choen wa 8uH. apacitor: The value elected wa uf The inductor and capacitor value were calculated uing the following Dut ccle : d = v /v in Maximum ripple current: di =.3*I Inductor value : L = ((v in -v )*(d/f ))/di Maximum ripple voltage : dv = (.*v ) apacitor value : = (di*(/f ))/(dv-(di*er)) Hardware implementation of buck converter i hown in Fig 9 and PWM input to the MOSFET and regulated output voltage i hown in Fig. Figure 7. Simulation of PD ontrolled uck onverter 5

6 Figure 9. uck onverter ircuit New ge International (P) Limited, 9, firt edition, ISN : / ISN 3: [6] Hebertt Sira-Ram ırez, Ram on Silva-Ortigoza, control deign technique in power electronic device, Springer-Verlag London Limited 6, ISN-3: [7]. rbetter and D. Makimovic, ontrol Method for Low- Voltage D Power Suppl in atter Powered Stem With Power Management, IEEE Power Electronic Specialit onference, St. Loui, Miouri, 997. Figure. PWM Input to the Mofet (Green) and Regulated Output Voltage (Yellow) 6. oncluion Digital controller implementation allow potentiall much greater flexibilit and better utilization of witching power converter. In thi paper, deign and implementation of a digital controller for an experimental low-power uck onverter ha been explained. buck converter circuit wa realized with appropriate Inductor and apacitor. ontrol of buck converter i done uing PD controller and Pole Placement technique. The propoed controller tructure i imulated in MTL/SIMULINK and i alo implemented uing tmega controller. 7. Reference [] Youefzadeh, Proximate Time-Optimal Digital ontrol for D-D onverter Power Electronic Specialit onference, 7. PES 7. IEEE [] L Wuidart, Topologie for Switched Mode Power Suppl pplication Note, STMicroelectronic, 999. [3] braham I Preman, Keith illing, Talor More Switching Power Suppl Deign, McGraw-Hill Prof Med/Tech, 6-Mar-9, 3rd edition, ISN 3: ISN : [4] Ned Mohan, Tore M Undeland and William P Robbin, Power electronic, onverter, application and deign 3 rd edition, 6 b John Wile & on. [5] L Umanand, S R hatt, Deign of Magnetic omponent for Switched Mode Power onverter, 6