LINEAR IMAGE SENSOR IC FOR CIS

Transcription

1 rev..00 LINEAR IMAGE SENSOR IC FOR CIS The is a suitable linear image sensor IC for a multichip-type contact image sensor with a resolution of 00 dots per inch. This IC integrates a 96dots photo-diode array and a CMOS scanning circuit. Picture signals are output one after another in analog signals, synchronized with a clock signal. Features z Resolution : 00 dpi z High frequency : fclk=mhz z Good linearity : γ z Low image lag : % Color picture reappears finely using RGB LEDs. z -input signal : SI,CLK Only these two input signals, start and clock, make the scanning easily. z Adjustable scanning length for various sizes of paper : 8.8mm Various sizes of paper can be read by simply changing the number of chips aligned in a line. z Low current consumption : 5V single power supply and CMOS scanning circuit. Terminal functions Terminal no. Table- Symbol Name Functions SI Start input terminal Input data for shift register CLK Clock input terminal Input clock for shift register VDD Power supply terminal Connect to +5V GND Ground terminal Connect to 0V 5 N.C. 6 RS Reference signal output terminal Output analog reference signal 7 SIG Video signal output terminal Output analog video signal 8 SO Start output terminal Output data for shift register

2 rev..00 Block diagram PD PD PD95 PD96 VDD SI GND Scanning circuits + Amplifier. SIG RS SO CLK Fig. Timing chart Tw CLK SI Tsu Th SO Tplh Tphl SIG RS Fig.

3 rev..00 Absolute maximum rating Table- Parameter Symbol Condition Rating Unit Power supply voltage VDD VDD-GND - 0. ~ +7.0 V Input voltage VIN SI,SI,CLK - 0. ~ VDD+0. V Output voltage VOUT SIG,SO - 0. ~ VDD+0. V Operating temperature TOPR - 5 ~ +85 C Storage temperature TSTR - 0 ~ +5 C Electric characteristics ) DC characteristics Table- VDD=5V±0%,TOPR=typ.55 C Parameter Symbol Condition Rating Unit min. typ. max. Input voltage VIH SI,CLK. V VIL 0.8 Input current IIH CLK 0.5 µa SI 0.0 IIL CLK -0.5 SI -0.5 Output voltage VOH SO,IOH =-00µA.8 V VOL SO,IOL = 00µA 0. Current IDD fck =.0MHz ma consumption Not amp operating Current IDD VDD-GND ma consumption Amp operating Leak current IS VDD-GND Not amp operating ma ) Switching characteristics Table- VDD=5V±0%,TOPR=typ.55 C Parameter Symbol Condition Rating Unit min. typ. max. Clock pulse width Tw Duty=50% 50 nsec Data set up time Tsu SI 00 nsec Data hold time Th SI 0 nsec Clock frequency fck Duty=50% SIG,SO CLK-SO L-H Tplh fck =.0MHz delay time CL = 0 pf CLK-SO H-L Tphl fck =.0MHz delay time CL = 0 pf MHz 60 nsec 60 nsec

4 rev..00 ) Photoelectric conversion characteristics Condition : VDD=5V, TOPR=55 C, fck=500khz(duty=50%) Read period RT=5msec, Load capacitor CL=00pF, Load resistor RL=00kΩ Light source LED(λ=570nm, Half value width λ 0nm, Illuminance lx) Connecting a capacitor.7µf between VDD and GND, Vp is tested using the measurement circuit of Fig.. (AD8) +5V SIG + 00pF 00kΩ - -5V Vp,Vd Vp at Ep=0.06lxsec Vd at Ep=0. lxsec (AD8) Av= +5V RS + 00pF 00kΩ - -5V Vr Av= Fig. Measurement circuit Table- 5 Parameter Symbol Condition Rating Unit Note min. typ. max. Bright Vpave Exposure value mv Vpe(i) signal Ep = 0.06 lx sec Bright signal dv Read period RT = 5msec % Vpe(i) )- deviation dv, i= % (*), i=, % Dark signal Vd RT = 5msec fck = 500kHz mv Vd(i) Dark signal Vd RT = 5msec 0 5 mv Vd(max) deviation fck = 500kHz -Vd(min) Reference signal Vr RT = 5msec fck = 500kHz mv Reference signal deviation Dark Difference Vr RT = 5msec fck = 500kHz 7 5 mv Vr(max) -Vr(min) Vd-Vr, i= mv Vd(i)-Vr(i) Linearity Rγ Vpave )- Image lag RIL Vpave % ) - Light response RIR Vpave % )- (* : Including measurement error %.)

5 rev..00 )- Definitions The definitions of parameters are as follows. Vp() i : Bright signal of i-th pixel. Vd(): i Dark signal of i-th pixel. Vpe() i = Vp() i Vd() i : Effective bright signal of i-th pixel. Vpave : Average of all Vpe() i Vp max : Maximum Vpe() i i= 95 Vp min : Minimum Vpe() i i= 95 Vp max Vp min dv = 00 Vpave dv = Vpe() i Vpe( i + ) Vpave 00 RIL : Average of all pixel image lag ratio. ( cf. Fig. ) RIR : Average of all pixel light response ratio. ( cf. Fig. ) LED OFF ON OFF SI SIG Vd RIR 98% Vpe Vpe 00% RIL % Fig. 5

6 rev..00 )- Linearity Rγ is tested by the following equation. Vd : The average of the dark signal Vd() i at R.T.=5.0msec. Vp5 : The average of the bright signal Vp() i at R.T.=0.5msec. Vp 5 : The average of the bright signal Vp() i at R.T.=.5msec. i : 96 Rγ = Vp5 Vd Vp5 Vd 000nsec CLK 50% 50nsec : Sampling time of Vp(i),Vd(i) Vp(i) GND Fig. 5 6

7 rev..00 Pad configuration Photo detecting windows Chip size : 80µm 0µm (Before scribing) Fig. 6 Pad size : 00µm 80µm (Opening area) Table- 7 Unit : µm PAD No. Name Coordinate PAD No. Name Coordinate X Y X Y SI N.C CLK RS VDD SIG +5-0 GND SO Note: The coordinate origin is the center of IC, and the coordinate value is the center of the pad. Chip size and sensor arrangement diagram Chip size:80µm 0µm (Before scribing) Shaded area:photo detecting window(x=5.5, Y=60.5) (Scribe line center) X Y P P P (P=8.5) (P=8.7) P P P 80 Fig.7 Unit : µm 7

8 rev..00 Wafer form Note: The arrangement of IC is subject to change without notes. Wafer diameter : 6 inch φ Wafer thickness : 50 ± 0µm (Sensor side) (Pad side) O ri L o t No. w a f e r No. e n ta t i o n F la t Fig. 8 8

9 rev..00 Scribe line (Unit : µm) (Scribe line area) 5 50 (Photo detecting window) (Passivation boundary) Fig. 9 9