Video switch for CANAL-Plus decoder

Transcription

1 Video switch for CANAL-Plus decoder The BA7630S and BA7630F are decoder switching ICs for the scrambled broadcasts in France. The ICs include a 3- input multiplexer, -input multiplexers with amplifiers, and a 9-bit serial-to-parallel converter. These ICs greatly simplify decoder switching, and can be connected to a control microprocessor using just two lines. Applications Video cassette recorders Features ) All the switching functions required for SECAM CANAL plus decoder integrated onto one chip. ) Built-in 9-bit serial-to-parallel converter for decoder and TV control reduces number of microprocessor wiring connections required. 3) Inputs have a sync-tip clamp. 4) The switch section can be used independently. 5) Low power consumption off a 5V supply. Absolute maximum ratings (Ta = 5 C) Parameter Symbol Limits Unit Power supply voltage VCC 9 V Power dissipation Operating temperature Storage temperature Pd BA7630S 500 mw BA7630F Topr 5 70 C Tstg 55 5 C 3V for switches to 9. Reduced by 5.0mW for each increase in Ta of C over 5 C. 3 Reduced by 6.0mW for each increase in Ta of C over 5 C. Recommended operating conditions (Ta = 5 C) Parameter Symbol Min. Typ. Max. Unit Power supply voltage VCC V

2 Block diagram BA7630S CONTROL LATCHES SW SW BIAS SHIFT REGISTER SW SW SW SW BIAS BA7630F CONTROL LATCHES SW SW BIAS SHIFT REGISTER SW SW SW SW Pin descriptions Pin No. Pin name Pin No. Pin name IN 4 (5) OUT VCC 3 (6) GND 3 IN 4 (7) SW 4 IN / OUT 4 (5) RESET IN 5 (0) SW 5 OUT 5 (6) IN 6 () SW 6 OUT 6 (7) GND 7 () SW 7 OUT 7 (8) IN 3 8 (3) SW 8 OUT 8 (9) SW IN / OUT 9 (4) OCK IN 9 (0) SW IN / OUT 0 (6) IN 0 (3) SW 3 IN / OUT (7) SW 9 OUT (4) OUT 3 (8) OUT Pin numbers in parentheses are for the BA7630F.

3 Electrical characteristics (unless otherwise noted Ta = 5 C and VCC = 5.0V) Parameter Symbol Min. Typ. Max. Unit Conditions Measurement Circuit Supply current ICC 8 40 ma Fig. Analog Maximum output level Vom.5.8 VP-P f = khz, THD = 0.5% Voltage gain GV db f = MHz, VIN =.0VP-P Voltage gain GV db f = MHz, VIN =.0VP-P Frequency characteristic Interchannel crosstalk SW switch level Digital "H" input voltage "L" input voltage "H" input current "L" input current "H" output leakage current "H" output leakage current "L" output voltage Maximum clock frequency Setup time Gf db CTM db VTH V 0MHz / MHz VIN =.0VP-P f = 4.43MHz VIN =.0P-P VIH 3.0 V VIL.0 V IIH 0 µa IIL µa IQH µa VCC = V IQH µa VCC = V VQL V ICC = ma fmax khz tsu 0..0 µs Fig. Fig.3 Fig. Fig. 3

4 Measurement circuits BA7630S V Distortion meter V Distortion meter SWK SWJ SW CONTROL LATCHES SW BIAS SHIFT REGISTER SW SW SW SW VCC5.0V A 47µ µ µ µ µ SWA SWB SWC SWD SWE SWF SWG SWH SWI OSC 3V V V Distortion meter Fig. 4

5 BA7630S VCC = 5.0V Input A A A V 5.0V SW 47µ 3 4 BIAS SHIFT REGISTER SW CONTROL 0 9 Input Input 5 8 V A V A3 V SW SW SW SWSW SW LATCHES Fig. 5

6 6 Multimedia ICs BA7630S 3 BIAS CONTROL SHIFT REGISTER SW SWSW SW SW SW SW SW V LATCHES VCC = 5.0V 47µ V PG PG PG SW9 SW8 SW7 SW6 SW5 Fig.3

7 7 Multimedia ICs Measurement conditions ICC Vom- Vom- Vom3- Vom- Vom3- Vom-3 Vom4-3 Gv- Gv3- Gv-3 Gv4-3 Gv- Gv- Gv3- Gf- Gf- Gf3- Gf- Gf3- Gf-3 Gf4-3 CTM-- CTM--3 CTM-- CTM--3 CTM3-- CTM3-- CTM--3 CTM3-- CTM-3-4 CTM4-3- SWA SWB SWC SWD SWE SWF SWG SWH SWI SWJ SWK Interchannel crosstalk Frequency characteristics Voltage gain Voltage gain Maximum output level Current dissipation Parameter Measurement method Switch setting Symbol The measurements in the above table were made with switching voltage levels for SW to of "L" = V, and "H" = 3V. Note : Connect distortion meters to the outputs. Adjust the input level so that the output distortion is 0.5% for a f = khz sine wave input. This output voltage is the maximum output level Vom (VP-P). Note : Input a f = MHz, VP-P sine wave. The voltage gain GV = 0 log VOUT / VIN (db). Note 3: Input a f = MHz and 0MHz, VP-P sine wave. The frequency characteristic Gf = 0 log VOUT (f = 0M) / VOUT (f = M) (db). Note 4: Input a f = 4.43MHz, VP-P sine wave. 0dB amplifier SW crosstalk is CTM0, and the amplifier SW crosstalk is CTM6. CTM0 = 0 log VOUT / VIN (db) CTM6 = 0 log VOUT / VIN 6 (db) Note Note Note 3 Note 4

8 Circuit operation Digital block truth table INPUT OUTPUT Reset Clock Data SW SW9 H H H L L SW-O SW9-O L H SW-O SW9-O L H SW-O SW9-O L L SW-O SW9-O L L SW-O SW9-O L H SW-N SW 9-N Note Data "L" sent to internal shift register Data "H" sent to internal shift register Internal shift register data unchanged Contents of internal shift register sent to internal latch Note : H: high level Note : L: low level Note 3: : either H or L Note 4: : L to H transition Note 5: : H to L transition Note 6: SW-O to SW9-O: SW to SW9 levels before establishing the input conditions shown in the table. Note 7: SW-N to SW9-N nearest clock transition. Analog truth table () OUT switch SW SW RESET SELECT L L H IN L H H IN H L H IN3 H H H IN3 () OUT switch RESET SELECT L H IN H H IN3 (3) OUT3 switch RESET SELECT L H IN H H IN4 Note: When using the switches independently without the digital block, the RESET pin must be set to "H". 8

9 Digital circuit operation () Introduction The BA7630S has 9-bit serial-to-parallel converter and latch circuit that has been included to expand the number of microprocessor output ports. The breakdown voltage of the output pins is 3V, so switch them in the range 0 to V. In addition to controlling the BA7630S switching block, these outputs can be used to control audio switching, scrambling decoders, and television sets. () Using the serial-to-parallel convertor block Signal input is basically done using clock and date pulses. As shown in Fig.0, the date is read on the rising edge of the clock pulses. If the date is H on the rising edge of the clock pulse, a L data bit is input to the shift register, and if the data is L on the rising edge of the clock pulse, a H data bit is input to the shift register. The shift register is sequentially incremented by the bit corresponding to SW. Data in excess of 9 bits is sequentially discarded. If the data is H on a falling edge of the clock, the contents of the shift register are read into the internal latch, and simultaneously output to the output port (the data polarity is inverted on output). This output is maintained until the latch is setup again. To reset, set the RESET pin to H. The internal shift register and latch contents go low (latch output all H ), for the duration that RESET is held high. K (3) Pulse timing The pulse timing diagrams are given below. K tsu tsu 0.µs (Typ.).0µs (Max.) Fig. 6 Clock rising edge and data relationship (setup time) K tsu tsu 0.µs (Typ.).0µs (Max.) Fig. 7 Clock falling edge and data relationship (setup time) RESET SW SW9 OUT At points to 4 data is input to the shift register. At point 5 the contents of the shift register are transferred to the latch and simultaneously output. tplh tphl 0.6µs (Typ.).0µs (Max.) Fig. 8 Reset and output relationship (reset transmission time) Fig. 4 K and relationship K Data in Data flow Shift register Latch Q Q Q Q Q Q Q Q Q Latch SW SW9 OUT Reset tplh9 tphl.µs (Typ.) 5.0µs (Max.) SW SW SW9 Fig. 5 Digital block Fig. 9 Clock falling edge and output relationship (latch transmission time) 9

10 Timing chart RESET OCK SW SW SW5 SW6 SW7 SW8 SW9 RESET RESET Fig.0 0

11 Multimedia ICs Application examples () Analog block BA7630S pin layout from VTR TUNER OUT µf 75Ω IN 3 VCC VCC 5V 47µF from DECODER OUT from TV OUT from VIDEO OUT IN 5 µf 75Ω IN3 7 µf 75Ω IN4 µf 75Ω GND 6 OUT R VCC OUT µF SA933 VCC OUT µF SA933 GND 3 R 75Ω 75Ω to VCR to DECODER IN to TV IN VCC R 5V 00 V 390 Fig. () Digital block VCC 4.5 3V k SW OUT SW SW9 OPEN COLLECTOR 50kΩ SW ONLY 8kΩ Fig.

12 Electrical characteristic curves GAIN (db) pin-pin 5pin-pin 7pin-pin VIN = 0VP-P CROSSTALK: CT (db) pin-pin 5pin-pin 7pin-pin VIN =.0VP-P GAIN (db) pin-pin 5pin-pin 3pin-pin 7pin-pin Input VP-P 00k 00k 500k M M 5M 0M 0M30M 00k 00k 500k M M 5M 0M 0M 00k 00k 500k M M 5M 0M 0M30M FREQUENCY (Hz) Fig. 3 Frequency characteristic(out) CROSSTALK: CT (db) pin-pin 5pin-pin 3pin-pin 7pin-pin Input VP-P FREQUENCY (Hz) Fig. 4 Crosstalk characteristic (OUT) FREQUENCY (Hz) Fig. 5 Frequency characteristic (OUT and OUT3) 00k 00k 500k M M 5M 0M 0M FREQUENCY (Hz) Fig. 6 Crosstalk characteristic (OUT and OUT3) External dimensions (Units: mm) BA7630S BA7630F 8.5 ± ± ± ± Min. 6.5 ± ± ± ± 0.3. ± ± ± Min. 0.5 ± SDIP SOP8