EE 508 Lecture 28. Integrator Design. Alaising in SC Circuits Elimination of redundant switches Switched Resistor Integrators
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1 EE 508 Lecture 28 Integrator Design Alaising in S ircuits Elimination of redundant switches Switched Resistor Integrators
2 Review from last time The S integrator 1 1 I 0eq= f LK Observe this circuit has considerable parasitics Bc Tc d1 s1 d2 s2 T1 1 B1 1EQ = 1 + s1 + d2 + T1 Parasitic capacitors s1 + d2 + T1 difficult to accurately match Parasitic capacitors of THIS S integrator limit performance Other S integrators (discussed later) offer same benefits but are not affected by parasitic capacitors
3 Review from last time Switched-apacitor Issues What if T LK is not much-much smaller than T SIG? laim: The transfer function of any Switched-apacitor is a rational fraction in z with all coefficients in both the numerator and denominator determined totally by capacitor ratios H z = m i=0 n i=0 az i bz i i i
4 Review from last time What is really required for building a filter that has highperformance features? R onsider continuous-time and discrete-time integrators: 1 Differential Equation 1 Ts = - Rs Frequency domain: 0 Transfer function Time domain: 1 t VOUT t VOUT t0 VIN d R t Accurate control of polynomial coefficients in transfer function or accurate control of coefficients in the differential/difference equation needed for good filter performance Absence of over-ordering terms due to parasitics H z =- 1 z-1 Difference Equation (nt+t)= (nt)-( 1 /) (nt)
5 Review from last time Switched-apacitor Issues 1 Transfer function of any S filter of form: H z = m i=0 n i=0 az i bz i i i Switched-capacitor circuits have potential for good accuracy and attractive area irrespective of how T LK relates to T SIG But good layout techniques and appropriate area need to be allocated to realize this potential!
6 Review from last time Switched-apacitor Integrators Stray-Insensitive S Integrators 1 1 A V 1 OUT 1 φ 2 A Many different S filter structures have been proposed But most that are actually used are based upon these two circuits with the summing inputs or loss added as needed
7 Review from last time Switched-apacitor Integrators Effects of Op Amp limitations R 1 A 1 1 A 1 an be shown that for a given band-edge, the GB requirements for the S circuit are more relaxed than what is required for the corresponding Active R integrator
8 Review from last time Switched-apacitor Integrators 1 1 A 1 A 1 Switched-capacitor filters are characterized in the z-domain S filters have continuous-amplitude inputs but outputs valid only at discrete times Digital filters implemented with AD/DA approach have discrete amplitude and discrete time What effects does the discrete-time property of a S filter have on the filter performance?
9 onsider a signal and harmonically-related signals sin(ωt) sin(2ωt) Look at the second harmonically-related signal sin(3ωt) sin(4ωt)
10 onsider a signal and harmonically-related signals Sample with rising edges on the following clock (this could be Φ 1 for a S filter)
11 onsider a signal and harmonically-related signals Sample with rising edges on the following clock (this could be Φ 1 for a S filter) Now overlay the fundamental frequency signal on this sampled waveform At these sample points, the samples of the two signals are indistinguishable A similar observation will be observed if any of the other harmonically related signals are overlayed A switched-capacitor filter can not distinguish between a fundamental and the harmonics if the ratio of the clock frequency to the signal frequency is too low
12 onsider a signal and harmonically-related signals 1 A 1 This aliases high frequency inputs (signals, noise, or even distortion) down to lower frequencies where it is indistinguishable from the lower frequency inputs How can this problem be resolved?
13 Anti-aliasing filter often required to limit frequency content at input to S filters ontinuous-time Discrete-Time VIN t VINFILT t VOUT kt Anti-aliasing Switched- apacitor Does this completely negate the benefits of the S filter? Anti-aliasing filter not needed if input is already band limited Anti-aliasing filter often continuous-time and occasionally off-chip Linearity requirements of anti-aliasing filter in passband are high Good passband linearity can be practically attained Transition sharpness and accuracy typically very relaxed in the anti-aliasing filter Passive first-order anti-aliasing filter often adequate
14 Anti-aliasing filter often required to limit frequency content at input to S filters ontinuous-time Discrete-Time VIN t VINFILT t VOUT kt Anti-aliasing Switched- apacitor What are the band-edge requirements for the anti-aliasing filter? Band edge of filter should limit all signals (and noise) at frequencies that are not wanted What are S clock requirements? f LK must be at least twice the frequency of the signals that are to be passed by the S filter
15 Anti-aliasing filter often required to limit frequency content at input to S filters ontinuous-time Discrete-Time VIN t VINFILT t VOUT kt Anti-aliasing Switched- apacitor Signal Band Alias Frequencies f LK 2 f LK f f BE flk 2 Antialiasing f LK f Must only attenuate at frequencies where energy is above an unacceptable level in the alias band
16 Anti-aliasing filter often required to limit frequency content at input to S filters ontinuous-time Discrete-Time VIN t VINFILT t VOUT kt Anti-aliasing Switched- apacitor Signal Band Alias Frequencies f LK 2 f LK f Signal Band Alias Frequencies f LK relaxed anti-aliasing filter requirements 2 f LK f fbe flk f LK f
17 Anti-aliasing filter often required to limit frequency content at input to S filters ontinuous-time Discrete-Time VIN t VINFILT t VOUT kt Signal Band Anti-aliasing Switched- apacitor f LK 2 Alias Frequencies Why not just make the clock frequency >> signal band edge? Recall in the continuous-time R-S counterparts f 1 1 POLES flk R Since f POLES will be in the signal band (that is why we are building a filter) large f LK will require large capacitor ratios if f LK >>f POLES Large capacitor ratios not attractive on silicon (area and matching issues) High f LK creates need for high GB in the op amps (area,power, and noise increase) Often f LK /f POLES in the 10:1 range proves useful (20:1 to 5:1 typical) f LK f
18 Elimination of Redundant Switches Redundant Switches Noninverting Input Noninverting Input Noninverting Input Noninverting Input Switched-apacitor Input with Redundant Switches Switched-apacitor Input with Redundant Switches Removed Although developed from the concept of S-resistor equivalence, S circuits often have no Resistor-apacitor equivalents
19 Elimination of the Integration apacitor φ1 3 φ1 φ2 φ2 φ1 1 φ2 VIN VOUT φ2 φ1 Noninverting Input φ1 3 φ1 φ2 φ2 φ1 1 φ2 VIN VOUT φ2 φ1 Noninverting Input What happens if the integration capacitor is eliminated? Serves as a S amplifier with gain of A V = 1 / 2 S amplifiers and S summing amplifiers are widely used in filter and non-filter applications
20 Switched apacitor Amplifiers 2 1 φ1 2 1 Summing, Differencing, Inverting, and Noninverting S Amplifiers Widely Used Significant reduction in switches from what we started with by eliminating in S integrator Must be stray insensitive in most applications Outputs valid only during one phase
21 Switched apacitor Amplifiers 2 φ1 1 φ2 Output VIN φ2 VOUT Input A
22 Voltage Mode Integrators Active R (Feedback-based) MOSFET- (Feedback-based) OTA- TA- Switched apacitor Switched Resistor Other Structures Sometimes termed current mode Will discuss later
23 Switched-Resistor Voltage Mode Integrators Precharge X M 1 RFET P F Observe that if a triode-region MOS device is switched between a precharge circuit and a filter circuit (or integrator) and V GS is held constant, It will behave as a resistor while in the filter circuit M 1 Precharge P X F RFET R FET L μ W V -V OX GS T M 1 X F P Observe that if two such circuits are switched between a precharge circuit and a filter circuit (or integrator) and V GS is held constant, It will behave as a resistor in the filter circuit at all times
24 Switched-Resistor Voltage Mode Integrators REF M 1 f REF X RFET F F R FET Pretune ircuit M 1 X F F Switched-resistor integrator lock frequency need only be fast enough to prevent droop on X Minor overlap or non-overlap of clock plays minimal role in integrator performance Switched-resistors can be used for integrator resistor or to replace all resistors in any filter Pretune circuit can accurately establish R FET REF product proportional to f REF R FET product is given by REF and is thus RFET = RFET = RFETREF accurately controlled REF REF
25 Switched-Resistor Voltage Mode Integrators Precharge X M 1 RFET P F There are some modest nonlinearities in this MOSFET when operating in the triode region Precharge X M 1 M 2 X RFET P F Significant improvement in linearity by cross-coupling a pair of triode region resistors Perfectly cancels nonlinearities if square law model is valid for M 1 and M 2 Only modest additional complexity in the Precharge circuit
26 Switched-Resistor Voltage Mode Integrators Integrator Output with Perfect omplimentary locks Integrator Output with Nonoverlapping locks Integrator Output with Overlapping locks F P F P Aberrations are very small, occur very infrequently, and are further filtered Play almost no role on performance of integrator or filter
27 Switched-Resistor Voltage Mode Integrators REF f REF RFET RFET Pretune ircuit Switched-resistor integrator Accurate R FET products is possible Area reduced compared to Active R structure because R FET small Single pretune circuit can be used to calibrate large number of resistors lock frequency not fast and not critical (but accuracy of f REF is important) Since resistors are memoryless elements, no transients associated with switching Since filter is a feedback structure, speed limited by BW of op amp
28
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