Final Program & List of Exhibitors
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1 IMAPS Mid-Atlantic Chapters Present the Mid-Atlantic Microelectronics Conference Atlantic City Hilton Atlantic City, New Jersey - USA June 23-24, 2011 Courtesy of Endicott Interconnect Technologies, Inc. Final Program & List of Exhibitors Benson Chan, Endicott Interconnect Technologies, Inc. Benson.chan@eitny.com General Chair: Erica Folk, Northrop Grumman erica.folk@ngc.com Technical Chairs: Vendor & Sponsorship Chair: Leo Garvey, LFG Micro Leo.Garvey@LFGMicro.com John Mazurowski, Penn State Electro-Optics Center jmazurowski@eoc.psu.edu Chapter Organizing Committee: Steve Lehnert (Metro), Bruce Romenesko (Chesapeake), David Seeger (Garden State), Ray Fillion & Bruce Chamberlin (Empire), Lee Levine (Keystone) and Robert Marchiando (Cleveland Pittsburgh) Corporate Sponsor: Riv Inc. Organized by: The International Microelectronics And Packaging Society (IMAPS) Bringing Together the Entire Microelectronics Supply Chain!
2 Mid-Atlantic Microelectronics Exhibitors (as of June 15 th ) Accumet Engineering Corp. Accuratus Ceramic Corporation AI Technology, Inc. BESI North America Blue Oceans, LLC Centerline Technologies Coining Technologies Delphon Industries DuPont Microcircuit Materials Endicott Interconnect Technologies ES Components, Inc. First Level, Inc. Geib Refining Corporation IC Assembly Services Kyocera America, Inc. Laser Process Manufacturing, Inc. Laser Processing Technology, Inc. LFG Micro Mastermelt America Microstar Technology Corporation NAMICS Corporation Newport Corporation Oneida Research Services, Inc. Process Solutions Consulting Proton Energy Systems, Inc. Riv, Inc. Silicon Cert, Ltd. SST International WE ARE SINCERELY GRATEFUL THAT YOU HAVE CHOSEN OUR EVENT AT WHICH TO EXHIBIT.
3 PDC1: 3D Integration: Technology, Applications & Markets for 3D Integrated Circuits Instructor: Philip Garrou, Microelectronic Consultants of NC Thursday, June 23, 2011 Registration: 12:00 pm - 5:30 pm Welcome Reception: 4:30 pm - 6:00 pm (Chairman s Club) PROFESSIONAL DEVELOPMENT COURSES (PDC): 1:00 PM - 5:00 PM PDC2: Advanced Packaging Technologies: Chip Scale & Embedded Chip Instructor: Ray Fillion, GE Global Research, Retired, Consultant This course is based on the authors activity over the past 7 years with numerous companies in the industry, his weekly 3D blog Insights From the Leading Edge in Solid State Technology and the 2nd volume Wiley-VCH book Handbook of 3D IC Integration: Technology and Applications of 3D IC Circuits which he authored. The course will begin by defining and contrasting 3D Integration (thinning, bonding and TSV) to 3D packaging (thinning, stacking and wire bonding to the BGA base). The various drivers for 3D integration including the electrical performance and economic issues will be examined. We will examine the various process sequences being proposed for 3D integration and the process unit operations necessary to fabricate a 3D stack. The process sequences proposed by IDMs, Universities, and Institutes will be compared and contrasted. We will then examine applications and the evolving infrastructure that will be necessary to accomplish this. The course will end by looking at the remaining technical and market barriers (design, thermal and test) and looking at the current best sources of 3D information. Who Should Attend? The course will be aimed at technical personnel wanting a status review of the subject and marketing/management personnel looking for a status report to help determine their position in the business food chain. Biography: Dr. Garrou consults in the areas of 3D IC integration, thin film technology, IC packaging and microelectronic materials. Dr. Garrou is a fellow of IEEE & IMAPS and was President of the IEEE CPMT ( ) and IMAPS (1998). He is currently a contributing editor and weekly 3D IC blogger for Solid state Technology magazine Insights From the Leading Edge. Dr Garrou is a Sr. Analyst and contributor for the Yole Developpment i-micronews and Yole newsletters. He has authored / co-authored > 100 technical publications and book chapters. He edited and authored the 2008 Handbook of 3D Integration: Technology and Applications of 3D Integrated Circuits for Wiley-VCH. Advances in microelectronics packaging have become as critical to the leading edge portable and computer industries as have the advances in semiconductor technologies. Semiconductor advances have provided ever more functionality in a smaller chip footprint. But with that comes an increase in device power requirement, cooling needs and I/O count. There are a small but important number of microelectronics packaging advances that have enabled fabricators and OEMs to efficiently put these latest chips into viable products. These include chip scale packaging and the newest advance, embedded chip packaging. This course covers wafer level and package level chip scale approaches, and single chip and multichip embedded ICs. It will look at the basic features of these packaging approaches, their construction and their processes. It will look at the leading approaches to these technologies and their inherent advantages and disadvantages. This course will cover issues yield losses, component handling and electronic test. The course will look at the leading companies implementing various versions of these technologies, cover the key differentiators between them and show how these devices have contributed to the advancements made in a wide range of both portable and high-end electronics. Who Should Attend? This course covers basic and advanced topics for product and design engineers, manufacturing process and assembly/packaging engineers, engineering managers, senior design technicians, consultants and academic specialists as well as marketing and sales personnel requiring an understanding of the capabilities, implications and options of advanced packaging and assembly technologies. Biography: A BSEE graduate of University of Massachusetts, Ray Fillion focuses in the areas advanced packaging and interconnection for next generation microelectronics systems. Ray has more than 40 years experience at GE in Aerospace Electronics and Global Research in all aspects of microelectronics in technical, management and business development positions. Mr. Fillion also serves or has served on Advisory Boards for a variety of technical societies, industry, academic institutions and governmental funded institutions. He has taught courses on advanced packaging for SMTA, GE and several universities. He was the lead inventor of the embedded chip technology at GE with most of his 27 issued US patents covering embedded chip technologies. His other technical areas of expertise include advanced microprocessor carriers, chip scale packages, multichip modules, 3-D packaging, power packaging, packaging for cryogenic electronics, and microwave packaging.
4 SESSION 1: INDUSTRY TOPICS Chair: Olivia Mao, Northrop Grumman 1:00 pm - 2:00 pm Expanding Use of Onsite UHP Hydrogen Production Improves Safety, Quality and Productivity in Semiconductor and PV Applications David E. Wolff, Proton OnSite An Update on the SAE G-19 Committee and Electronic Counterfeit Detection Standards Anne Poncheri, Silicon Cert Laboratories Break: 2:00 pm - 2:30 pm SESSION 2: FLEX INTERCONNECT Chair: Sarah Kemp, Northrop Grumman 2:30 pm - 4:00 pm Flexible Substrates Continue to Advance Medical Device Technology Rick Elbert, Valtronic Technologies (USA), Inc. Crack Development and Electrical Resistance Degradation of Aluminum Thin Film Deposited on Flexible Substrate under Cyclic Bending Fatigue Conditions Mohammad M. Hamasha, Khalid M. Alzoubi, James C. Switzer III, Susan Lu, Charles R. Westgate, Mark Poliks, State University of New York at Binghamton Stress Concentration and Crack Development of Deposited Titanium Oxides on Flexible Substrate for Solar Photovoltaic Applications Mohammad M. Hamasha, Khalid M. Alzoubi, James C. Switzer III, Elizabeth M Tiberio, Susan Lu, Charles R. Westgate, Mark Poliks, State University of New York at Binghamton Welcome Reception: 4:30 pm - 6:00 pm (Chairman s Club) A SPECIAL THANKS TO THE ORGANIZERS, SESSION CHAIRS, SPEAKERS, SPONSORS AND EXHIBITORS! YOUR COMMITMENT IS GREATLY APPRECIATED! Mark Your Calendar...Program and Registration Online Soon!!!
5 Friday, June 24, 2011 Registration: 7:00 am - 5:40 pm Breakfast: 7:30 am - 8:20 am Opening Remarks: 8:30 am 8:45 am General Chair: Erica Folk, Northrop Grumman Exhibit Hours: 9:45 am 4:30 pm (Refreshment Break, Lunch & Raffle Drawing will be held in the Exhibit Area.) SESSION 3: ADVANCED CHIP INTERCONNECTION Chair: Lee Levine, Process Solutions Consulting, Inc. 8:45 am 11:15 am Etching Method for Enhanced Contrast of Cu-Al Intermetallic Compounds on Aluminum Bond Pads Son Nguyen, Temple University; Horst Clauberg, Kulicke and Soffa Industries, Inc. The Growth of Copper Ball Bonding Lee Levine, Process Solutions Consulting, Inc. SESSION 4: MODELING Chair: Angela Martin, Northrop Grumman 8:45 am 11:15 am Rated Power and VSWR Characteristics improvement by Efficient Thermal Management and Integrated Matching Network Akhlaq Rahman, Fred Olinger, Thin Film Technology Corporation Damage Mechanisms and Acceleration Factors for No-Pb LGA, TSOP and QFN Type Assemblies in Thermal Cycling Luke Wentlent, Babak Arfaei, Peter Borgesen, Binghamton University Break in Exhibit Hall: 9:45 am - 10:15 am A Scheduling Tool for Processing Large-Area Flexible Electronics Matthew Sommerhalter, Daryl L. Santos, Binghamton University Advance Anisotropic Conductive Paste (ACP) for Flip Chip Assembly Ken Araujo, Tony Ruscigno, NAMICS Technologies, Inc. Acceleration of Huge Data Processing Using Hilbert Engine on A Single Processor An Vi Dang, Joan Delalic, Bjorn Gruenwald, Temple University Increasing Organic Solar Cell Efficiency through Cell Structure Optimization J. Weiss, L. Zhu, Peter Borgesen, Binghamton University Session 3 Sponsored by: Keynote Address & U. S. Coast Guard Air Base Atlantic City The HH-65 Helicopter and Search and Rescue (Indoor Presentation & LIVE SAR off the beach) 11:15 am 12:25 pm Keynote Presenter: Pilot LT Alex Barker, U. S. Coast Guard Air Base Atlantic City The MH-65 is the backbone of U.S. Coast Guard Aviation and carries with it a highly distinguished service history spanning nearly 30 years. Constructed with ultra-light composite materials, designed with innovative aerodynamic features, and outfitted with a highly sophisticated electronics, the Dolphin is well equipped for the wide ranging missions of the Coast Guard. These include Search and Rescue, Maritime Law Enforcement, and Homeland Security to name a few. At the conclusion of this presentation all attendees are invited out beyond the boardwalk to the beachfront where the MH- 65 Search & Rescue will take place. Lunch in Exhibit Hall: 12:25 pm - 2:00 pm Lunch Served: 12:25 pm - 1:15 pm
6 POSTER SESSION Chair: TBD 12:25 pm - 2:10 pm Rated Power Improvement for Low Ohm Current Sense Resistor by Optimum Thermal Management and Innovative Packaging Technique Akhlaq Rahman, Fred Olinger, Thin Film Technology Corporation Hardware Design for Gas Detection System Using Zeolite Coated with Nile Red Son Nguyen, Joan Delalic, Zameer Hasan, Joel B. Sheffield, David M. Kargbo, Temple University Preliminary Analysis of Overlay Registration Components for Roll-to-Roll Technology in Photolithography Denisse Yepez, Daryl Santos, Binghamton University SESSION 5: RELIABILITY/THERMAL Chair: John Mazurowski, Penn State Electro-Optics Center 2:10 pm 5:40 pm Metallic TIMs for High Brightness LED Packaging Amanda Hartnett, Seth Homer, Indium Corporation Passive 2-Phase Immersion Cooling of High Power GPUs Steve Pignato, Phillip Tuma, 3M Company Junction Temperature Characterization of High Power Light Emitting Diodes Moon-Hwan Chang, Diganta Das, Michael Pecht, University of Maryland - CALCE SESSION 6: ADVANCED PACKAGING Chair: Ray Fillion, Consultant 2:10 pm 5:10 pm Copper Plated TSVs in Silicon Wafers Using a Novel Process Emir Adanur, Charles D. Ellis, Robert N. Dean, Auburn University; Eric Tuck, Derek Strembicke, AEgis Technologies Wrist Computing System Michael Moore, Myra Torres, Impact Technologies LLC; Glenn Thomas, Endicott Interconnect Technology Embedded Chip Power Packaging Ray Fillion, Fillion Consulting Break in Exhibit Hall: 3:40 pm - 4:10 pm Raffle Drawing: 4:00 pm (must be present to win) Vendor & Sponsorship Chair: Leo Garvey, LFG Micro Package Reliability Testing Challenges and Trends Mike Ferrara, RFMD Rated Power Improvement of Termination Resistor by Employing Innovative Thermal Management Techniques Akhlaq Rahman, Fred Olinger, Michael Howieson, Thin Film Technology Corporation Technology Needs as Driven by One Potential Future - A Day Made of Glass J. Michael Harris, Corning Incorporated Multilayer Ceramics for MEMS Packaging Adam Schubring, Kyocera America, Inc. Flux Free Die Attach Utilizing Pressure Variation to Achieve Void Free Results Bruce Wilson, SST International Closing Remarks: 5:40 pm (Join us in Session 5) General Chair: Erica Folk, Northrop Grumman
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