High Efficient Heat Dissipation on Printed Circuit Boards. Markus Wille, R&D Manager, Schoeller Electronics Systems GmbH
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1 High Efficient Heat Dissipation on Printed Circuit Boards Markus Wille, R&D Manager, Schoeller Electronics Systems GmbH
2 Introduction 2 Heat Flux: Q x y Q z The substrate (insulation) material is a poor heat conductor, l ~ 0.2 W/mK The thermal conductivity of copper is much higher, l ~ 390 W/mK Depending on the copper distribution the heat flux in a circuit board is normally better in the x-y plane compared to the heat flux in the z-axis. A power or ground layer has a big influence on the heat flux. The heat flux and direction is mainly dominated by the thermal conductivity of the materials and the delta T in a given area. Tracks on or in a PCB are more or less useless for a good heat flux. The cross area is too low.
3 Introduction 3 The thermal situation of the complete system has to be taken into consideration P-BGA FC-BGA Components Casing Thermal interfaces Heat sinks Cooling Environmental and operating conditions Many microelectronics components are designed with a predetermined thermal pathway inside their packages
4 Introduction 4 Some classical methods for dissipating heat... PCB attached on heat sink PCB with thick copper layers
5 Methods for dissipating heat from printed circuit boards 5 Introduction of local copper coins Full Size Heatsink Local Heat Dissipation Internal External Thermal Vias Local Cu-Coin Metal-Core Layers Pre-bonded (e. g. IMS) Bonded Cu-Coin Thick-Copper Layers Post-bonded Embedded Cu-Coin Press-Fit Cu-Coin Local dissipation of heat loss by integration of copper coins
6 Local dissipation of heat loss by integration of copper coins 6 Adhesive bonded copper coin Adhesive Copper Coin Copper coin is bonded to the circuit board by adhesive (conductive or non-conductive) Alternative for soldered coins: - Increased reliability and flatness - No solder residues or undesired solder flow Feasible for double sided SMT assembly Feasible for lead-free soldering Very flexible in the design No special assembly processes required Coin can have cavity Copper Coin Adhesive preform
7 Local dissipation of heat loss by integration of copper coins 7 Example: Adhesive bonded copper coin with a flange The flange spreads the heat and enables a better thermal connection to a heat sink (enlargement of the surface area)
8 Local dissipation of heat loss by integration of copper coins 8 Embedded copper coin Copper Coin The coin is fully integrated in the layer construction of the PCB The surface of the copper coin can be in plane with both surfaces of the circuitry SMT power devices can be assembled easily Reliable and robust Coin can be connected to the circuitry either by vias and/or copper metallisation on the surface layers
9 Local dissipation of heat loss by integration of copper coins 9 Example: Embedded copper coin with cavity Bottom view Top view Copper metallisation connects coins with PCB Micro section The more layers the more difficult to control the proper fitting of the coin inside the PCB construction
10 Local dissipation of heat loss by integration of copper coins 10 Press-fitted copper coin Cu-Coin Very high thermal conductivity Very high robustness and reliability Strong press-fitting (push-out force typ. > 500 N) Copper coin can be electrically connected by edge metallisation (good grounding) Coin design can be matched for component footprint Can be placed nearly under any electrical component Already in practice in automotive electronics, telecom infrastructure, industrial electronics and defence
11 Local dissipation of heat loss by integration of copper coins 11 Example: Press-fitted copper coins for components with QFN and QFP packages Coins with dia. of 3 mm Coins with dia. of 2 mm The design of the coins and the integration require some specific know how. Therefore, a technical dialogue between PCB designer and manufacturer is needed and recommended.
12 Local dissipation of heat loss by integration of copper coins 12 Thermal vias vs. copper coin Example: Thermal conductivity of a thermal array of 5 mm x 5 mm Thermal-Via array of 5 mm x 5 mm with 25 Thermal-Vias of Ø 0.5 mm Thermal Pad of 5 mm x 5 mm with 1 Copper Coin of Ø 4 mm l = 14.5 W/mK R th = 4.14 K/W l = 194 W/mK R th = 0.31 K/W
13 Local dissipation of heat loss by integration of copper coins 13 How about filled thermal vias? Example: Thermal conductivity of a thermal array of 5 mm x 5 mm In practise a void-free filling of vias is very difficult to achieve A filling of vias with electrolytic deposited copper in mass production is only feasible at a low aspect ratio (typ. 1:1) Some figures... Vias plated with a 25 µm thick Cu barrel Vias plated with a 27 µm thick Cu barrel Vias plated with a 30 µm thick Cu barrel Vias (25 µm thick Cu) filled with conductive Silver paste Vias (25 µm thick Cu) filled with Solder l W/mK R th K/W copper coin, Ø 4 mm
14 Local dissipation of heat loss by integration of copper coins 14 Risks associated with thermal via arrays The vias of a thermal via array may cause voids under a component package Example: QFN package soldered onto a thermal via array Large voids appearing inside the solder joint between the thermal pad of the component and the thermal via array of the PCB Voids are caused by solder wicking into the holes The voids are significantly increasing the thermal resistance in the heat dissipation pathway Tenting or plugging of vias may be considered (increasing costs) Source: Indium Corporation
15 Local dissipation of heat loss by integration of copper coins 15 Comparison: Thermal vias vs. Copper coin - Thermographic images Thermal Vias Copper Coin Note: A reduction of the component temperature by 10 C can double the component life time (Rule of Arrhenius)
16 Further designs of copper coins 16 Example: Copper coin with cavity for component insertion RF power transistor in SOT-502 package with straight leads High mechanical precision for a perfect integration of the electronic component
17 Further designs of copper coins 17 Chip-on-Coin: Bare die attachment on copper coins Higher miniaturisation Cost reduction of expensive packages Higher efficiency Lower number of thermal interfaces Reduced thermal resistance in the thermal pathway CTE matching by selected coin materials
18 Further designs of copper coins 18 Chip-on-Coin: Bare die attachment on copper coins Thermal interfaces in the thermal pathway with housed components: Copper Coin Chip Die Attach Paste Thermal Flange Solder Coin Thermal interfaces in the thermal pathway with bare die attachment: Chip Die Attach Paste Coin Bare die attached on Cu coin For bare die attachment on PCBs low temperature sintering compounds based Copper Coin on nano-scaled silver particles are available
19 Further designs of copper coins 19 Rigid-flexible circuit boards with integrated copper coins The solid copper coin provides approx. 10 times higher thermal conductivity than thermal via arrays High push-out forces: typ. > 500 N to 1000 N Suitable for circuit thicknesses 0.8 mm Size of coins: from ca. Ø 2 mm to 40 mm x 40 mm Very robust and reliable
20 RF power module pallets 20 The pallets include already the complete bias network for an application First product launched by NXP (BLS6G2933P-200) Plug-and-Play modules using special materials matching CTE values of packaging and die
21 Tailored coin design 21 The design of the coins are customised to match perfectly to the footprint of the components and the entire system Selection of the coin attachment (e. g. bonded, embedded or press-fit) SES provides design proposal based on the component footprint and system considerations Tolerance evaluation Design optimisation if necessary Surface finishes as required Prototypes usually machined Choice of suitable methods for mass production (e. g. punching, milling or combinations)
22 Tailored coin design 22 Example: Copper coin design for QFN packages Component Footprint Concept Real product
23 Reliability 23 Summary of some reliability test results. More data available upon request. Test Parameter Result Lead-free reflow soldering (10 x) J-STD-003A passed Thermal shock 100 cycles: - 55 C to C 1000 cycles: - 55 C to C passed Thermal stress 6 x 10 sec. on 288 C solder float bath passed Ageing (Temperature storage) 1000 h at 125 C passed Electrochemical migration (Humidity storage) 1000 h at 85 C and 85 % r. h. passed Delamination test Push-out force pre-cond. 72 h at 40 C, 92 % r. H. solder stress 20 sec. at 288 C typ. > 500 N (dep. on coin design and size) passed passed
24 Reliability 24 Measurement of Push-Out Force A high push-out force of the coin is required for assembly and further installation
25 Reliability 25 Measurement of Contact Resistance Very low resistance added to the current return loop Contact resistance of the coins << R DSON of the power transistors
26 Conclusion 26 Electronics cooling is becoming a more important subject with continuing miniaturisation and increasing functionality Standard techniques such as thermal via arrays have only a limited thermal conductivity Local copper coins provide a very high thermal conductivity on a small area; their thermal conductivity is typ. about 10 times higher compared to thermal via arrays of similar sizes Local copper coins are reducing weight and costs compared to conventional attached heat sinks and providing the opportunity of assembling components on both sides of the PCB Simplifying assembly process, increasing first pass yield The integration of local copper coins into the PCB constructions is an established process PCB s with integrated local copper coins are very reliable and robust The designs of the copper coins are very flexible, can be tailored for specific components and requirements and are also suitable for direct die attach
27 Thank you very much for your attention.
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