Failure Modes and Effect Analysis (FMEA) for Semiconductor Industry

Transcription

1 Failure Modes and Effect Analysis (FMEA) for Semiconductor Industry This program is sponsored by: Kulim Hi-Tech Park Conducted by: DreamCatcher Consulting Sdn Bhd

2 Failure Modes and Effect Analysis (FMEA) for Semiconductor Industry SYPNOSIS The elimination, control, or reduction of risk is a total commitment by the entire organization, and it is more often than not the responsibility of the engineering department. Today, the focus is on prevention, and the emphasis is to minimize the probability of failure or to minimize the effect of failure. In order to achieve this focus, FMEA is commonly used. It is an analytical technique used by engineers to ensure that potential problems have been considered and addressed. It is a summary of the engineer's thoughts as he or she designs a component or a system, or develops a process. It can also be applied to non-production areas. It can also help to improve the quality and reliability of products and processes. Thus, maintain a competitive edge of a company. In this course, the various type of FMEAs, their steps in performing the FMEAs, the common problems encountered, and the recent advancement in FMEA are discussed. Case studies are given to illustrate the successfulness of FMEA in industries. WHO SHOULD ATTEND Design Manager and Engineers Process Manager and Engineers Quality Manager and Engineers PEREQUISITE None. COURSE METHODOLOGY This course is presented classroom style, with case studies to illustrate the concepts taught. COURSE DURATION 2 days, 9am - 5pm

3 COURSE STRUCTURE DAY 1 Overview of FMEA Introduction; Failure definition, Potential failure modes; Failure mode and effects analysis; Applications; Background; FMEA Team; Documentation; Benefits Design FMEA Introduction; Design Failure Modes; Design FMEA; Applications; Benefits; Getting Started; Key Elements; Specific questions in the course of performing a design FMEA; Design FMEA form and Steps of Design FMEA; Overview of Ranking; Risk Priority Number (Overview). Design review and Design FMEA. Reduction of Design iteration cycles. Process FMEA Introduction; Process failure modes; Process FMEA; Applications; Benefits; Process FMEA team; Getting Started; Process FMEA form and Steps for Process FMEA. Process Control Plan and Process FMEA Establishing process control plan through process FMEA. Build in Quality, Yield improvement. DAY 2 Advanced Techniques in FMEA Pareto Ranking approach to FMEA; Probabilistic and Matrix approach to FMEA. Real Applications of FMEA in Industry FMEA in product development; reliability improvement; continuous FMEA improvement; quality cost; reliability qualification; manufacturing process improvement; yield improvement. FMEA and Build in Reliability Importance of build-in reliability; basic of quality function deployment (QFD); Integration of QFD and FMEA; Making FMEA more objective and quantitative; Application of FMEA to build-in reliability. COURSE INSTRUCTOR(S) Assoc Prof. Dr Tan Cher Ming Dr. Tan received his B.Eng degree (Hons) in Electrical Engineering from National University of Singapore in 1984, and the M.A.Sc degree and Ph.D degree in Electrical Engineering from the University of Toronto, Canada in 1988 and 1992 respectively. He is currently an IEEE Distinguished lecturer in the Electronic Device Society, Founding Chapter Chair of IEEE Nanotechnology Chapter, Immediate past chair of the IEEE Singapore Section, a senior member of IEEE, Fellow of Singapore Quality Institute, Chairman of the Certified Reliability Engineer Board in Singapore Quality Institute, Senior Scientist of Singapore Institute of Manufacturing Technology and Faculty

4 Associate of Institute of Microelectronic, Singapore. He is also listed in the Who's Who in Science and Engineering as well as Who' Who in the World due to his achievement in Science and Engineering. He has also been elected to be in the Research Board of Advisors in the American Biographical Institute and the International Educator of the Year 2003 by the International Biographical Center, Cambridge, England. He has organized many international conferences, and served as the Chair person for a few international conferences such as SPIE International Symposium on Reliability, IEEE Conference on Integrated Circuits and Systems etc. He is now the Conference General Chair of the IEEE International Conference on Nanoelectronics. He has also given several invited talks and keynote speech to several international conferences on reliability. He is a guest editor of the International Journal of Nanotechnology, and serves in the reviewer board of many international Journals. Upon completion of his Ph.D degree in 1992, he worked in Taiwan for 5 years as a Quality and Reliability Manager as well as Engineering Principal Consultant in LiteOn Power Semiconductor Corp. He has turned around the quality system of the entire company and her subsidiaries in China and US, and introduced a new outgoing quality inspection system which was the first of its kind in Asia, and attracted a number of large MNC as her customers, including Motorola, General Electric etc. In 1996, he joined Chartered Semiconductor Manufacturing Ltd in Singapore as a Quality and Reliability Section Manager. In Apr 1997, he joined the Nanyang Technological University as a lecturer in the School of Electrical and Electronic Engineering, teaching final year and master year students on IC reliability and failure analysis. He is now an Associate Professor in the same University. His current research areas are mainly quality and reliability related. They are Reliability statistics, Reliability Physics and Test Methodology, and Quality Engineering such as QFD. He also works on Silicon-On-Insulator Structure Fabrication Technology. He has more than 150 profession publications as of Dec He is also invited to write a book on Interconnect reliability to be published by the World Scientific Publisher, USA. He is active in providing consultation to many MNC in reliability and maintainability. Some companies that he has provided consultation are IBM, Motorola, Olympus, Infineon, Philips etc.

5 Course Title [Code] REGISTRATION FORM PUBLIC TRAINING PROGRAM Failure Modes and Effect Analysis (FMEA) for Semiconductor Industry Duration 2 days Date 25 th -26 th Aug 2010 Information Technology Centre, Venue Kulim Hi-Tech Park Kulim, Kedah. COMPANY INFORMATION Company Name / Address Contact Person Designation Tel Fax PARTICIPANT/S No. Name Designation IC Number tn Signature : Company Stamp Date: Kindly fax / your registration form before For further information please call Eunice Ooi/ Celine Chang at /7112 Or euniceooi@dreamcatcher.asia/ celine@dreamcacther.asia or fax: