MC14538B. Dual Precision Retriggerable/Resettable Monostable Multivibrator

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MC438 Dual Precision Retriggerable/Resettable Monostable Multivibrator The MC438 is a dual, retriggerable, resettable monostable multivibrator.

1 MC438 Dual Precision Retriggerable/Resettable Monostable Multivibrator The MC438 is a dual, retriggerable, resettable monostable multivibrator. It may be triggered from either edge of an input pulse, and produces an accurate output pulse over a wide range of widths, the duration and accuracy of which are determined by the external timing components, and R X. Output Pulse Width T = R X (secs) R X = = Farads Features Unlimited Rise and Fall Time llowed on the Trigger Input Pulse Width Range = s to s Latched Trigger Inputs Separate Latched Reset Inputs 3. Vdc to 8 Vdc Operational Limits Triggerable from Positive ( Input) or NegativeGoing Edge (Input) Capable of Driving Two LowPower TTL Loads or One LowPower Schottky TTL Load Over the Rated Temperature Range Pinforpin Compatible with MC48 and CD48 (CD498) Use the MC4/74HC438 for Pulse Widths Less Than s with Supplies Up to 6 V PbFree Packages are vailable* MXIMUM RTINGS (Voltages Referenced to ) Symbol Parameter Value Unit DC Supply Voltage Range. to +8. V V in, V out Input or Output Voltage Range (DC or Transient). to +. V I in, I out P D Input or Output Current (DC or Transient) per Pin Power Dissipation, per Package (Note ) ± m mw T Operating Temperature Range to + C T stg Storage Temperature Range 6 to + C T L Lead Temperature (8Second Soldering) 6 C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.. Temperature Derating: Plastic P and D/DW Packages: 7. mw/ C From 6 C To C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, V in and V out should be constrained to the range (V in or V out ). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either or ). Unused outputs must be left open. WL, L YY, Y WW, W G PDIP6 P SUFFIX CSE 648 SOIC6 D SUFFIX CSE 7 SOIC6 DW SUFFIX CSE 7G TSSOP6 DT SUFFIX CSE 948F SOEIJ6 F SUFFIX CSE 966 MRKING DIGRMS MC438CP WLYYWWG MC438 LYWG = ssembly Location = Wafer Lot = Year = Work Week = PbFree Indicator ORDERING INFORMTION See detailed ordering and shipping information in the package dimensions section on page of this data sheet. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D G WLYWW 438G WLYYWW 4 38 LYW Semiconductor Components Industries, LLC, ugust, Rev. 7 Publication Order Number: MC438/D

2 MC438 PIN SSIGNMENT LOCK DIGRM /R X /R X 4 RX RX ns MC48 MC436 MC438 MC44 MC438* ONESHOT SELECTION GUIDE s s s ms ms ms s s 3 HR MIN. 3 4 R X ND RE EXTERNL COMPONENTS. ММ = PIN 6 ММ = PIN 8, PIN, PIN 9 *LIMITED OPERTING VOLTGE ( 6 V) TOTL OUTPUT PULSE WIDTH RNGE RECOMMENDED PULSE WIDTH RNGE ORDERING INFORMTION Device Package Shipping MC438CP PDIP6 Units / Rail MC438CPG PDIP6 (PbFree) Units / Rail MC438D SOIC6 48 Units / Rail MC438DG SOIC6 (PbFree) 48 Units / Rail MC438DR SOIC6 Units / Tape & Reel MC438DRG SOIC6 (PbFree) Units / Tape & Reel MC438DW SOIC6 W 47 Units / Rail MC438DWR SOIC6 W Units / Tape & Reel MC438DWRG SOIC6 W (PbFree) Units / Tape & Reel MC438DTR TSSOP6* Units / Tape & Reel MC438F SOEIJ6 Units / Rail MC438FG SOEIJ6 (PbFree) Units / Rail MC438FEL SOEIJ6 Units / Tape & Reel MC438FELG SOEIJ6 (PbFree) Units / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications rochure, RD8/D. *This package is inherently PbFree.

3 MC438 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ELECTRICL CHRCTERISTICS (Voltages Referenced to ) Characteristic Output Voltage V in = or Level Symbol Vdc V OL V Level V in = or OH Input Voltage Level (V O = 4. or. Vdc) (V O = 9. or. Vdc) (V O = 3. or. Vdc) (V O =. or 4. Vdc) (V O =. or 9. Vdc) (V O =. or 3. Vdc) Level Output Drive Current (V OH =. Vdc) Source (V OH = 4.6 Vdc) (V OH = 9. Vdc) (V OH = 3. Vdc) (V OL =.4 Vdc) Sink (V OL =. Vdc) (V OL =. Vdc) V IL V IH I OH I OL C C C Min Max Min Typ (Note ) Max Min Max Input Current, Pin or 4 I in ±. ±. ±. ±. dc Input Current, Other Inputs I in ±. ±. ±. ±. dc Input Capacitance, Pin or 4 C in pf Input Capacitance, Other Inputs (V in = ) uiescent Current (Per Package) = Low, = High uiescent Current, ctive State (oth) (Per Package) = High, = Low Total Supply Current at an external load capacitance ( ) and at external timing network (R X, ) (Note 3) C in 7. pf I DD I DD I T I T = (3. x ) R X f + 4 f + x f I T = (8. x ) R X f + 9 f + x f I T = (. x ) R X f + f + 3 x f where: I T in (one monostable switching only), where: in F, in pf, R X in k ohms, and where: f in Hz is the input frequency.. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. 3. The formulas given are for the typical characteristics only at C Unit Vdc Vdc Vdc Vdc mdc mdc dc mdc dc 3

4 MC438 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ SWITCHING CHRCTERISTICS (Note 4) ( = pf, T = C) Characteristic Output Rise Time t TLH = (.3 ns/pf) + 33 ns t TLH = (.6 ns/pf) + ns t TLH = (.4 ns/pf) + ns Output Fall Time t THL = (.3 ns/pf) + 33 ns t THL = (.6 ns/pf) + ns t THL = (.4 ns/pf) + ns Propagation Delay Time or to or t PLH, t PHL = (.9 ns/pf) + ns t PLH, t PHL = (.36 ns/pf) + 3 ns t PLH, t PHL = (.6 ns/pf) + 87 ns Reset to or t PLH, t PHL = (.9 ns/pf) + ns t PLH, t PHL = (.36 ns/pf) + 7 ns t PLH, t PHL = (.6 ns/pf) + 8 ns Input Rise and Fall Times Reset Symbol Vdc t TLH t THL t PLH, t PHL t r, t f Input Input Input Pulse Width,, or Reset t WH, t WL Retrigger Time t rr Output Pulse Width or Refer to Figures 8 and 9 =. F, R X = k =. F, R X = k = F, R X = k Pulse Width Match between circuits in the same package. =. F, R X = k T [(T T )/T ] Min ll Types Typ (Note ) No Limit The formulas given are for the typical characteristics only at C.. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ OPERTING CONDITIONS External Timing Resistance R X (Note 6) k External Timing Capacitance No Limit (Note 7) F 6. The maximum usable resistance R X is a function of the leakage of the capacitor, leakage of the MC438, and leakage due to board layout and surface resistance. Susceptibility to externally induced noise signals may occur for R X > M.. 7. If > F, use discharge protection diode per Fig ±. ±. ±. Max ± ± ± Unit ns ns ns ns s ms ns ns s ms s % 4

5 MC438 P R X (4) () N ENLE + + C C V ref ENLE V ref R OUTPUT LTCH S 6 () 7 (9) 4 () () 3 (3) CONTROL R S LTCH R R NOTE: Pins, 8 and must be externally grounded Figure. Logic Diagram (/ of DevIce Shown) pf I D. F CERMIC R X R X V in CX /R X ns ns 9% V % in V Figure. Power Dissipation Test Circuit and Waveforms INPUT CONNECTIONS R X R X * = pf Characteristics Reset t PLH, t PHL, t TLH, t THL, PG T, t WH, t WL PULSE GENERTOR PULSE GENERTOR PULSE GENERTOR /R X t PLH, t PHL, t TLH, t THL, PG T, t WH, t WL t PLH(R), t PHL(R), PG3 PG PG t WH, t WL *Includes capacitance of probes, wiring, and fixture parasitic. NOTE: Switching test waveforms for PG, PG, PG3 are shown In Figure 4. PG = PG = PG3 = Figure 3. Switching Test Circuit

6 MC438 % t WH t TLH 9% % t THL % % t THL 9% % t TLH t PLH T % % % t WL t THL t PHL t PLH t THL ttlh t PHL t WL 9% % 9% % % % t rr t PHL t PHL t TLH t THL t PLH % % 9% % % % Figure 4. Switching Test Waveforms RELTIVE FREUENCY OF OCCURRENCE T = C R X = k =. F 4 4 T, OUTPUT PULSE WIDTH (%) % POINT PULSE WIDTH = V, T = 9.8 ms = V, T = ms = V, T =. ms NORMLIZED PULSE WIDTH CHNGE WITH RESPECT TO VLUE T = V (%) 6 7 R X = k =. F 8 9, SUPPLY VOLTGE (VOLTS) 3 4 Figure. Typical Normalized Distribution of Units for Output Pulse Width Figure 6. Typical Pulse Width Variation as a Function of Supply Voltage FUNCTION TLE TOTL SUPPLY CURRENT ( μ ). R X = k, = pf ONE MONOSTLE SWITCHING ONLY V = V V Inputs Outputs Reset H H H L H L Not Triggered H H Not Triggered H L, H, H Not Triggered H L L, H, Not Triggered L X X L H X X Not Triggered.... OUTPUT DUTY CYCLE (%) Figure 7. Typical Total Supply Current versus Output Duty Cycle 6

7 MC438 = V (%) TYPICL NORMLIZED ERROR WITH RESPECT TO C VLUE T R X = k =. F = V = V = V T, MIENT TEMPERTURE ( C) = V (%) TYPICL NORMLIZED ERROR WITH RESPECT TO C VLUE T = V = V = V R X = k =. F T, MIENT TEMPERTURE ( C) Figure 8. Typical Error of Pulse Width Equation versus Temperature Figure 9. Typical Error of Pulse Width Equation versus Temperature THEORY OF OPERTION 3 4 V ref V ref V ref V ref /R X V ref V ref V ref V ref T T T Positive edge trigger 4 Positive edge retrigger (pulse lengthening) Negative edge trigger Positive edge retrigger (pulse lengthening) 3 Positive edge trigger Figure. Timing Operation 7

8 MC438 TRIGGER OPERTION The block diagram of the MC438 is shown in Figure, with circuit operation following. s shown in Figure and, before an input trigger occurs, the monostable is in the quiescent state with the output low, and the timing capacitor completely charged to. When the trigger input goes from to (while inputs and Reset are held to ) a valid trigger is recognized, which turns on comparator C and Nchannel transistor N ➀. t the same time the output latch is set. With transistor N on, the capacitor rapidly discharges toward until V ref is reached. t this point the output of comparator C changes state and transistor N turns off. Comparator C then turns off while at the same time comparator C turns on. With transistor N off, the capacitor begins to charge through the timing resistor, R X, toward. When the voltage across equals V ref, comparator C changes state, causing the output latch to reset ( goes low) while at the same time disabling comparator C ➁. This ends at the timing cycle with the monostable in the quiescent state, waiting for the next trigger. In the quiescent state, is fully charged to causing the current through resistor R X to be zero. oth comparators are off with total device current due only to reverse junction leakages. n added feature of the MC438 is that the output latch is set via the input trigger without regard to the capacitor voltage. Thus, propagation delay from trigger to is independent of the value of, R X, or the duty cycle of the input waveform. RETRIGGER OPERTION The MC438 is retriggered if a valid trigger occurs ➂ followed by another valid trigger ➃ before the output has returned to the quiescent (zero) state. ny retrigger, after the timing node voltage at pin or 4 has begun to rise from V ref, but has not yet reached V ref, will cause an increase in output pulse width T. When a valid retrigger is initiated ➃, the voltage at /R X will again drop to V ref before progressing along the RC charging curve toward. The output will remain high until time T, after the last valid retrigger. OPERTION The MC438 may be reset during the generation of the output pulse. In the reset mode of operation, an input pulse on Reset sets the reset latch and causes the capacitor to be fast charged to by turning on transistor P ➄. When the voltage on the capacitor reaches V ref, the reset latch will clear, and will then be ready to accept another pulse. It the Reset input is held low, any trigger inputs that occur will be inhibited and the and outputs of the output latch will not change. Since the output is reset when an input low level is detected on the Reset input, the output pulse T can be made significantly shorter than the minimum pulse width specification. POWERDOWN CONSIDERTIONS Large capacitance values can cause problems due to the large amount of energy stored. When a system containing the MC438 is powered down, the capacitor voltage may discharge from through the standard protection diodes at pin or 4. Current through the protection diodes should be limited to m and therefore the discharge time of the supply must not be faster than ( ). (C)/( m). For example, if = V and = F, the supply should discharge no faster than ( V) x ( F)/( m) = ms. This is normally not a problem since power supplies are heavily filtered and cannot discharge at this rate. When a more rapid decrease of to zero volts occurs, the MC438 can sustain damage. To avoid this possibility use an external clamping diode, D X, connected as shown in Fig.. C x D x R x Figure. Use of a Diode to Limit Power Down Current Surge 8

9 MC438 TYPICL PPLICTIONS RX RX RISINGEDGE TRIGGER RISINGEDGE TRIGGER = = = RX RX = FLLINGEDGE TRIGGER = FLLINGEDGE TRIGGER = Figure. Retriggerable Monostables Circuitry Figure 3. NonRetriggerable Monostables Circuitry NC C D NC NC Figure 4. Connection of Unused Sections 9

10 MC438 PCKGE DIMENSIONS PDIP6 P SUFFIX PLSTIC DIP PCKGE CSE 6488 ISSUE T NOTES:. DIMENSIONING ND TOLERNCING PER NSI Y4.M, 98.. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEDS WHEN FORMED PRLLEL. 4. DIMENSION DOES NOT INCLUDE MOLD FLSH.. ROUNDED CORNERS OPTIONL. H G F D 6 PL S C K. (.) M T T SETING PLNE M J L M INCHES MILLIMETERS DIM MIN MX MIN MX C D F G. SC.4 SC H. SC.7 SC J K L M S..4.. SOIC6 D SUFFIX PLSTIC SOIC PCKGE CSE 7 ISSUE J P 8 PL. (.) M S NOTES:. DIMENSIONING ND TOLERNCING PER NSI Y4.M, 98.. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS ND DO NOT INCLUDE MOLD PROTRUSION. 4. MXIMUM MOLD PROTRUSION. (.6) PER SIDE.. DIMENSION D DOES NOT INCLUDE DMR PROTRUSION. LLOWLE DMR PROTRUSION SHLL E.7 (.) TOTL IN EXCESS OF THE D DIMENSION T MXIMUM MTERIL CONDITION. T SETING PLNE G K C D 6 PL. (.) M T S S M R X 4 J F MILLIMETERS INCHES DIM MIN MX MIN MX C D F G.7 SC. SC J K M 7 7 P R....9

11 MC438 PCKGE DIMENSIONS SOIC6 W DW SUFFIX PLSTIC SOIC PCKGE CSE 7G3 ISSUE C 8X H. M M D 6 9 E 8 6X. M T S S h X 4 NOTES:. DIMENSIONS RE IN MILLIMETERS.. INTERPRET DIMENSIONS ND TOLERNCES PER SME Y4.M, DIMENSIONS D ND E DO NOT INLCUDE MOLD PROTRUSION. 4. MXIMUM MOLD PROTRUSION. PER SIDE.. DIMENSION DOES NOT INCLUDE DMR PROTRUSION. LLOWLE DMR PROTRUSION SHLL E.3 TOTL IN EXCESS OF THE DIMENSION T MXIMUM MTERIL CONDITION. MILLIMETERS DIM MIN MX C.3.3 D..4 E e.7 SC H.. h..7 L..9 q 7 4X e T SETING PLNE C L. (.6) T. (.6) T. (.4) T SETING PLNE L U PIN IDENT. U D S S X L/ C 6X K REF V G TSSOP6 DT SUFFIX PLSTIC TSSOP PCKGE CSE 948F ISSUE. (.4) M T U S V S U N H J N J F DETIL E DETIL E K K ÇÇÇ ÉÉÉ SECTION NN. (.) M W NOTES:. DIMENSIONING ND TOLERNCING PER NSI Y4.M, 98.. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION DOES NOT INCLUDE MOLD FLSH. PROTRUSIONS OR GTE URRS. MOLD FLSH OR GTE URRS SHLL NOT EXCEED. (.6) PER SIDE. 4. DIMENSION DOES NOT INCLUDE INTERLED FLSH OR PROTRUSION. INTERLED FLSH OR PROTRUSION SHLL NOT EXCEED. (.) PER SIDE.. DIMENSION K DOES NOT INCLUDE DMR PROTRUSION. LLOWLE DMR PROTRUSION SHLL E.8 (.3) TOTL IN EXCESS OF THE K DIMENSION T MXIMUM MTERIL CONDITION. 6. TERMINL NUMERS RE SHOWN FOR REFERENCE ONLY. 7. DIMENSION ND RE TO E DETERMINED T DTUM PLNE W. MILLIMETERS INCHES DIM MIN MX MIN MX C..47 D....6 F G.6 SC.6 SC H J J K K L 6.4 SC. SC M 8 8

12 MC438 PCKGE DIMENSIONS SOEIJ6 F SUFFIX PLSTIC EIJ SOIC PCKGE CSE 966 ISSUE O e 6 9 Z b D H E.3 (.) M. (.4) 8 E VIEW P M L E L DETIL P c NOTES: М. DIMENSIONING ND TOLERNCING PER NSI Y4.M, 98. М. CONTROLLING DIMENSION: MILLIMETER. М 3. DIMENSIONS D ND E DO NOT INCLUDE MOLD FLSH OR PROTRUSIONS ND RE MESURED T THE PRTING LINE. MOLD FLSH OR PROTRUSIONS SHLL NOT EXCEED. (.6) PER SIDE. М 4. TERMINL NUMERS RE SHOWN FOR REFERENCE ONLY. М. THE LED WIDTH DIMENSION (b) DOES NOT INCLUDE DMR PROTRUSION. LLOWLE DMR PROTRUSION SHLL E.8 (.3) TOTL IN EXCESS OF THE LED WIDTH DIMENSION T MXIMUM MTERIL CONDITION. DMR CNNOT E LOCTED ON THE LOWER RDIUS OR THE FOOT. MINIMUM SPCE ETWEEN PROTRUSIONS ND DJCENT LED TO E.46 (.8). MILLIMETERS INCHES DIM MIN MX MIN MX b c D E..4.. e.7 SC. SC H E L L E M Z.78.3 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should uyer purchase or use SCILLC products for any such unintended or unauthorized application, uyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PULICTION ORDERING INFORMTION LITERTURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. ox 63, Phoenix, rizona 883 US Phone: or Toll Free US/Canada Fax: or Toll Free US/Canada orderlit@onsemi.com N. merican Technical Support: 8898 Toll Free US/Canada Japan: ON Semiconductor, Japan Customer Focus Center 9 Kamimeguro, Meguroku, Tokyo, Japan 3 Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative. MC438/D

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