Parameter Symbol Value Unit DC Supply Voltage Range V DD 0.5 to V Input or Output Voltage Range (DC or Transient)

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MC4490 Hex Contact ounce Eliminator The MC4490 is constructed with complementary MOS enhancement mode devices, and is used for the elimination of extraneous level changes that result when interfacing

1 MC4490 Hex Contact ounce Eliminator The MC4490 is constructed with complementary MOS enhancement mode devices, and is used for the elimination of extraneous level changes that result when interfacing with mechanical contacts. The digital contact bounce eliminator circuit takes an input signal from a bouncing contact and generates a clean digital signal four clock periods after the input has stabilized. The bounce eliminator circuit will remove bounce on both the make and the break of a contact closure. The clock for operation of the MC4490 is derived from an internal RC oscillator which requires only an external capacitor to adjust for the desired operating frequency (bounce delay). The clock may also be driven from an external clock source or the oscillator of another MC4490 (see Figure 5). NOTE: Immediately after powerup, the outputs of the MC4490 are in indeterminate states. Features Diode Protection on ll Inputs Six Debouncers Per Package Internal Pullups on ll Data Inputs Can e Used as a Digital Integrator, System Synchronizer, or Delay Line Internal Oscillator (RC), or External Clock Source TTL Compatible Data Inputs/Outputs Single Line Input, Debounces oth Make and reak Contacts Does Not Require Form C (Single Pole Double Throw) Input Signal Cascadable for Longer Time Delays Schmitt Trigger on Clock Input (Pin 7) Supply Voltage Range = 3.0 V to 8 V Chip Complexity: 546 FETs or 36.5 Equivalent Gates These Devices are PbFree and are RoHS Compliant NLV Prefix for utomotive and Other pplications Requiring Unique Site and Control Change Requirements; ECQ00 Qualified and PPP Capable PDIP6 P SUFFIX CSE 648 SOIC6 DW SUFFIX CSE 75G SOEIJ6 F SUFFIX CSE WLYYWWG ORDERING INFORMTION See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. 6 = ssembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G = PbFree Package 6 MRKING DIGRMS MC4490P WLYYWWG MC4490 LYWG MXIMUM RTINGS oltages Referenced to V SS ) Parameter Symbol Value Unit DC Supply Voltage Range 0.5 to +8.0 V Input or Output Voltage Range (DC or Transient) V in, V out 0.5 to Input Current (DC or Transient) per Pin I in ±0 m Power Dissipation, per Package (Note ) P D 500 mw mbient Temperature Range T 55 to +25 C Storage Temperature Range T stg 65 to +50 C Lead Temperature (8Second Soldering) T L 260 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Temperature Derating: Plastic P and D/DW Packages: 7.0 mw/ C From 65 C To 25 C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, V in and V out should be constrained to the range V SS in or V out ). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V SS or ). Unused outputs must be left open. V Semiconductor Components Industries, LLC, 203 May, 203 Rev. 0 Publication Order Number: MC4490/D

2 MC4490 PIN SSIGNMENT in 6 out 2 5 out C in 3 4 in D out 4 3 C out E in 5 2 D in F out 6 E out 7 0 F in V SS 8 9 LOCK DIGRM + in DT 4-IT STTIC SHIFT REGISTER SHIFT LOD /2-IT DELY 5 out 7 9 OSCILLTOR ND TWO-PHSE CLOCK GENERTOR φ φ 2 φ φ 2 φ φ 2 φ φ 2 = PIN 6 V SS = PIN 8 in 4 IDENTICL TO OVE STGE 2 out φ φ 2 C in 3 IDENTICL TO OVE STGE 3 C out φ φ 2 D in 2 IDENTICL TO OVE STGE 4 D out φ φ 2 E in 5 IDENTICL TO OVE STGE E out φ φ 2 F in 0 IDENTICL TO OVE STGE 6 F out 2

3 MC4490 ELECTRICL CHRCTERISTICS oltages Referenced to V SS ) 55 C 25 C ÎÎ 25 C ÎÎ Characteristic Symbol Vdc Min Max Î Typ Î Min (Note 2) Max Min Max Unit Output Voltage 0 Level V OL Î V in = or Î Î Vdc Level V V in = 0 or Î OH Vdc Î Î Input Voltage 0 Level V O = 4.5 or 0.5 Vdc) Î IL Vdc O = 9.0 or.0 Vdc) O Î Î = 3.5 or.5 Vdc) O = 0.5 or 4.5 Vdc) Level Î V O =.0 or 9.0 Vdc) IH Î O =.5 or 3.5 Vdc) Î Î 7.0 Vdc Output Drive Current I Oscillator Output SourceÎ OH mdc Î OH = 2.5 V) Pin OH = 4.6 V) 0.2 Î Î 0.08 OH = 9.5 V) Î Î 0.6 OH = 3.5 V) Debounce Outputs Î OH = 2.5 V) Pins 2, 4, 6, OH 0.9 Î Î 0.6 = 4.6 V), 3, OH = 9.5 V) Î 0.5.2Î 0.4 OH = 3.5 V) Oscillator Output SinkÎ I OL = 0.4 V) Pin 9Î OL mdc OL = 0.5 V) 0.36 OL =.5 V) ÎÎ Debounce Outputs OL Î = 0.4 V) Pins 2, 4, 6, OL = 0.5 V), 3, Î Î.8 OL =.5 V) Î 0 35 Î 8. Input Current Î I IH 5 2.0Î 0.2Î 2.0 dc Debounce Inputs in = ) ÎÎ Input Current Oscillator Pin 7 I in = V SS or ) Î in 5 ± 620Î ± 255 ± 400 Î ± 250 dc Pullup Resistor Source Current Î I IL Debounce Inputs 0 in = V SS ) Î Î Î Î dc Input Capacitance Î C in Î Î 7.5 pf Quiescent Current Î I SS in = V SS or, I out = 0 ) 0 ÎÎ dc 5 2. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance

4 MC4490 SWITCHING CHRCTERISTICS (Note 3) (C L = 50 pf, T = 25 C) Î V DD Î Typ Characteristic Symbol Vdc Min (Note 4) Max Unit ÎÎ Output Rise Time t TLH ÎÎ ll Outputs Î 0 80 Î ns Output Fall Time Oscillator Output ÎÎ t THL 0 00 Î ns ÎÎ Debounce Outputs ÎÎ t THL ÎÎ Î 0 60 Î ÎÎ Propagation Delay Time t PHL ÎÎ Oscillator Input to Debounce Outputs Î Î ns ÎÎ t PLH ÎÎ Î Î ÎÎ Clock Frequency (50% Duly Cycle) f cl ÎÎ (External Clock) Î Î MHz Setup Time (See Figure ) t ÎÎ su Î 40 ns Maximum External Clock Input t ÎÎ Rise and Fall Time ÎÎ r, t f 0 ÎÎ No Limit ns Oscillator Input 5 Oscillator Frequency f ÎÎ ÎÎ osc, typ.5 Hz ÎÎ C (in F) ext C ÎÎ ext 00 pf* Î Note: These equations are intended to be a design guide. 0 ÎÎ 4.5 C (in F) ÎÎ Laboratory experimentation may be required. Formulas are typically Î ext ± 5% of actual frequencies Î C (in F) ext 3. The formulas given are for the typical characteristics only at 25 C. 4. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. *POWERDOWN CONSIDERTIONS Large values of C ext may cause problems when powering down the MC4490 because of the amount of energy stored in the capacitor. When a system containing this device is powered down, the capacitor may discharge through the input protection diodes at Pin 7 or the parasitic diodes at Pin 9. Current through these internal diodes must be limited to 0 m, therefore the turnoff time of the power supply must not be faster than t = DD V SS ) C ext /(0 m). For example, If V SS = 5 V and C ext = F, the power supply must turn off no faster than t = (5 V) ( F)/0 m =.5 ms. This is usually not a problem because power supplies are heavily filtered and cannot discharge at this rate. When a more rapid decrease of the power supply to zero volts occurs, the MC4490 may sustain damage. To avoid this possibility, use external clamping diodes, D and D2, connected as shown in Figure 2. out out in t PLH 50% 50% 90% 0% t r t PHL 90% 0% 50% 50% 50% t su Figure. Switching Waveforms t f 0 V 0 V 0 V D C ext D2 7 9 MC4490 Figure 2. Discharge Protection During Power Down 4

5 MC4490 THEORY OF OPERTION The MC4490 Hex Contact ounce Eliminator is basically a digital integrator. The circuit can integrate both up and down. This enables the circuit to eliminate bounce on both the leading and trailing edges of the signal, shown in the timing diagram of Figure 3. Each of the six ounce Eliminators is composed of a 4/2bit register (the integrator) and logic to compare the input with the contents of the shift register, as shown in Figure 4. The shift register requires a series of timing pulses in order to shift the input signal into each shift register location. These timing pulses (the clock signal) are represented in the upper waveform of Figure 3. Each of the six ounce Eliminator circuits has an internal resistor as shown in Figure 4. pullup resistor was incorporated rather than a pulldown resistor in order to implement switched ground input signals, such as those coming from relay contacts and push buttons. y switching ground, rather than a power supply lead, system faults (such as shorts to ground on the signal input leads) will not cause excessive currents in the wiring and contacts. Signal lead shorts to ground are much more probable than shorts to a power supply lead. When the relay contact is closed, (see Figure 4) the low level is inverted, and the shift register is loaded with a high on each positive edge of the clock signal. To understand the operation, we assume all bits of the shift register are loaded with lows and the output is at a high level. t clock edge (Figure 3) the input has gone low and a high has been loaded into the first bit or storage location of the shift register. Just after the positive edge of clock, the input signal has bounced back to a high. This causes the shift register to be reset to lows in all four bits thus starting the timing sequence over again. During clock edges 3 to 6 the input signal has stayed low. Thus, a high has been shifted into all four shift register bits and, as shown, the output goes low during the positive edge of clock pulse 6. It should be noted that there is a 3/2 to 4/2 clock period delay between the clean input signal and output signal. In this example there is a delay of 3.8 clock periods from the beginning of the clean input signal. fter some time period of N clock periods, the contact is opened and at N+ a low is loaded into the first bit. Just after N+, when the input bounces low, all bits are set to a high. t N+2 nothing happens because the input and output are low and all bits of the shift register are high. t time N+3 and thereafter the input signal is a high, clean signal. t the positive edge of N+6 the output goes high as a result of four lows being shifted into the shift register. ssuming the input signal is long enough to be clocked through the ounce Eliminator, the output signal will be no longer or shorter than the clean input signal plus or minus one clock period. The amount of time distortion between the input and output signals is a function of the difference in bounce characteristics on the edges of the input signal and the clock frequency. Since most relay contacts have more bounce when making as compared to breaking, the overall delay, counting bounce period, will be greater on the leading edge of the input signal than on the trailing edge. Thus, the output signal will be shorter than the input signal if the leading edge bounce is included in the overall timing calculation. The only requirement on the clock frequency in order to obtain a bounce free output signal is that four clock periods do not occur while the input signal is in a false state. Referring to Figure 3, a false state is seen to occur three times at the beginning of the input signal. The input signal goes low three times before it finally settles down to a valid low state. The first three low pulses are referred to as false states. If the user has an available clock signal of the proper frequency, it may be used by connecting it to the oscillator input (pin 7). However, if an external clock is not available the user can place a small capacitor across the oscillator input and output pins in order to start up an internal clock source (as shown in Figure 4). The clock signal at the oscillator output pin may then be used to clock other MC4490 ounce Eliminator packages. With the use of the MC4490, a large number of signals can be cleaned up, with the requirement of only one small capacitor external to the Hex ounce Eliminator packages N + N + 3 N + 5 N + 7 OR INPUT OUTPUT CONTCT OPEN CONTCT OUNCING CONTCT CLOSED LID TRUE SIGNL) CONTCT OUNCING CONTCT OPEN Figure 3. Timing Diagram 5

6 MC PULLUP RESISTOR (INTERNL) in FORM CONTCT 7 OSCILLTOR φ ND C ext 9 TWO-PHSE OSC CLOCK GENERTOR φ 2 out DT 4-IT STTIC SHIFT REGISTER SHIFT LOD φ φ 2 /2 IT DELY φ φ 2 5 out Figure 4. Typical Form Contact Debounce Circuit (Only One Debouncer Shown) OPERTING CHRCTERISTICS The single most important characteristic of the MC4490 is that it works with a single signal lead as an input, making it directly compatible with mechanical contacts (Form and ). The circuit has a builtin pullup resistor on each input. The worst case value of the pullup resistor (determined from the Electrical Characteristics table) is used to calculate the contact wetting current. If more contact current is required, an external resistor may be connected between and the input. ecause of the builtin pullup resistors, the inputs cannot be driven with a single standard CMOS gate when is below 5 V. t this voltage, the input should be driven with paralleled standard gates or by the MC4049 or MC4050 buffers. The clock input circuit (pin 7) has Schmitt trigger shaping such that proper clocking will occur even with very slow clock edges, eliminating any need for clock preshaping. In addition, other MC4490 oscillator inputs can be driven from a single oscillator output buffered by an MC4050 (see Figure 5). Up to six MC4490s may be driven by a single buffer. The MC4490 is TTL compatible on both the inputs and the outputs. When is at 4.5 V, the buffered outputs can sink.6 m at 0.4 V. The inputs can be driven with TTL as a result of the internal input pullup resistors. C ext /6 MC NO CONNECTION FROM CONTCTS MC4490 TO SYSTEM LOGIC FROM CONTCTS MC4490 TO SYSTEM LOGIC 7 NO CONNECTION 9 FROM CONTCTS MC4490 TO SYSTEM LOGIC Figure 5. Typical Single Oscillator Debounce System 6

7 MC4490 TYPICL PPLICTIONS SYMMETRICL TIMING In applications where different leading and trailing edge delays are required (such as a fast attack/slow release timer.) Clocks of different frequencies can be gated into the MC4490 as shown in Figure 6. In order to produce a slow attack/fast release circuit leads and should be interchanged. The clock out lead can then be used to feed clock signals to the other MC4490 packages where the asymmetrical input/output timing is required. IN MC4490 MC40 OUT MULTIPLE TIMING SIGNLS s shown in Figure 8, the ounce Eliminator circuits can be connected in series. In this configuration each output is delayed by four clock periods relative to its respective input. This configuration may be used to generate multiple timing signals such as a delay line, for programming other timing operations. One application of the above is shown in Figure 9, where it is required to have a single pulse output for a single operation (make) of the push button or relay contact. This only requires the series connection of two ounce Eliminator circuits, one inverter, and one NOR gate in order to generate the signal as shown in Figures 9 and 0. The signal is four clock periods in length. If the inverter is switched to the output, the pulse will be generated upon release or break of the contact. With the use of a few additional parts many different pulses and waveshapes may be generated. in.e. 5 out EXTERNL CLOCK f C N f C/N 4 in.e. 2 2 out Figure 6. Fast ttack/slow Release Circuit LTCHED OUTPUT The contents of the ounce Eliminator can be latched by using several extra gates as shown in Figure 7. If the latch lead is high the clock will be stopped when the output goes low. This will hold the output low even though the input has returned to the high state. ny time the clock is stopped the outputs will be representative of the input signal four clock periods earlier. 3 C in 2 D in 5.E. 3.E. 4.E C out D out E out E in IN MC4490 OUT 0 F in.e. 6 6 F out CLOCK MC CLOCK LTCH = UNLTCH = 0 Figure 7. Latched Output Circuit Figure 8. Multiple Timing Circuit Connections 7

8 MC4490 IN E OUT IN E 2 CTIVE LOW CTIVE LOW OUT Figure 9. Single Pulse Output Circuit OR INPUT C D E F Figure 0. Multiple Output Signal Timing Diagram 8

9 MC4490 ORDERING INFORMTION MC4490DWG NLV4490DWG* MC4490DWR2G NLV4490DWR2G* MC4490FG Device Package Shipping SOIC6 (PbFree) SOIC6 (PbFree) SOEIJ6 (PbFree) 47 Units / Rail 000 / Tape & Reel 50 Units / Rail MC4490FELG SOEIJ6 (PbFree) 2000 Units / Tape & Reel MC4490PG NLV4490PG* PDIP6 (PbFree) 500 Units / Rail For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications rochure, RD80/D. *NLV Prefix for utomotive and Other pplications Requiring Unique Site and Control Change Requirements; ECQ00 Qualified and PPP Capable. 9

10 MC4490 PCKGE DIMENSIONS PDIP6 CSE ISSUE T NOTES:. DIMENSIONING ND TOLERNCING PER NSI Y4.5M, CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEDS WHEN FORMED PRLLEL. 4. DIMENSION DOES NOT INCLUDE MOLD FLSH. 5. ROUNDED CORNERS OPTIONL. H G F D 6 PL S C K 0.25 (0.00) M T SETING T PLNE M J L M INCHES MILLIMETERS DIM MIN MX MIN MX C D F G 0.00 SC 2.54 SC H SC.27 SC J K L M S SOEIJ6 CSE 9660 ISSUE e 6 9 Z b D H E 0.3 (0.005) M 0.0 (0.004) 8 E VIEW P M L E Q L DETIL P c NOTES:. DIMENSIONING ND TOLERNCING PER NSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D ND E DO NOT INCLUDE MOLD FLSH OR PROTRUSIONS ND RE MESURED T THE PRTING LINE. MOLD FLSH OR PROTRUSIONS SHLL NOT EXCEED 0.5 (0.006) PER SIDE. 4. TERMINL NUMERS RE SHOWN FOR REFERENCE ONLY. 5. THE LED WIDTH DIMENSION (b) DOES NOT INCLUDE DMR PROTRUSION. LLOWLE DMR PROTRUSION SHLL E 0.08 (0.003) TOTL IN EXCESS OF THE LED WIDTH DIMENSION T MXIMUM MTERIL CONDITION. DMR CNNOT E LOCTED ON THE LOWER RDIUS OR THE FOOT. MINIMUM SPCE ETWEEN PROTRUSIONS ND DJCENT LED TO E 0.46 ( 0.08). MILLIMETERS INCHES DIM MIN MX MIN MX b c D E e.27 SC SC H E L L E M Q Z

11 MC4490 PCKGE DIMENSIONS SOIC6 W CSE 75G03 ISSUE D 8X H 0.25 M M D 6 9 E h X 45 NOTES:. DIMENSIONS RE IN MILLIMETERS. 2. INTERPRET DIMENSIONS ND TOLERNCES PER SME Y4.5M, DIMENSIONS D ND E DO NOT INLCUDE MOLD PROTRUSION. 4. MXIMUM MOLD PROTRUSION 0.5 PER SIDE. 5. DIMENSION DOES NOT INCLUDE DMR PROTRUSION. LLOWLE DMR PROTRUSION SHLL E 0.3 TOTL IN EXCESS OF THE DIMENSION T MXIMUM MTERIL CONDITION. 8 6X 0.25 M T S S MILLIMETERS DIM MIN MX C D E e.27 SC H h L q 0 7 L 4X e T SETING PLNE C 6X 0.58 SOLDERING FOOTPRINT.00 6X PITCH DIMENSIONS: MILLIMETERS ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. listing of SCILLC s product/patent coverage may be accessed at SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should uyer purchase or use SCILLC products for any such unintended or unauthorized application, uyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PULICTION ORDERING INFORMTION LITERTURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. ox 563, Denver, Colorado 8027 US Phone: or Toll Free US/Canada Fax: or Toll Free US/Canada orderlit@onsemi.com N. merican Technical Support: Toll Free US/Canada Europe, Middle East and frica Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MC4490/D

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