QFET TM MT3206A. 60V N-Channel MOSFET ! " Absolute Maximum Ratings T C = 25 C unless otherwise noted. Thermal Characteristics

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1 MOS-TECH Semiconductor Co.,LTD 60V N-Channel MOSFET QFET TM General Description These N-Channel enhancem ent m ode power field effect transistors ar e produced using Mos-tech s proprietary, planar stripe, DMOS technology. This advanced technology has been especially t ailored to minimize on-st ate resist ance, provide superior swit ching performance, and wit hstand high energy pulse in t he avalanche and commutation mode. These devices are well suited for low voltage applications such as automotive, DC/ DC conver ters, and high ef ficiency swit ching f or power management in portable and battery operated products. Features 50A, 60V, R DS(on) = = 10 V Low gate charge ( typical 43 nc) Low Crss ( typical 85 pf) Fast switching 100% avalanche tested Improved dv/dt capability 175 C maximum junction temperature rating D! G D S TO-220 G "! " "! "! S Absolute Maximum Ratings T C = 25 C unless otherwise noted Symbol Parameter Units S Drain-Source Voltage 60 V I D Drain Current - Continuous (T C = 25 C) 50 A - Continuous (T C = 100 C) 28 A I DM Drain Current - Pulsed (Note 1) 180 A S Gate-Source Voltage ± 25 V E AS Single Pulsed Avalanche Energy (Note 2) 427 mj I AR Avalanche Current (Note 1) 45 A E AR Repetitive Avalanche Energy (Note 1) 16 mj dv/dt Peak Diode Recovery dv/dt (Note 3) 6.0 V/ns P D Power Dissipation (T C = 25 C) 100 W - Derate above 25 C 0.8 W/ C T J, T STG Operating and Storage Temperature Range -55 to +175 C T L Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 300 C Thermal Characteristics Symbol Parameter Typ Max Units R θjc Thermal Resistance, Junction-to-Case C/W R θcs Thermal Resistance, Case-to-Sink C/W R θja Thermal Resistance, Junction-to-Ambient C/W 2011 MOS-TECH Semiconductor Corporation Rev. A, October 2011

2 Electrical Characteristics T C = 25 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BS Drain-Source Breakdown Voltage = 0 V, I D = 250 µa V BS Breakdown Voltage Temperature / T J Coefficient I D = 250 µa, Referenced to 25 C V/ C I DSS = 60 V, = 0 V µa Zero Gate Voltage Drain Current = 48 V, T C = 150 C µa I GSSF Gate-Body Leakage Current, Forward = 25 V, = 0 V na I GSSR Gate-Body Leakage Current, Reverse = -25 V, = 0 V na On Characteristics (th) Gate Threshold Voltage =, I D = 250 µa V R DS(on) Static Drain-Source V On-Resistance GS = 10 V, I D = 25 A mω g FS Forward Transconductance = 25 V, I D = 25 A (Note 4) S Dynamic Characteristics C iss Input Capacitance = 25 V, = 0 V, pf C oss Output Capacitance f = 1.0 MHz pf C rss Reverse Transfer Capacitance pf Switching Characteristics t d(on) Turn-On Delay Time ns = 30 V, I D = 25 A, t r Turn-On Rise Time R G = 25 Ω ns t d(off) Turn-Off Delay Time ns t f Turn-Off Fall Time (Note 4, 5) ns Q g Total Gate Charge = 48 V, I D = 50 A, nc Q gs Gate-Source Charge = 10 V nc Q gd Gate-Drain Charge (Note 4, 5) nc Drain-Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain-Source Diode Forward Current A I SM Maximum Pulsed Drain-Source Diode Forward Current A V SD Drain-Source Diode Forward Voltage = 0 V, I S = 50 A V t rr Reverse Recovery Time = 0 V, I S = 50 A, ns Q rr Reverse Recovery Charge di F / dt = 100 A/µs (Note 4) nc Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 230µH, I AS = 50A, = 25V, R G = 25 Ω, Starting T J = 25 C 3. I SD 50A, di/dt 300A/µs, BS, Starting T J = 25 C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature 2011 MOS-TECH Semiconductor Corporation Rev. A, October 2011

3 Typical Characteristics I D, Drain Current [A] Top : 15.0 V 10.0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V Note : μ s Pulse Test 2. T C = , Drain-Source Voltage [V] I D, Drain Current [A] , Gate-Source Voltage [V] 1. = 30V μ s Pulse Test Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 0.05 R DS(ON) [Ω ], Drain-Source On-Resistance = 10V = 20V I D, Drain Current [A] Note : T J = 25 Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage I DR, Reverse Drain Current [A] = 0V μ s Pulse Test V SD, Source-Drain voltage [V] Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss = C gd = 30V Capacitance [pf] C oss C iss C rss 1. = 0 V 2. f = 1 MHz, Gate-Source Voltage [V] = 48V Note : I D = 50A , Drain-Source Voltage [V] Figure 5. Capacitance Characteristics Q G, Total Gate Charge [nc] Figure 6. Gate Charge Characteristics 2011 MOS-TECH Semiconductor Corporation Rev. A, October 2011

4 Typical Characteristics (Continued) BS, (Normalized) Drain-Source Breakdown Voltage = 0 V 2. I D = 250 μ A R DS(ON), (Normalized) Drain-Source On-Resistance = 10 V 2. I D = 25 A T J, Junction Temperature [ o C] Figure 7. Breakdown Voltage Variation vs. Temperature T J, Junction Temperature [ o C] Figure 8. On-Resistance Variation vs. Temperature 10 3 Operation in This Area is Limited by R DS(on) I D, Drain Current [A] T C = 25 o C 2. T J = 175 o C 3. Single Pulse DC 10 ms 1 ms 100μ s I D, Drain Current [A] , Drain-Source Voltage [V] T C, Case Temperature [ ] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature Z θ JC (t), Therm al Response 10-1 D= sing le pulse 1. Z θ JC (t) = 1.24 /W M ax. 2. D u t y Fa c t o r, D = t 1 /t 2 3. T JM - T C = P DM * Z θ JC (t) P DM t 1 t t 1, Square Wave Pulse Duration [sec] Figure 11. Transient Thermal Response Curve 2011 MOS-TECH Semiconductor Corporation Rev. A, October 2011

5 Gate Charge Test Circuit & Waveform 12V 200nF 50KΩ 300nF Same Type as DUT 10V Q g Q gs Q gd 3mA DUT Charge Resistive Switching Test Circuit & Waveforms R L 90% R G 10V DUT 10% t d(on) t r t d(off) tf t on t off Unclamped Inductive Switching Test Circuit & Waveforms L 1 E AS = ---- LI 2 2 AS BS BS - I D BS I AS R G I D (t) 10V DUT (t) t p t p Time 2011 MOS-TECH Semiconductor Corporation Rev.A, October 2011

6 Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + _ I SD L Driver R G Same Type as DUT dv/dt controlled by RG I SD controlled by pulse period ( Driver ) Gate Pulse Width D = Gate Pulse Period 10V I FM, Body Diode Forward Current I SD ( DUT ) di/dt I RM Body Diode Reverse Current ( DUT ) Body Diode Recovery dv/dt V SD Body Diode Forward Voltage Drop 2011 MOS-TECH Semiconductor Corporation Rev. A, October 2011

7 Package Dimensions (Continued) TO ± ±0.20 (1.70) 1.30 ±0.10 (8.70) ø3.60 ± ± ± ±0.20 (1.46) (1.00) 1.27 ±0.10 (45 ) (3.00) (3.70) 1.52 ± ± ± MAX. 2.54TYP [2.54 ±0.20] 0.80 ± TYP [2.54 ±0.20] ± ±0.20 Dimensions in Millimeters

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9 MOS-TECH Semiconductor Co.,LTD Cautions 中国 4. ( Keep safety first in your circuit designs! 1. MOS-TECH Semiconductor Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap MOS-TECH Semiconductor Corporation