TSP13N 50M / TSF13N N50M

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1 TSP13N50M / TSF13N50M 600V N-Channel MOSFET General Description This Power MOSFET is produced using True semi s advanced planar stripe DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switched mode power supplies, active power factor correction based on half bridge topology. Features - 13A, 500V, R DS(on) = 0.48Ω@ = 10 V - Low gate charge ( typical 45nC) - High ruggedness - Fast switching - 100% avalanche tested - Improved dv/dt capability D G G D S TO-0 G D S TO-0F S Absolute Maximum Ratings T C = 5 C unless otherwise noted Symbol Parameter TSP13N50M TSF13N50M Units S Drain-Source Voltage 500 V Drain Current - Continuous (T C =5 ) * A - Continuous (T C = 100 ) * A M Drain Current - Pulsed (Note 1) 5 5 * A S Gate-Source Voltage ±30 V EAS Single Pulsed Avalanche Energy (Note ) 860 mj I AR Avalanche Current (Note 1) 13 A E AR Repetitive Avalanche Energy (Note 1) 19.5 mj dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns Power Dissipation (T C = 5 ) W P D - Derate above W/ T J, T STG Operating and Storage Temperature Range -55 to +150 Maximum lead temperature for soldering purposes, T L 1/8" from case for 5 seconds 300 * Drain current limited by maximum junction temperature. Thermal Characteristics Symbol Parameter TSP13N50M TSF13N50M Units R θjc Thermal Resistance, Junction-to-Case /W R θjs Thermal Resistance, Case-to-Sink Typ /W R θja Thermal Resistance, Junction-to-Ambient /W

2 Electrical Characteristics T C = 5 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BS Drain-Source Breakdown Voltage = 0 V, = 50 ua V BS Breakdown Voltage Temperature / T J Coefficient = 50 ua, Referenced to V/ SS Zero Gate Voltage Drain Current = 500 V, = 0 V ua = 400 V, T C = ua I GSSF Gate-Body Leakage Current, Forward = 30 V, = 0 V na I GSSR Gate-Body Leakage Current, Reverse = -30 V, = 0 V na On Characteristics (th) Gate Threshold Voltage =, = 50 ua V R DS(on) Static Drain-Source On-Resistance = 10 V, = 6.5 A Ω g FS Forward Transconductance = 40 V, = 6.5 A (Note 4) S Dynamic Characteristics C iss Input Capacitance pf C oss Output Capacitance = 5 V, = 0 V, f = 1.0 MHz pf C rss Reverse Transfer Capacitance pf Switching Characteristics t d(on) Turn-On Delay Time ns t = 50 V, r Turn-On Rise Time = 13 A, ns R G = 5 Ω t d(off) Turn-Off Delay Time ns (Note 4, 5) t f Turn-Off Fall Time ns Q g Total Gate Charge = 400 V, = 13 A, nc Q gs Gate-Source Charge = 10 V nc Q gd Gate-Drain Charge (Note 4, 5) nc Drain-Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain-Source Diode Forward Current A I SM Maximum Pulsed Drain-Source Diode Forward Current A V SD Drain-Source Diode Forward Voltage = 0 V, I S = 13 A V t rr Reverse Recovery Time = 0 V, I S = 13 A, ns Q rr Reverse Recovery Charge di F / dt = 100 A/us (Note 4) uc Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature. L = 6mH, I AS = 13A, = 50V, R G = 5Ω, Starting T J = 5 C 3. I SD 13A, di/dt 00A/us, BS, Starting T J = 5 C 4. Pulse Test : Pulse width 300us, Duty cycle % 5. Essentially independent of operating temperature

3 ] Typical Characteristics 10 1 Top : 15.0 V 10.0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V 10 1, Drain-Source Voltage [V] 1. 50μ s Pulse Test. T C = 5 Figure 1. On-Region Characteristics o C 5 o C -55 o C 1. = 40V. 50μ s Pulse Test , Gate-Source Voltage [V] Figure. Transfer Characteristics ce R DS(ON) [Ω ], Drain-Source On-Resistanc = = 0V Note : T J = 5 R, Reverse Drain Current [A] = 0V. 50μ s Pulse Test Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage V SD, Source-Drain voltage [V] Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature Capacitance [pf] C iss C oss C rss V Drain-Source Voltage [V] DS C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss = C gd Notes ; 1. = 0 V. f = 1 MHz Figure 5. Capacitance Characteristics e [V], Gate-Source Voltag = 100V = 50V 8 = 400V Note : = 13A Q G, Total Gate Charge [nc] Figure 6. Gate Charge Characteristics

4 Typical Characteristics (Continued) e BS, (Normalized) Drain-Source Breakdown Voltage = 0 V. = 50 μ A T J, Junction Temperature [ o C] Figure 7. Breakdown Voltage Variation vs Temperature R DS(ON), (Normalized) Drain-Source On-Resistance = 10 V. = 6.5 A T J, Junction Temperature [ o C] Figure 8. On-Resistance Variation vs Temperature 10 Operation in This Area Operation in This Area is Limited by R DS(on) 10 is Limited by R DS(on) 10 s 1 ms ms 100 ms 1. T C = 5 o C. T J = 150 o C 3. Single Pulse DC 100 s T C = 5 o C. T J = 150 o C 3. Single Pulse 10 s 100 s 1 ms 10 ms 100 ms DC , Drain-Source Voltage [V] Figure 9-1. Maximum Safe Operating Area for TSP13N50M , Drain-Source Voltage [V] Figure 9-. Maximum Safe Operating Area for TSF13N50M T Case Temperature C Figure 10. Maximum Drain Current vs Case Temperature

5 Typical Characteristics (Continued) Z θ JC (t), The ermal Response D= single pulse 1. Z θ JC (t) = 0.64 /W Max.. Duty Factor, D=t 1 /t 3. T JM - T C = P DM * Z θ JC (t) PDM t1 t t 1, Square Wave Pulse Duration [sec] Figure Transient Thermal Response Curve for TSP13N50M Z θ JC (t), Thermal Response 10 - D= single pulse 1. Z θ JC (t) =.58 /W Max.. Duty Factor, D=t /t 1 3. T JM - T C = P DM * Z θ JC (t) PDM t1 t t 1, Square Wave Pulse Duration [sec] Figure 11-. Transient Thermal Response Curve for TSF13N50M

6 1V 3mA Current Regulator 00nF 50KΩ VGS Gate Charge Test Circuit & Waveform 300nF Same Type as R 1 R Current Sampling (I G ) Resistor Current Sampling ( ) Resistor Q gs Q g Q gd Charge Resistive Switching Test Circuit & Waveforms R L V in V out ( 0.5 rated ) V out 90% R G V in 10% t d(on) t r t d(off) tf t on t off Unclamped Inductive Switching Test Circuit & Waveforms L L 1 E AS = ---- L L I AS BS BS -- Vary t p to obtain required peak BS I AS R G C (t) t p t p Time (t)

7 Peak Diode Recovery dv/dt Test Circuit & Waveforms R G I S Driver + -- Same Type as L dv/dt controlled by by 밨RG G I ISD S controlled by by Duty pulse Factor period 밆? ( Driver ) Gate Pulse Width D = Gate Pulse Period I S S ( ) I FM, Body Diode Forward Current di/dt I RM ( ) Body Diode Reverse Current Body Diode Recovery dv/dt V f Body Diode Forward Voltage Drop

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