Dual N - Channel Enhancement Mode Power MOSFET 4502
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- Kellie Hamilton
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1 Dual N - Channel Enhancement Mode Power MOSFET DESCRIPTION The uses advanced trench technology to provide excellent RDS(ON) and low gate charge. This device is suitable for use as a load switch or in PWM applications. GENERAL FEATURES RDS(ON) < VGS=4.V RDS(ON) < VGS=V High Power and current handing capability Lead free product is acquired Surface Mount Package Application PWM applications Load switch Power management ABSOLUTE MAXIMUM RATINGS(TA= unless otherwise noted) Parameter Symbol Limit Unit Drain Source Voltage VDS 4 V Gate Source Voltage VGS + V Drain Continuous(Note ) ID( ) A ID( ) A Drain Current Pulsed (Note ) IDM A Maximum Power Dissipation (TA= ) PD W Operating Junction and Storage Temperature Range TJ,TSTG To THERMAL CHARACTERISTICS Thermal Resistance,Junction to Ambient (Note ) RθJA 3 /W
2 Dual N - Channel Enhancement Mode Power MOSFET ELECTRICAL CHARACTERISTICS (TA= unless otherwise noted) Parameter Symbol Condition Min Typ Max Unit OFF CHARACTERISTICS Drain Source Breakdown Voltage BVDSS VGS=V ID=μA 4 V Zero Gate Voltage Drain Current IDSS VDS=4V,VGS=V μa Gate Body Leakage Current IGSS VGS=±V,VDS=V ± na ON CHARACTERISTICS (Note 3) Gate Threshold Voltage VGS(th) VDS=VGS,ID=μA V Drain Source On State Resistance RDS(ON) VGS=4.V, ID=A mω DYNAMIC CHARACTERISTICS (Note4) VGS=V, ID=A Input Capacitance Ciss VDS=V,VGS=V, F=.MHz PF Output Capacitance Coss PF Reverse Transfer Capacitance Crss PF SWITCHING CHARACTERISTICS (Note 4) Turn on Delay Time td(on) VDS=V, VGS=V,RGEN Ω ns Turn on Rise Time tr ns Turn Off Delay Time td(off) ns Turn Off Fall Time tf ns Total Gate Charge Qg VDS=V,ID=A,VGS=4.V nc Gate Source Charge Qgs nc Gate Drain Charge Qgd nc Body Diode Reverse Recovery Time Trr IF=A, di/dt=a/μs ns Body Diode Reverse Recovery Charge Qrr nc DRAIN SOURCE DIODE CHARACTERISTICS Diode Forward Voltage (Note 3) VSD VGS=V,IS=A.8. V NOTES:. Pulse Test: Pulse Width 3µs, Duty Cycle %.. R θja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.r θjc is guaranteed by design while R θca is determined by the user's board design. R θja shown below for single device operation on FR-4 in still air. mω
3 Dual N - Channel Enhancement Mode Power MOSFET 4 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS V DS =V 4 I D (A) 3 C C 3 4 V GS (Volts) Figure : Transfer Characteristics (Note E) Fig. Typical Output Characteristics V Fig. On Resistance vs. G S Voltage R DS(ON) (mω) V GS GS=4.V =4.V V GS =V Normalized On-Resistance V GS =V I D =A 7 V GS =4.V I D =A R DS(ON) (mω) I D (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage (Note E) ID=A C I S (A) Temperature (Note E) ( C) Figure 4: On-Resistance vs. Junction 8 Temperature (Note E).E+.E+ 4.E+.E- C.E- C.E-3 C V GS (Volts) Figure : On-Resistance vs. Gate-Source Voltage (Note E).E-4.E V SD (Volts) Figure 6: Body-Diode Characteristics (Note E) 3
4 Dual N - Channel Enhancement Mode Power MOSFET TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 8 V DS =V I D =A C iss V GS (Volts) 6 4 Capacitance (pf) C oss Q g (nc) Figure 7: Gate-Charge Characteristics C rss 3 V DS (Volts) Figure 8: Capacitance Characteristics. I D (Amps).... R DS(ON) T J(Max) =7 C T C = C DC µs µs µs ms ms Power (W) T J(Max) =7 C T C = C 7... V DS (Volts) Figure 9: Maximum Forward Biased Safe Operating Area (Note F).... Pulse Width (s) Figure : Single Pulse Power Rating 8 Junction-to- Case (Note F) Z θjc Normalized Transient Thermal Resistance.. D=T on /T T J,PK =T C +P DM.Z θjc.r θjc R θjc =3 C/W Single Pulse In descending order D=.,.3,.,.,.,., single pulse..... Pulse Width (s) Figure : Normalized Maximum Transient Thermal Impedance (Note F) 4 P D T on T 4
5 Dual N - Channel Enhancement Mode Power MOSFET TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS I AR (A) Peak Avalanche Current T A = C T A = C T A = C T A = C Power Dissipation (W) Time in avalanche, t A (µs) Figure : Single Pulse Avalanche capability (Note C) 7 7 T CASE ( C) Figure 3: Power De-rating (Note F) 6 Current rating I D (A) 4 3 Power (W) T A = C T CASE ( C) Figure 4: Current De-rating (Note F)... Pulse Width (s) 8 Figure : Single Pulse Power Rating Junction-to- Ambient (Note H) Z θja Normalized Transient Thermal Resistance... D=T on /T T J,PK =T A +P DM.Z θja.r θja R θja = C/W Single Pulse In descending order D=.,.3,.,.,.,., single pulse..... Pulse Width (s) Figure 6: Normalized Maximum Transient Thermal Impedance (Note H) 4 P D T on T
6 Dual N - Channel Enhancement Mode Power MOSFET Package Information 6
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Asymmetric Dual N-Channel Enhancement Mode Field Effect Transistor General Description The AO49 uses advanced trench technology to provide excellent R DS(ON) and low gate charge. The two MOSFETs make a
More informationV DS. Pin 1 G1 D2. Maximum Drain-Source Voltage -12 Gate-Source Voltage Continuous Drain Current G Pulsed Drain Current C V GS I D I DM P D
AON289 2V Dual PChannel MOSFET General Description The AON289 combines advanced trench MOSFET technology with a low resistance package to provide extremely low R DS(ON). This device is ideal for load switch
More informationN-Channel VDS = 30V, ID = 7.8A. 10V. -4.5V. P-Channel VDS = -30V, ID = -7A
Complementary MOSFET DESCRIPTION The SMC59 is the N+P-Channel Complementary mode power field effect transistors are using trench DMOS technology. advanced trench technology to provide excellent RDS(ON).
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AONS66 6V NChannel AlphaSGT TM General Description Trench Power AlphaSGT TM technology Low R DS(ON) Logic Level Gate Drive Excellent Gate Charge x R DS(ON) Product (FOM) RoHS and HalogenFree Compliant
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6V NChannel AlphaSGT TM General Description Trench Power AlphaSGT TM technology Low R DS(ON) Low Gate Charge ESD protected Product Summary V DS I D (at V GS =V) R DS(ON) (at V GS =V) R DS(ON) (at V GS
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AONS9 V NChannel AlphaSGT TM General Description Trench Power AlphaSGT TM technology Low R DS(ON) Low Gate Charge Optimized for fastswitching applications RoHS and HalogenFree Compliant Product Summary
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NChannel Enhancement Mode Field Effect Transistor General Description The AOD43 uses advanced trench technology to provide excellent R DS(ON), low gate charge and low gate resistance. This device is ideally
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SMC333SN Single P-Channel MOSFET DESCRIPTION SMC333 is the P-Channel enhancement mode power field effect transistors are using trench DMOS technology. This advanced trench technology devices are well suited
More informationSymbol Parameter Rating Units VDSS Drain-Source Voltage -30 V VGSS Gate-Source Voltage ±20 V TC=25 C -22 A
SMC22H Single P-Channel MOSFET DESCRIPTION SMC22 is the P-Channel enhancement mode power field effect transistors are using trench DMOS technology. This advanced technology has been especially tailored
More informationSI-TECH SEMICONDUCTOR CO.,LTD S85N10R/S
N-Channel MOSFET Features 85V,100A,Rds(on)(typ)=5.8mΩ @Vgs=10V High Ruggedness Fast Switching 100% Avalanche Tested Improved dv/dt Capability General Description This Power MOSFET is produced using Si-Tech
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August 2 AO348 N-Channel Enhancement Mode Field Effect Transistor General Description The AO348 uses advanced trench technology to provide excellent R DS(ON), low gate charge and operation with gate voltages
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DESCRIPTION The SSF2449 uses advanced trench technology to provide excellent RDS(ON), low gate charge and operation with gate voltages as low as 2.5V. This device is suitable for use as a load switch or
More informationSymbol Parameter Typ Max Units Thermal Resistance Junction to Ambient C t 10s 62 Thermal Resistance Junction to Ambient C
SMC93M Dual P-Channel MOSFET DESCRIPTION SMC93 is the Dual P-Channel enhancement mode power field effect transistors are using trench DMOS technology.this advanced technology has been especially tailored
More informationV DS I D (at V GS =10V) R DS(ON) (at V GS =4.5V) 100% UIS Tested 100% Rg Tested
AOD9 V NChannel AlphaMOS General Description Latest Trench Power AlphaMOS (αmos MV) technology Very Low R DS(ON) Low Gate Charge Optimized for fastswitching applications RoHS and HalogenFree Compliant
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AODN8 8V,.8A NChannel MOSFET General Description The AODN8 has been fabricated using an advanced high voltage MOSFET process that is designed to deliver high levels of performance and robustness in popular
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2V PChannel MOSFET General Description The AO345 uses advanced trench technology to provide excellent R DS(ON), low gate charge and operation with gate voltages as low as.8v. This device is suitable for
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More informationAM2300. AiT Semiconductor Inc. APPLICATION ORDER INFORMATION PIN CONFIGURATION
DESCRIPTION The is the N-Channel logic enhancement mode power field effect transistor is produced using high cell density. Advanced trench technology to provide excellent RDS(ON). FEATURES 20V/4.0A, RDS(ON)
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AON58B 3V CommonDrain Dual NChannel MOSFET General Description The AON58B uses advanced trench technology to provide excellent R DS(ON), low gate charge and operation with gate voltages as low as.5v while
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Features -20V/-3A, R DS(ON) =72mΩ(typ.) @ V GS =-4.5V Pin Description R DS(ON) =98mΩ(typ.) @ V GS =-2.5V Super High Dense Cell Design Reliable and Rugged Lead Free Available (RoHS Compliant) Top View of
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FEATURES New technology for high voltage device Low RDS(on) low conduction losses Small package Ultra low gate charge cause lower driving requirement 100% avalanche tested Halogen Free APPLICATION Power
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DESCRIPTION The STN is the N-Channel logic enhancement mode power field effect transistor is produced using high cell density. advanced trench technology to provide excellent RDS(ON). This device is suitable
More informationP-Channel Enhancement Mode Field Effect Transistor
Description The uses advanced trench technology to provide excellent R DS(ON), low gate charge and operation with gate voltages as low as 2.5V. This device is suitable for use as a load switch or in PWM
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HCD80R600R 800V N-Channel Super Junction MOSFET Features Very Low FOM (R DS(on) X Q g ) Extremely low switching loss Excellent stability and uniformity 00% Avalanche Tested Application Switch Mode Power
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