ML12561 Crystal Oscillator

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Norman Bond
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1 ML56 Crystal Oscillator Legacy Device: Motorola MC56 The ML56 is the military temperature version of the commercial ML06 device. It is for use with an external crystal to form a crystal controlled oscillator. In addition to the fundamental series mode crystal, two bypass capacitors are required (plus usual power supply pin bypass capacitors). Translators are provided internally for and TTL outputs. Frequency Range = 2.0 to 20 MHz Operating Temperature Range TA = 55 to +5 C Single Supply Operation: +5.0 or 5.2 V DC Three Outputs Available:.Complementary Sine Wave (600 mvpp typ) 2.Complementary.Single Ended TTL Bias Bypass V CC Filter Figure. Block Diagram Sine Wave Output Output V CC 2 V CC V CC CERDIP = E CERAMIC PACKAGE CASE 620 CROSS REFERENCE/ORDERING INFORMATION PACKAGE MOTOROLA LANSDALE CERDIP 56/BEA ML56/BEA Voltage Reg. Crystal Osc. Ampl./ Sine to to TTL Translator TTL Output Note: power supply pin bypass capacitors not shown. 6 5 Crystal V EE 9 V EE /ML56 Page of 9

2 ML56 ELECTRICAL CHARACTERISTICS Characteristic Symbol Test Limits Pin Under 0 C +25 C +75 C Test Min Max Min Typ Max Min Max Unit Power Supply Drain Current ICC 9 madc Input Current IinH IinL Differential Offset Voltage V to 7 2 to Output Voltage Level Vout 2 Logic Output Voltage Logic 0 Output Voltage VOH (Note ) VOH VOL (Note ) VOL2 Logic Threshold Voltage VOHA Logic 0 Threshold Voltage VOLA Output Short Circuit Current IOS madc NOTE:. Devices will meet standard logic levels using V EE = 5.2 and V CC = µadc µadc madc Page 2 of 9

3 ML56 ELECTRICAL CHARACTERISTICS (continued) TEST VOLTAGE/CURRENT VALUES Volts Test Temperature VIHmax VILmin VIHAmin VILAmax VIHT VCCL Symbol 0 C C C Pin TEST VOLTAGE APPLIED TO PINS LISTED BELOW Under Test VIHmax VILmin VIHAmin VILAmax VIHT VCCL Gnd Power Supply Drain Current ICC Input Current IinH IinL Differential Offset Voltage V to 7 2 to Output Voltage Level Vout 2 Logic Output Voltage Logic 0 Output Voltage VOH (Note ) VOH2,,9 VOL (Note ) VOL2 Logic Threshold Voltage VOHA Logic 0 Threshold Voltage VOLA Output Short Circuit Current IOS,,9, NOTE:. Devices will meet standard logic levels using V EE = 5.2 and V CC = 0. 5,6,,9,,,9,9 Page of 9

4 ML56 ELECTRICAL CHARACTERISTICS (continued) Volts TEST VOLTAGE/CURRENT VALUES ma Test Temperature VCC VCCH IOL IOH IIL Symbol 0 C C C Pin TEST VOLTAGE APPLIED TO PINS LISTED BELOW Under Test VCC VCCH IOL IOH IIL Gnd Power Supply Drain Current ICC Input Current IinH IinL Differential Offset Voltage V to 7 2 to Output Voltage Level Vout 2 Logic Output Voltage Logic 0 Output Voltage VOH (Note ), VOH2,9 VOL (Note ) VOL2 Logic Threshold Voltage VOHA Logic 0 Threshold Voltage VOLA Output Short Circuit Current IOS,9, NOTE:. Devices will meet standard logic levels using V EE = 5.2 and V CC = 0.,,9,,,9,9 Page of 9

5 ML56 Figure 6. AC Characteristics and TTL Outputs 20% Input (Pin ) TTL Output (Pin ) Output (Pin ) Output (Pin ) t+ 0% 50% t + + t++ 50% 20% t+ 0% 50% 0% 50% 20% t All input and output cables to the scope are equal lengths of 50 Ω coaxial cable. Unused outputs are connected to a 50 Ω ± % resistor to ground. t+ t t t t t + t mv 200 mv Pulse Generator (EH 7 or Equiv) PRF = 2.0 MHz t + = t = 2.0 ± 0.2 ns C T = pf = total parasitic capacitance which includes probe, wiring, and load capacitance. 9 V EE = V CC = k C T 00 MMD60 or Equiv MMD7000 or Equiv Test Limits TEST VOLTAGES/WAVEFORMS APPLIED TO PINS LISTED BELOW: Characteristic Propagation Delay Symbol t++ t t+ t + t++ t Rise Time t+ t+ Pin 0 C +25 C +75 C Under Test Min Max Min Typ Max Min Max Unit Pulse In Pulse Out +2.0 Gnd ns ns ns,,9,,,9,9 Fall Time t t ns ns,,,9,9 Pin Under +25 C TEST VOLTAGE APPLIED TO PINS LISTED BELOW Characteristic Test Min Typ Unit +2.0 Sine Wave Amplitude mvp-p,9 Figure 7. AC Test Circuit Sine Wave Output All output cables to the scope are equal lengths of 50 Ω coaxial cable. All unused cables must be terminated with a 50 Ω ± % resistor to ground. 50 Ω resistor and the scope termination impedance constitute a : attenuator probe. Crystal Reeves Hoffman Series Mode, Series Resistance Minimum at Fundamental f = MHz RE = 5 Ω *RS = kω is inserted only for test purposes. When used with the above specified crystal, it guarantees oscillation with any crystal which has an equivalent series resistance 5 Ω Rp: will improve start up problems value: Ω V CC = µf *R S R p Crystal V EE = Page 5 of 9

6 ML56 The ML56 consists of three basic sections: an oscillator with and two translators. Buffered complementary sine wave outputs are available from the oscillator section. The translators convert these sine wave outputs to levels compatible with and/or TTL. Series mode crystals should be used with the oscillator. If it is necessary or desirable to adjust the crystal frequency, a reactive element can be inserted in series with the crystal an inductor to lower the frequency or a capacitor to raise it. When such an adjustment is necessary, it is recommended that the crystal be specified slightly lower in frequency and a series trimmer capacitor be added to bring the oscillator back on frequency. As the oscillator frequency is changed from the natural resonance of the crystal, more and more dependence is placed on the external reactance, and temperature drift of the trimming components then affects overall oscillator performance. The ML56 is designed to operate from a single supply either +5.0 or 5.2. Although each translator has separate VCC and VEE supply pins, the circuit is NOT designed to operate from both voltage levels at the same time. The separate VEE pin from the TTL translator helps minimize transient disturbance. If neither translator is being used, all unused pins (9 thru ) should be connected to VEE (pin ). With the translators not powered, supply current drain is typically reduced from 2 ma to 2 ma for the ML06. Frequency Stability Output frequency of different oscillator circuits (of a given device type number) will vary somewhat when used with a given test setup. However, the variation should be within approximately ±0.00% from unit to unit. Frequency variations with temperature (independent of the crystal, which is held at 25 C) are small about 0.0ppm/ C for ML06 operating at.0 MHz. Signal Characteristics The sine wave outputs at either pin 2 or pin will typically range from 00 mvp-p (no load) to 500 mvp-p (0 ohm AC load). Approximately 500 mvp-p can be provided across 50 ohms by slightly increasing the DC current in the output buffer by the addition of an external resistor (60 ohms) from pin 2 or to ground, as shown in Figure 9. Frequency drift is typically less than 0.000% when going from a high-impedance load ( megohm, pf) to the 50 ohm load of Figure 9. The DC voltage level at pin 2 or is nominally.5 with VCC = Harmonic distortion content in the sine wave outputs is crystal as well as circuit dependent. The largest harmonic (third) will usually be at least db down from the fundamental. The harmonic content is approximately load independent except that the higher harmonic levels (greater than the fifth) are increased when the translator is being driven. Typically, the outputs (pins and ) will drive up to five gates and the TTL output (pin) will drive up to ten gates. Noise Characteristics Noise level evaluation of the sine wave outputs operation at or 9.0 MHz, indicates the following characteristics:. Noise floor (200 khz from oscillator center frequency) is approximately 2 db when referenced to a.0 Hz bandwidth. Noise floor is not sensitive to load conditions and/or translator operation. 2. Close-in noise (0 Hz from oscillator center frequency) is approximately db when referenced to a.0 Hz bandwidth. FREQUENCY SHIFT (ppm) f, Figure. Frequency Variation Due to Temperature TA, AMBIENT TEMPERATURE ( ) +5.0 V * See text under signal characteristics. ML56 2 or VCC = +5.0 Tcrystal = 25 C ML56 Figure 9. Driving Low Impedance Loads Page 6 of 9

7 ML56 Figure. Translator Load Capability Figure. TTL Translator Load Capability V CC = +5.0 V V CC = +5.0 V +5.0 V Sine to.2 k pf to TTL Translator 9.5 k pf 270 All diodes MBD or Equiv Figure. Noise Measurement Test Circuit +5.0 V ANALYZER SETTING 7 Measurement Sweep Bandwidth Noise Floor Close-In Noise 50 khz/div 20 khz/div khz Hz Video Filter Hz Hz or 750 To HP552B/5B Spectrum Analyzer or Equiv Page 7 of 9

8 / ML56 Figure. Circuit Schematic RESISTOR R (2 Places) R2 (2 Places) R (2 Places) ML Ω 00 Ω 2 kω Sine to Translator to TTL Translator Voltage Regulator Oscillator Amplifier Output Sine Wave Output 2 Filter VCC Bias VCC + VCC + 7 k 260 R R 2.9k 2 2.2k TTL Output R R R2 9.2k 205.5k.5k 52.k R2 9.2 k VEE Crystal VEE Page of 9

9 ML56 OUTLINE DIMENSIONS A H G F 9 D PL B S C K 0.25 (0.0) M T SEATING T PLANE A M CERDIP = E CERAMIC PACKAGE (ML56/BEA) CASE 620 ISSUE R J L M NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.5M, CONTROLLING DIMENSION: INCH.. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G 0.0 BSC 2.5 BSC H BSC.27 BSC J K L M 0 0 S Lansdale Semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Lansdale does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Typical parameters which may be provided in Lansdale data sheets and/or specifications can vary in different applications, and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by the customer s technical experts. Lansdale Semiconductor is a registered trademark of Lansdale Semiconductor, Inc. Page 9 of 9

ML12002 Analog Mixer. There are two package offerings: Plastic Dual Inline 14 Lead, P Dip. Plastic Surface Mount 14 Lead SOIC.

ML12002 Analog Mixer. There are two package offerings: Plastic Dual Inline 14 Lead, P Dip. Plastic Surface Mount 14 Lead SOIC. Analog Mixer Legacy Device: Motorola MC00 The ML00 is a double balanced analog mixer, including an input amplifier feeding the mixer carrier port and a temperature compensated bias regulator. The input