Errata to IEEE Standard Test Specification for Thyristor Diode Surge Protective Devices
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1 Errata to IEEE Standard Test Specification for Thyristor Diode Surge Protective Devices Sponsor Surge Protective Devices Committee of the IEEE Power & Energy Society Correction Sheet Issued October 9 Copyright 9 by the Institute of Electrical and Electronics Engineers, Inc. All rights reserved. Published 9. Printed in the United States of America. This correction sheet may be freely reproduced and distributed in order to maintain the utility and currency of the underlying Standard. This correction sheet may not be sold, licensed or otherwise distributed for any commercial purposes whatsoever. The content of this correction sheet may not be modified. October 9 STD9
2 Page, Subclause. Scope, first sentence should read as This standard applies to two or three terminal, four or five layer, thyristor surge protective devices (SPDs) for application on systems with voltages equal to or less than V rms or V dc. Page, Subclause. Definitions, second sentence should read as If the volt-ampere characteristics are asymmetrical, then the parameters shall be defined for each polarity. Page, Subclause.., non-repetitive peak pulse current (I PPS ), sentence should read as Rated maximum value of peak impulse current of specified amplitude and waveshape that may be applied. Page, Subclause..7, impulse reset time, title should read impulse reset time (t (RESET) ) Page, Subclause.., peak pulse impulse current (I PPM ), sentence should read as Rated maximum value of peak impulse pulse current (I PP ) applied for pulses with / waveshape and maximum duty factor of.% without causing failure. Page, Subclause., Gated thyristor surge protection device (SPD), title should read as Gated thyristor surge protective device (SPD) Page, Subclause.., gate reverse current, main terminals short-circuited (I GAS ; I GKS ), text after sentence should read as (See..) Page, section.., Non-repetitive peak pulse current I PPS, last paragraph, last sentence should read as Table shows some wave shapes commonly used to test thyristor SPDs for telecommunication applications. Page, Subclause., Standard design test criteria, first sentence should read as The design tests described in.. through.. provide standardized methods for making single observations of a specified property of a thyristor SPD. Page, Subclause., Thyristor surge protection device (SPD) test conditions, title should read as Thyristor surge protective device (SPD) test conditions Page, Subclause., Thyristor surge protection device (SPD) test conditions, sixth sentence should read as Normally this would be done by clipping ferrite cores onto the probe cables. Page 8, Subclause..8, Critical rate of rise of on-state current di/dt, first sentence should read as October 9 STD9
3 The purpose of this test is to verify that a thyristor SPD can survive a fast rising current, as may occur on the wavefront of an impulse. Page, Subclause.., Breakover voltage and current I (BO), The test generator shall be specified for the open-circuit voltage and short-circuit current waveforms (or equivalents of rate-of-rise, wave shape and wave shape peak value) and, for ac testing, the duration. Page, Subclause.., Figures 7, 8 and 9 should be as October 9 STD9
4 Time relative to 8.99 ms - µs I (BO) I H 8 8 Time relative to 8.99 ms - µs 8 8 I H Figure 7 Switching and on-state waveforms for a positive breakdown slope thyristor SPD October 9 STD9
5 V S Time relative to 8.8 ms - ms I (BO) I S I H Voltage Clamping Current Time relative to 8.8 ms - ms I H Figure 8 Switching and on-state waveforms of a gated thyristor SPD October 9 STD9
6 V S (I (BO) too small to be determined) I (BO) I S Time relative to 8.77 ms - µs I H 8 8 Time relative to 8.77 ms - µs 8 8 I H Figure 9 Switching and on-state waveforms for a negative breakdown slope thyristor SPD October 9 STD9
7 Page, Subclause.., Holding current I H, third sentence should read as The test generator shall be specified for the open circuit voltage and short-circuit current values, or equivalents, of wave shape and wave shape peak value Page, Subclause.., Holding current I H, second to last sentence should read as To increase the switch off voltage level, the generator and a current (< minimum specified value of I H ) from a dc voltage supply (<V DRM ) should be diode ORed onto the DUT (see Figure ). Page, Subclause.., Holding current I H, Figure title should read as Figure Test circuit for holding current (I H ) with additional dc bias (impulse reset) Page 8, Subclause..8, Breakdown voltage V (BR), last sentence of second paragraph should read as For a negative breakdown slope thyristor SPD (see Figures,, and ) this measurement approach can be used to determine. Page 9, Subclause..9, Switching voltage V S and current I S, sixth sentence should read as A V-I characteristic can be produced by plotting the recorded current against the recorded voltage. Page, Subclause.., Peak forward recovery voltage V FRM, third sentence should read as The generator shall switch the diode section on at a specified rate of forward current rise, di F /dt, and the value of peak forward recovery voltage, V FRM, shall be measured (see Figure ). Page, Subclause.., Temperature coefficient of breakdown voltage, title should read as Temperature coefficient of breakdown voltage α V(BR) Page, Subclause..7, Thermal resistance R θ, Third equation should read as R θjl = (T JPK -T L )/P TOT C/W Page, Subclause..7, Thermal resistance R θ, Figure 8 title should read as Figure 8 Test circuit for thermal resistance (R θ ) and impedance (Z θ ) Page, Subclause..8, Transient thermal impedance Z θ(t), Figure 9 should be as October 9 7 STD9
8 THERMAL RESPONSE Z θjα - Transient Thermal Impedance - C/W t - Power Pulse Duration - s Figure 9 Thermal impedance (Z θja ) vs. time Page, Subclause.., Gate switching charge Q GS, Figure should be as October 9 8 STD9
9 Figure Test circuit for gate switching current, gate switching charge, and gate-to adjacent terminal breakover voltage (I GSM, Q GS, V GK(BO), V GA(BO) ) Page, Figure, last listed item should read as CRO = Dual channel oscilloscope or equivalent Page, Figure, last listed item should read as CRO = Dual channel oscilloscope or equivalent Page, Subclause.., Gate switching charge Q GS, Figure 7 should be as October 9 9 STD9
10 -7 - Voltage - V - V K V GG Voltage - V -7 V GK(BO) V GG - V K I G. Q GS Current - A I K Current - A I K Figure 7 Overall and expanded clamping waveforms for a p-type gate DUT to illustrate V GK(BO) and Q GS measurement (di K /dt= A/μs) Page 7, Subclause A.., quadrant, second sentence should read as These quadrants are numbered counterclockwise as through. Page 8, Subclause A.., unidirectional thyristor surge protection device (SPD), title should read as unidirectional thyristor surge protective device (SPD): Page, Figure, last listed item should read as CRO = Dual channel oscilloscope or equivalent October 9 STD9
11 October 9 STD9
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Applications Dual SO-8 MOSFET for POL converters in desktop, servers, graphics cards, game consoles and set-top box PD - 95858A IRF895 HEXFET Power MOSFET V DSS R DS(on) max I D 20V 8.3m:@V GS = V 8.9A
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Pb Free Plating Product 55NF06 N-CHANNEL POWER MOSFET TRANSISTOR Pb 50 AMPERE 60 VOLT N-CHANNEL POWER MOSFET DESCRIPTION 12 3 TO-251/IPAK Thinkisemi 50N06 is three-terminal silicon device with current
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4V 75 C DUAL N-CHANNEL ENHANCEMENT MODE MOSFET Product Summary BV DSS 4V R DS(ON) max I D max T C = +25 C 5mΩ @ V GS = V 43.6A 25mΩ @ V GS = 4.5V 33A Description and Applications This MOSFET is designed
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UNISONIC TECHNOLOGIES CO., LTD 13A, 500V N-CHANNEL POWER MOSFET DESCRIPTION The UTC 13N50 is an N-Channel enhancement mode power MOSFET. The device adopts planar stripe and uses DMOS technology to minimize
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