1 May 22 AO68 Dual P-Channel Enhancement Mode Field Effect Transistor General Description The AO68 uses advanced trench technology to provide excellent R DS(ON) and low gate charge. This device is suitable for use as a load switch or in PWM applications. Features V DS (V) = -3V I D = -2.3 A R DS(ON) < 3mΩ (V GS = -V) R DS(ON) < 8mΩ (V GS = -4.V) R DS(ON) < 26mΩ (V GS = -2.V) D D2 TSOP6 Top View G S2 G D S D2 G S G2 S2 Absolute Maximum Ratings T A =2 C unless otherwise noted Parameter Drain-Source Voltage Gate-Source Voltage Symbol V DS V GS Maximum -3 ±2 Continuous Drain T A =2 C -2.3 Current A T A =7 C I D -.8 Pulsed Drain Current B I DM -2 T A =2 C. P D Power Dissipation A T A =7 C.73 Junction and Storage Temperature Range T J, T STG - to Units V V A W C Thermal Characteristics Parameter Symbol Typ Max Units Maximum Junction-to-Ambient A t s 78 C/W R Maximum Junction-to-Ambient A θja Steady-State 6 C/W Maximum Junction-to-Lead C Steady-State R θjl 64 8 C/W Alpha & Omega Semiconductor, Ltd.
2 AO68 Electrical Characteristics (T J =2 C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units STATIC PARAMETERS BV DSS Drain-Source Breakdown Voltage I D =-2µA, V GS =V -3 V I DSS Zero Gate Voltage Drain Current V DS =-24V, V GS =V - T J = C - µa I GSS Gate-Body leakage current V DS =V, V GS =±2V ± na V GS(th) Gate Threshold Voltage V DS =V GS I D =-2µA V I D(ON) On state drain current V GS =-4.V, V DS =-V -2 A R DS(ON) V GS =-V, I D =-2.3A 7 3 mω T J =2 C Static Drain-Source On-Resistance V GS =-4.V, I D =-2A 3 8 mω V GS =-2.V, I D =-A 9 26 mω g FS Forward Transconductance V DS =-V, I D =-2.3A 8 S V SD Diode Forward Voltage I S =-A,V GS =V V I S Maximum Body-Diode Continuous Current -.3 A DYNAMIC PARAMETERS C iss Input Capacitance 49 pf C oss Output Capacitance V GS =V, V DS =-V, f=mhz pf C rss Reverse Transfer Capacitance 42 pf R g Gate resistance V GS =V, V DS =V, f=mhz 2 Ω SWITCHING PARAMETERS Q g Total Gate Charge 4.9 nc Q gs Gate Source Charge V GS =-4.V, V DS =-V, I D =-2.A.6 nc Q gd Gate Drain Charge.6 nc t D(on) Turn-On DelayTime 6.9 ns t r Turn-On Rise Time V GS =-V, V DS =-V, R L =7.Ω, 3.3 ns t D(off) Turn-Off DelayTime R GEN =3Ω 38. ns t f Turn-Off Fall Time 3.2 ns t rr Body Diode Reverse Recovery Time I F =-2.A, di/dt=a/µs ns Q rr Body Diode Reverse Recovery Charge I F =-2.A, di/dt=a/µs 8 nc A: The value of R θja is measured with the device mounted on in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =2 C. The value in any a given application depends on the user's specific board design. The current rating is based on the t s thermal resistance rating. B: Repetitive rating, pulse width limited by junction temperature. C. The R θja is the sum of the thermal impedence from junction to lead R θjl and lead to ambient. D. The static characteristics in Figures to 6,2,4 are obtained using 8 µs pulses, duty cycle.% max. E. These tests are performed with the device mounted on in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =2 C. The SOA curve provides a single pulse rating. Alpha & Omega Semiconductor, Ltd.
3 AO68 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 2 -V -V -4V -4.V 8 V DS =-V 2 C -I D (A) V GS =-3.V -3V -I D (A) C -2.V -2V V DS (Volts) Fig : On-Region Characteristics V GS (Volts) Figure 2: Transfer Characteristics 2.6 R DS(ON) (mω) V GS =-2.V V GS =-4.V V GS =-V Normalized On-Resistance.4.2 V GS =-4.V, V GS =-V V GS =-2.V I D =-2A I D (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage Temperature ( C) Figure 4: On-Resistance vs. Junction Temperature 3 3.E+.E+ R DS(ON) (mω) 2 2 I D =-2A 2 C 2 C -I S (A).E-.E-2.E-3.E-4 2 C 2 C.E V GS (Volts) Figure : On-Resistance vs. Gate-Source Voltage.E V SD (Volts) Figure 6: Body-Diode Characteristics Alpha and Omega Semiconductor, Ltd.
4 AO68 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 4 V DS =-V I D =-2.A 6 -V GS (Volts) 3 2 Capacitance (pf) C iss C oss C rss Q g (nc) Figure 7: Gate-Charge Characteristics V DS (Volts) Figure 8: Capacitance Characteristics -I D (Amps).... T J(Max) = C T A =2 C R DS(ON) limited s s.s DC µs ms ms µs. -V DS (Volts) Figure 9: Maximum Forward Biased Safe Operating Area (Note E) Power (W) 2 T J(Max) = C T A =2 C... Pulse Width (s) Figure : Single Pulse Power Rating Junction-to- Ambient (Note E) Z θja Normalized Transient Thermal Resistance. D=T on /(T on +T off ) T J,PK =T A +P DM.Z θja.r θja R θja = C/W In descending order D=.,.3,.,.,.2,., single pulse Single Pulse Pulse Width (s) Figure : Normalized Maximum Transient Thermal Impedance P D T on T off Alpha & Omega Semiconductor, Ltd.
5 ALPHA & OMEGA SEMICONDUCTOR, INC. TSOP-6 Package Data θ SYMBOLS A. A. A2. b.3 c. D 2.7 E 2.6 E.6 e e L.37 θ DIMENSIONS IN MILLIMETERS MIN NOM MAX BSC.9 BSC 8 GAUGE PLANE SEATING PLANE NOTE:. LEAD FINISH: MICROINCHES ( 3.8 um) MIN. THICKNESS OF Tin/Lead (SOLDER) PLATED ON LEAD 2. TOLERANCE ±. mm (4 mil) UNLESS OTHERWISE SPECIFIED 3. COPLANARITY :. mm 4. DIMENSION L IS MEASURED IN GAGE PLANE PACKAGE MARKING DESCRIPTION RECOMMENDED LAND PATTERN TSOP-6 PART NO. CODE PART NO. AO68 CODE H NOTE: P N - PART NUMBER CODE. D - YAER AND WEEK CODE. L N - ASSEMBLY LOT CODE, FAB AND ASSEMBLY LOCATION CODE.
6 ALPHA & OMEGA SEMICONDUCTOR, INC. TSOP-6 Tape and Reel Data TSOP-6 Carrier Tape TSOP-6 Reel TSOP-6 Tape Leader / Trailer & Orientation