PAGE 2 OF 20 HUTCHINSON EXHIBIT 1010 Question #1 Can current interconnect technology support the push towards 3Gb/s internal data rates? Answer #1 YES

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1 PAGE 1 OF 20 HUTCHINSON EXHIBIT 1010 Exploring Low Loss Suspension Interconnects for High Data Rates in Hard Disk Drives Sept. 20, 2007 Hutchinson Technology Inc. Michael Roen, Reed Hentges, John Pro, Greg VanHecke Texas Instruments Greg Kimball

2 PAGE 2 OF 20 HUTCHINSON EXHIBIT 1010 Question #1 Can current interconnect technology support the push towards 3Gb/s internal data rates? Answer #1 YES... Today s interconnect technology can support the push towards 3Gb/s internal data rates.

3 PAGE 3 OF 20 HUTCHINSON EXHIBIT 1010 Question #2 Future interconnects What are their features and benefits? Answer #2 Future low impedance, high bandwidth interconnects can enable lower power and lower voltage writer front ends.

4 PAGE 4 OF 20 HUTCHINSON EXHIBIT 1010 Outline Writer Interconnect Functions Today's Suspension Interconnects and Corresponding Design Space Writer Front End System Model: Experiment #1 - Current Interconnect Technology Supports 3 Gb/s Data Rates Experiment #2 - Benefits of Low Impedance/High Bandwidth Interconnects Low Impedance and High Bandwidth Interconnect Structures and Design Space

5 PAGE 5 OF 20 HUTCHINSON EXHIBIT 1010 Interconnect Functions High Overshoot Current: Overcome writer dynamics What are the functions of suspension interconnects? Mechanical Design: Need to preserve low mechanical stiffness without introducing impedance discontinuities Signal Integrity: Need high signal integrity for write current waveform (low loss and constant impedance) Manufacturability: Interconnect must be easy to make in high volume! Lower Power: Lower total system power use during write

6 PAGE 6 OF 20 HUTCHINSON EXHIBIT 1010 Today s Interconnect Differential Microstrip Typically a designer will change trace width, spacing or the stainless steel backing percentage to adjust for impedance Differential Microstrip Cross Section SST losses limit bandwidth by ~ 1 to 2 GHz in fully backed structures Windowing allows for increased interconnect bandwidth, but increases Z diff Z = Voltage Current L C Coupons produce design space shown on next page (current microstrip interconnect)

7 PAGE 7 OF 20 HUTCHINSON EXHIBIT 1010 Current Microstrip Interconnect Design Space Windowed SST Gnd 100 Zdiff (Ohm) Remove stainless steel to increase bandwidth? Bandwidth (GHz)

8 PAGE 8 OF 20 HUTCHINSON EXHIBIT 1010 Writer Front End System Model P dissipated V launch Write Suspension Interconnect I write (t) Experimental Model Write Driver: Experimental Preamp (~100 ps rise time, target 3Gb/s internal data rate) Write Interconnect: Measured Interconnect Coupon Write Head: Generic PMR Head Model Based On Measurement Writer Current (ma) % 10% t rise Time (ns)

9 PAGE 9 OF 20 HUTCHINSON EXHIBIT 1010 Experiment #1: Today s Interconnect Structure Capability Experiment #2: Future Interconnect Structure Capabilities

10 PAGE 10 OF 20 HUTCHINSON EXHIBIT 1010 Experiment #1 66 Ohm Interconnects With Variable Bandwidths Windowed SST Gnd Zdiff (Ohm) More stainless steel windowing and wider traces gives same impedance but higher bandwidths Bandwidth (GHz)

11 PAGE 11 OF 20 HUTCHINSON EXHIBIT 1010 Experiment #1 66 Ohm Interconnects With Variable Bandwidths Recent write source Z diff is between 55 Ohm and 70 Ohm for high data rate preamps 30 ma increase in peak current overshoot going from 1.5 GHz to 8.5 GHz +(Iw ss ) One aspect of high bandwidth interconnects is that secondary reflected pulses occur at head 2 time delays after initial pulse -(Iw ss )

12 PAGE 12 OF 20 HUTCHINSON EXHIBIT 1010 Experiment #1 Rise Time, Launch Voltage, Power Dissipation vs. BW at 66 Ohm Interconnect DR = 3 Gbps, Iw-pk = 100 ma Zo = 66 ohms; BW = 1.5, 2, 3.25, 6.0, and 8.5 GHz 140 Power dissipated (mw) Rise time (ps), t rise P dissipated V launch Tr and Pd Knee at 6 GHz BW 9 Ideal T-line 8 7 DC loss Launch Voltage (volts) Bandwidth (GHz)

13 PAGE 13 OF 20 HUTCHINSON EXHIBIT 1010 Experiment #1: Today s Interconnect Structure Capability Experiment #2: Future Interconnect Structure Capabilities

14 PAGE 14 OF 20 HUTCHINSON EXHIBIT 1010 Experiment #2 Variable Impedance, Constant BW Coupons Windowed SST Gnd Zdiff (Ohm) Bandwidth (GHz) Achievable through alternate interconnect structures

15 PAGE 15 OF 20 HUTCHINSON EXHIBIT 1010 Experiment #2 Variable Impedance, Constant BW Coupons 70 ma increase in peak overshoot current going from 90 Ohm to 25 Ohm interconnect impedances 62 Ohm and 71 Ohm shows best convergence to steady state, which is an effect of preamp/interconnect matching I w-ss I w+ss

16 PAGE 16 OF 20 HUTCHINSON EXHIBIT 1010 Experiment #2 Launch Voltage & Pd vs. Zdiff at 8 GHz BW DR = 3 Gbps, Iw-pk = 100 ma BW = 8 GHz; Interconnect Zdiff = 25, 40, 62, 71, 90, and 101 Ohm Diff Voltage Required (V) P dissipated V launch Power Dissipated (mw) Zdiff (Ohm)

17 PAGE 17 OF 20 HUTCHINSON EXHIBIT 1010 Alternate Interconnect Structures Copper Ground Plane Thin copper layer reduces stainless steel losses Suffers from same impedance/bandwidth tradeoff as today s interconnects Stacked Traces Trace width and separation determine impedance Separation determines interconnect bandwidth almost exclusively Interleaved Traces Increases the number of differential coupling traces Produces half the impedance of a standard Cu-Poly-SST windowed structure, but same bandwidth

18 PAGE 18 OF 20 HUTCHINSON EXHIBIT 1010 Design Space - Revisited Windowed SST Gnd Windowed Copper Gnd Stacked Traces Interleaved Windowed SST Gnd Zdiff (Ohm) um Dielectric 5 um Dielectric Thickness Thickness Bandwidth (GHz)?

19 PAGE 19 OF 20 HUTCHINSON EXHIBIT 1010 Question #1 Can current interconnect technology support the push towards 3Gb/s internal data rates? Answer #1 66 Ohm impedance/variable bandwidth experiment shows that today s interconnects can support the push towards 3Gb/s internal data rates. Question #2 Future interconnects What are their features and benefits? Answer #2 Future interconnects will be low impedance, high bandwidth interconnects that enable lower power and lower voltage (i.e. more efficient) writer front ends.

20 HTI looks forward to working with the entire HDD supply chain to meet future high data rate requirements. Thank you for attending today s presentation. PAGE 20 OF 20 HUTCHINSON EXHIBIT 1010