Minh Quach. Signal Integrity Consideration and Analysis 4/30/2004. Frequency & Time Domain Measurements/Analysis

Transcription

1 Minh Quach. Signal Integrity Consideration and Analysis 4/30/2004 Frequency & Time Domain Measurements/Analysis

2 Outline Three Measurement Methodologies Direct TDR (Time Domain Reflectometry) VNA (Vector Network Analyzer) Fundamental Transmission line & TDR Theory Lossless and lossy line Filter Rise Time calculation Bandwidth Interpretation Page 2

3 Outline (Cont) Signal Integrity Reflection Dispersion AC loss (skin effect and dielectric loss) Cross Talk Ground Bounce Inadequate power bus decoupling Differential Pair Common & Differential Mode Even & Odd Mode Page 3

4 Test Environment Hardware Page 4

5 Interconnect Vs Vin_open VL_open Vout_open VtStep SRC4 Vlow=0 V Vhigh=1 V Delay=0 nsec Rise=1 nsec t R R9 R=50 Ohm L L13 L=.01 nh R= C C10 C=.3 pf SLIN TL9 Subst="SSub2" W=10.0 mil L=6 in L L12 L=.01 nh R= C C9 C=.3 pf SLIN TL10 Subst="SSub2" W= mil L=3 in L L11 L=4.34 nh R= R R8 R=50 kohm Page 5

6 Measurement Methods Direct Measurement TDR (Time Domain Reflectometry, Time Domain) VNA (Vector Network Analyzer, Frequency Domain) Page 6

7 Measurement Method TDT (Transmitted Signal) V inc Incident Wave DUT TDR (Reflected signal) ZLoad Page 7

8 Direct Measurements Page 8

9 Freq = 100MHZ Page 9

10 Freq = 200MHZ Page 10

11 Freq =400 MHZ Page 11

12 Fundamental Differences Between Analog and Digital in Interconnect Applications Analog Digital -- Impedance Matching -- Impedance Matching for max power transfer to minimize signal distortion -- Frequency Domain -- Time Domain -- VNA -- TDR -- Amplitude loss -- Edge timing degradation -- Frequency -- Edge rate and frequency Page 12

13 Using the Reflected Waveform to Construct the Spice Model Direct Measurement TDR (Time Domain Reflectometry, Time Domain) Using the Reflected Waveform to construct the spice model Using ADS (Advanced Design Software) Transmission Line Theory VNA (Vector Network Analyzer, Frequency Domain) Page 13

14 V inc Incident Wave Lump or Distributed DUT ZLoad TDT (Transmitted Signal) TDR (Reflected signal) Page 14

15 Lump or Distributed T prop delay T rise Lump Parameter if: T rise > T prop delay * 6 Page 15

16 High Frequency Socket Model in Lump Parameters Valid up to 7GHz R R1 R=300 Ohm R R4 R=0 Ohm L L2 L=.1 nh R= C C1 C=.170 pf L L1 L=.80 nh R= C C2 C=.170 pf L L3 L=.10 nh R= Page 16

17 What is a transmission line A transmission line is any pair of conductor that has dimensions are constant for the length of the line that are used to move electromagnetic energy from one place to another. In printed circuit boards, this is typically a trace and one or more power planes. Power lines are transmission lines. Coaxial cable is a transmission lines. Twisted pairs are transmission lines. Electromagnetic waves are moving in a transmission line not electron Page 17

18 Characteristic Impedance Zo Zo Transmission line V = (R+jWL)I Short circuit Zo I = (G+jWC)V Open circuit Zo = (R+jWL) (G+jWC) For Low Loss L C Page 18

19 Transmission Line Fundamental Software Page 19

20 Time Domain Reflectometry (TDR) Page 20

21 Transmission Line Basic * p Page 21

22 Discontinuity Examples Page 22

23 Discontinuity Examples Page 23

24 Reflection Response is a function of System Rise Time Page 24

25 Impedance Profile Z 1 Z 2 Z 3 Propagation Page 25

26 TDR responses different due to lossy line SMA connector SMA connector PCB CHANNEL time, nsec Page 26

27 Filter Rise Time Calculation T risetime = 2.2 Tc = 2.2 RC T risetime = 2.2 Tc = 2.2 L/R T risetime = 3.4(LC)^1/2 Rise time of RC filter Rise time of RL filter Rise time of LC filter Page 27

28 Filter Rise Time Calculation (cont) C = 0.5pF R=50 Tr in = 400ps Tr filter =2.2 X 50 X.5 pf = 55pS Tr filter =2.2 X 25 X.5 pf = 27.5pS T rise composite = ( Tr in^2 + Tr filter^2 ) ^1/2 T rise composite = ps T rise composite = 400.9pS Page 28

29 T risetime = 2.2 Tc = 2.2 RC R=Zo/2 T risetime = 2.2 Tc = 2.2 L/R R=2*Zo Page 29

30 Filter Rise Time Calculation (cont) Note:Tr=k/BW3db Where: K from to 0.35 for gaussian pulse and single pole exponential decay respectively C = 0.5pF R=50 3 GHZ SCOPE Tr in = 400ps Tr filter =2.2 X 50 X.5 pf = 55pS Tr scope = 0.361/Frms = 120ps T rise composite = ( Tr in^2 + Tr filter^2 ) ^1/2 T rise composite = ps Output of filter Note:Tr=k/BWrms Where: K from 0.36 to for gaussian pulse and single pole exponential decay respectively T rise composite = ( Tr in^2 + Tr filter^2 + Tr scope^2 ) ^1/2 T rise composite = 421 ps Scope Display Page 30

31 Transmitted Rise Time of 2 different type of SMA cables Transmitted Rise Time of 2 different type SMA cables y = 0.032x 2 Rise Time in ps T risetime = K * L y = 0.004x Cable Length in inches 20GHZ BW SMA cable low BW SMA cable Page 31

32 Cable Length VS Rise Time of high BW sma cable. Using Reflected Signal to Predict Transmitted Signal Rise Time VS SMA (18GHZ Bandwidth) Cable Length Tr = KL 2 ; Reflect signal travels twice as the distance on the same cable (2L); Reflect rise time / Transmit rise time = 4 Reflected Signal Rise Time Rise Time in ps Tr = K*L^2 TR=0.016L^2 Transmitted Signal Rise Time TR=0.004L^ Cable Length in inches Transmit Reflect Best Fit Transmit Best Fit Reflect T incident TDT TDR Page 32

33 TDR indicates a large Capacitor presents at the load causing rise time to degrade to 5ns Page 33

34 Q/A Page 34

35 When Speed or Wire/Net length are important The edge rate (rise or fall time) of a signal is fast enough that the signal can change from one logic state to the other less time than it takes the signal to travel the length of the wire/net. Example: Rise time = 1ns, pcb trace length = 6 inch. v = 6 inch/ns. Overshoot and undershoot begins to show at ¼ of this length (1.5 inch). Page 35

36 When should impedance be controlled When the length of the transmission line exceeds ¼ of the transition electrical length ( TEL = Tr X Velocity) Tr= 1ns, Velocity = 6 inch/ns; TEL = 6 And When reflections may cause malfunction from: Overshoot or undershoot and The logic technology support termination Page 36

37 Reflection causes by un-proper termination with fast rise time R R2 R=10 Ohm Vin SLIN TL2 Subst="SSub1" W=6 mil L=6 in vout Term Term2 Num=2 Z=400 Ohm Rise time=0.5ns Period=10ns tprop =1ns (6 FR4 PCB) Rise time=25ns R R3 R=10 Ohm Vin2 SLIN TL3 Subst="SSub1" W=6 mil L=6 in vout2 Term Term3 Num=3 Z=400 Ohm Period=100ns Page 37

38 Reflection at Vo cause by Electrical length is longer than rise time without proper termination L < ¼ TEL L > ¼ TEL vout_ref, V Vin2, V vout2, V vout, V time, nsec Page 38

39 Frequency/VNA VS. Time Domain/TDR/Scope Frequency Domain Time Domain Steady state Narrow Bandwidth Better dynamic range More accurate Calibrate out fixture Can convert to time domain Data analysis more insightful Require calibration Longer to setup For lump parameter Transition Analysis Large Bandwidth Faster setup Less expensive/more common Direct representation For long transmission line Page 39

40 Square wave composition Square Wave Composition Amplitude f(t) = 2/3.14* SUM [ 1/n *SIN(2*3.14*F*t*n)]; Where n is 1,3 etc (odd number) -0.8 Time 1st har 3nd har 5rd har 7rd har 9rd har 11th har 13th har 15th har 17th har sum-to-5th sum-to-11th sum-to-17th Page 40

41 Frequency Spectrum of square wave Frequency Spectrum of the Sqaure Wave Relative Amplitue Harmonic # Page 41

42 S parameter Definition S 11 = V ref,1 / V inc,1 ; S 11db = 20 log (V ref,1 / V inc,1 ) S 21 = V port2 / V port1 ; S 21db = 20 log (V port2 / V port1 ) For passive DUT (linear system) S 22 = S 11 ; S 12 = S 21 Port 1 S 21 DUT Port 2 S 11 S 22 S 12 Page 42

43 Edge Rate VS Frequency Tr = 0.35/F 3db Page 43

44 Bandwidth Selection Rise Time Frequency BW rise time = 0.35/Tr BW1 system = 3*BW rise time BW2 system = 6 *Frequency BW system = MAX ( BW1, BW2 ) Page 44

45 Bandwidth Selection Clock Rise Time Tr. BW rise time = 0.35/Tr Interconnect BW with minimum signal distortion and loss BW interconnect = MAX ( 3 X BW rise time, 6 X Clock Frequency ) 400MHz frequency with: Rise time 3 X BW rise time 6 X BW signal BW interconn 200ps 5.25 GHZ 2.4 GHZ 5.25 GHZ 400ps 2.62 GHZ 2.4 GHZ 2.62 GHZ 800ps 1.31 GHZ 2.4 GHZ 2.4 GHZ Page 45

46 Bandwidth Selection Clock Rise Time Tr. BW rise time = 0.35/Tr Interconnect BW with minimum signal distortion and loss BW interconnect = MAX ( 3 X BW rise time, 6 X Clock Frequency ) Results from simulation: 3 X BW rise time causes approximately 3 % rise time degradation 6 X Frequency causes approximately 2 % amplitude loss Page 46

47 Signal Integrity Issues Impedance mismatch Reflection Crosstalk Ground bounce Inadequate power bus decoupling Propagation delay Dispersion Loss Page 47

48 Signal Integrity Components Signal Integrity Discontinuity (Connectors, via) Dispersion AC loss Skin Effect Dielectric Loss (loss tangent) Ground Bounce Inadequate power bus decoupling Differential Pair Less sensitive to components above Page 48

49 Dispersive Loss Reflection at the Interface of 2 Transmission lines: One cable is different loss than the other (Even the characteristics impedance is the same) Reflection coefficient is not zero and also frequency dependence. Page 49

50 AC LOSS Skin Effect Loss Dielectric Loss Page 50

51 Rise Time Degradation After Signal Propagates Through 5mil Width, 32 Long for the FR4 PCB Vout_32in_pcb, mv vin, mv Input Rise Time = 30pS Output Rise Time of 32in pcb = 1nS time, nsec Page 51

52 Skin Effect Highest inductance Lowest inductance Med inductance Page 52

53 Zo = (R+jWL) (G+jWC) Excerpt from PCB Design West Conf 3/21/ 2001 (GigaTest Labs) Page 53

54 Excerpt from PCB Design West Conf 3/21/ 2001 (GigaTest Labs) Page 54

55 Excerpt from PCB Design West Conf 3/21/ 2001 (GigaTest Labs) Page 55

56 AC Loss (Cont) Skin Effect Loss Dielectric Loss Page 56

57 Excerpt from PCB Design West Conf 3/21/ 2001 (GigaTest Labs) Loss Tangent Page 57

58 Zo = (R+jWL) (G+jWC) Excerpt from PCB Design West Conf 3/21/ 2001 (GigaTest Labs) Page 58

59 Dielectric Loss Loss Tangent of Various Materials Loss Tangent Teflon Roger6002 Getek Nelco/N FR4 Page 59

60 Skin Effect & Dielectric Loss of an FR4, 4 mils, 10mils trace width and 24 in length (ADS simulation) 0-2 Skin Loss -4-6 db(s(13,14)) db(s(3,4)) db(s(1,2)) Skin & Dielectric Loss freq, GHz Dielectric Loss Page 60

61 Skin & Dielectric Loss of an FR4, Roger of 4mils and 10mils Width, and 24 long (ADS simulation) Roger Dielectric Loss Roger, 10mils trace W db(s(17,18)) db(s(11,12)) db(s(15,16)) db(s(13,14)) db(s(9,10)) FR4, 4mils trace W FR4, 10mils trace W Roger, 4mils trace W freq, GHz Page 61

62 2.5Gb/s data for FR4 PCB with 4mils trace width, 24 long. 5Gb/s Output Signal Input Signal 2.5Gb/s Output Signal Page 62

63 Compensation Circuits R R11 R=50 Ohm C C1 C=800 pf C C2 C=40 pf C C3 C=2 pf t Vs_equal SLIN TL3 Subst="SSub1" W=4.0 mil L=24 in Vin_before_equal R R1 R=1.77 Ohm R R2 R=1.77 Ohm R R3 R=4.42 Ohm R R4 R=4.42 Ohm R R5 R=10.9 Ohm Vo_equal R R6 R=10.9 Ohm R R10 R=50 Ohm VtPulse SRC1 Vlow=0 V Vhigh=2 V Delay=0 nsec Edge=linear Rise=100 psec Fall=100 psec Width=3 nsec Period=9 nsec R R7 R=706 Ohm L L1 L=2 uh R= R R8 R=281 Ohm L L2 L=100 nh R= R R9 R=109 Ohm L L3 L=5 nh R= Compensation circuit from ITC 2002 by Wolfram Humann, Agilent Technologies Page 63

64 S-Par of before and after compensation Frequency Spectrum of the Sqaure Wave db(s(3,4)) db(s(1,2)) Before Compensation After Compensation Relative Amplitue freq, GHz Harmonic # Page 64

65 Time Domain of Before and After Compensation Vi compensation = 2 Vin Vin_s_equal, V Vin_equal, V Vin, V Vo, V Vo_equal, V Vi After compensation Vi Before compensation Vo After compensation Vo Before compensation time, nsec Vi at the compensation circuit Page 65

66 5Gb/s data for FR4 PCB with 4mils trace width, 24 long. Before Compensation After Compensation Page 66

67 Plot excerpt from the High-Speed Signal Propagation book, By Howard Johnson. Martin Graham Page 67

68 Critical Interconnect Components PCB vias Connectors and Cable Connectors Sockets Probe tips Packages and Multichip modules PCB traces Single Run Differential Run Page 68

69 Q/A Page 69

70 Signal Integrity Issues Impedance mismatch Reflection Crosstalk Ground bounce Inadequate power bus decoupling Propagation delay Dispersion Loss Page 70

71 Ground Bounce / Power Droop Vchip Vps di/dt = 50pf*1.52 (2V) / Trise^2 = 1.52E8 A/s PS_noise = L*di/dt Where: Trise = 1ns = 2nH * 1.52E8 A/s = 0.3V Vref Vground Page 71

72 Impedance VS Frequency of Real capacitor model 1.0K 100 Z in OHMS m 1.0KHz 10KHz 100KHz 1.0MHz 10MHz 100MHz 1.0GHz 10GHz V(R9:1)/ I(R9) Frequency Page 72

73 Decoupling and Board Capacitors C1,C2,C3 and C4 are decoupling caps Z Page 73

74 Impedance Response of Decoupling and Board Capacitance 3.0 R_ESR = 0.5 OHMS 1.0 Parallel Resonance Frequency Z OHMS 300m 100m 30m R_ESR = 0.05 OHMS C4 Series Resonance Frequency C3 C2 C1 10m 1.0KHz 10KHz 100KHz 1.0MHz 10MHz 100MHz 1.0GHz V( R9:1)/ I(R9) Frequency Page 74

75 Impedance Response of Decoupling and Board Capacitance 3.0 C_board = 100nF 1.0 C_board = 10nF Z OHMS 300m 100m 30m 10m 1.0KHz 10KHz 100KHz 1.0MHz 10MHz 100MHz 1.0GHz 10GHz V(R9:1)/ I(R9) Frequency Page 75

76 Differential pairs on PCB Not very good in common mode rejection with local cross talk. Coupling about 20% to 50% Match to an external balanced differential transmission medium. Defeat Ground Bounce Improve routability Reduce EMI Can be pushed very closed together to save board space. Compensate for differential impedance Once signals are paired, they can not be separated without messing up the impedance. Page 76

77 TDR Differential Measurement VtStep SRC1 Vlow=0 V Vhigh=1 V Delay=0 nsec Rise=40 psec C C2 C=1.0 pf t R R1 R=50 Ohm TLIN TL1 Z=50.0 Ohm E=90 F=1 GHz Vin_plus DUT Vo_plus R R3 R=50 Ohm t Vin_minus R R4 R=50 Ohm VtStep SRC2 Vlow=0 V Vhigh=1 V Delay=0 nsec Rise=40 psec R R2 R=50 Ohm TLIN TL2 Z=50.0 Ohm E=90 F=1 GHz SCLIN CLin1 Subst="SSub1" W=5.0 mil S=8.000 mil L=6 in Vo_minus C C1 C=1.0 pf Page 77

78 TDR Differential Waveforms Vo_plus, mv Vo_minus, mv Vin_plus, mv Vin_minus, mv Vin Vo time, nsec Page 78

79 4 Port single ended to differential S parameters S13 S31 S14 S41 Port1 Port3 S11, S12, S21,S22 S33, S34, S43,S44 Port2 Port4 S24 S42 S23 S32 SDD11, SDD12,SDD21,SDD22 Port1 Port2 SCC11, SCC12,SCC21,SCC22 Page 79

80 4 Ports single ended S parameters Page 80

81 2 Balanced Mode S parameters Page 81

82 Differential S parameters 10mils 2in Page 82

83 Poor Common Mode Rejection for PCB differential Pair Differential pair Induced Trace H GROUND K Crosstalk = ; Where K is always less than 1 1+ ( D/H)^2 D Page 83

84 Proximity Effect Ground Plane Skin Depth and Proximity Effect Ground Plane Page 84

85 Proximity Effect (Cont) Ground Plane Ground Plane Page 85

86 Odd and Even mode characteristic impedance C increases C decreases L decreases L increases Page 86

87 Impedance of Differential Pair Z odd = L self - L m C self + C m Z even = L self + L m C self - C m t (L self - L m )( C self + C m ) odd = t (L self + L m )(C self C m ) even = Z odd =<Zo Z diff = 2 * Z odd Z even >=Zo Z common = 1/2 Z even Page 87

88 Cross Talk Between PCB Traces Causing Shift in Propagation Delay vo_ustrip_neg_coupling, mv vo_ustrip_pos_coupling, mv vo_ustrip, mv Victim Timing shift due to aggressor with complement bit time, nsec No Cross Talk Original timing Timing shift due to aggressor with same bit pattern as victim Page 88

89 Modeling Circuit VtPulse SRC3 Vlow=0 V Vhigh=.4 V Delay=0 nsec Edge=linear Rise=45 psec Fall=45 psec Width=70 nsec Period=100 nsec t Var Eqn R R6 R=50 Ohm VAR VAR3 CS=.4pf CR=0.1pf CA=.2pf LS=.01nh LR=.1nh LA=1.4 nh vin_smaa TLIN TL8 Z=50 Ohm E=360 F=39.5 MHz C C12 C=.43pf L L5 L=LA R= C C11 C=CA SLIN TL7 Subst="SSub1" W=10 mil L=8 in C C10 C=CA L L6 L=LA R= C C9 C=.43pf Vout_smaA R R7 R=50 Ohm Page 89

90 Modeling: TDR simulation VS. Measurement Page 90

91 Simulation and measurements of S11 and S12 of w=10mils and L=2in; standard sma m2 ind Delta=-6.500E8 dep Delta= delta mode ON m1 freq=4.860ghz db(sim_single_10mils_2in_s_par..s(1,2))=-1. m2 m1 db(sin_10mils_2in_smas_2..s(1,2)) db(sin_10mils_2in_smas_2..s(1,1)) db(sim_single_10mils_2in_s_par..s(1,2)) db(sim_single_10mils_2in_s_par..s(1,1)) Wave L = v / F = C / [Sqr(Er) * F] freq, GHz Page 91

92 Critical Interconnect Components Which one is important? PCB via Connectors and Cable Connectors Socket Probe tips Packages and Multichip modules PCB trace Single Run Differential Run Page 92

93 S12 of 10mils width and 2in length of 3 types of sma connectors db(sin_10mils_2in_smas_2..s(1,2)) db(sin_10mils_2in_smar_2..s(1,2)) db(sin_10mils_2in_smaa..s(1,2)) freq, GHz Page 93

94 S12 of 4mils width and 32in length of 3 types of sma connectors db(sin_4mils_32in_smar..s(1,2)) db(sin_4mils_32in_smas_2..s(1,2)) db(sin_4mils_32in_smaa_2..s(1,2)) freq, GHz Page 94

95 THE END Page 95