ET 438b Sequential Control and Data Acquisition Department of Technology. Identify the electrical characteristics of a TTL interface

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1 4/25/26 LESSON 9: DGTAL NPUT OUTPUT SGNAL NTERFACNG ET 438b Sequential Control and Data Acquisition Department of Technology LEARNNG OBJECTVES After this presentation you will be able to: dentify the electrical characteristics of a TTL interface Explain the difference between sourcing and sinking digital inputs Select and design appropriate digital /O interface circuits Use software to control digital /O lines and ports. 2

2 4/25/26 DGTAL NPUT & OUTPUT SGNALS Digital input and output control and monitor external devices that have only on/off levels Boolean Logic form basis of numbering system and computer structure. Boolean Logic Boolean Logic Symbol State logic high logic low Logical Groupings ndividual bits: and s Groups of bits: 8bits = byte 6bits = 2 bytes = word All collections of bits are powers of 2 3 DGTAL NPUT & OUTPUT SGNALS Addressing bits in a byte Address location Bit Bit 7 = Bit 6 = Bit 5 = Bit 4 = Bit 3 = Bit 2 = Weighted number system conversion from binary to decimal n = n = = 98 Bit = Bit = 98 decimal equivalent of binary number 4 2

3 4/25/26 DGTAL HARDWARE STANDARDS Digital standards specify voltage levels of logic highs and logic lows, current output and input levels. Makes chips from same family compatible with each other Logic Standards TransistorTransistor Logic (TTL) 74 74LS series devices Nominal 5 V dc logic high and V dc logic low TTL chip /O pin electrical characteristics Source current: 4 ma Sink current:.6 ma ( unit load) Logic threshold voltage : V 2.4 V dc Logic threshold voltage V.8 V dc 5 DGTAL HARDWARE STANDARDS SOURCE AND SNK CURRENTS What is sourcing and sinking of device currents? Determined by position of voltage source, the switching device, and the load. Switch source of current 5 V dc Switch sink of current 5 V dc Load Load Switch connects voltage to load Switch connects load to ground 6 3

4 4/25/26 DGTAL HARDWARE STANDARDS SOURCE AND SNK CURRENTS Simple transistor sink and source representations Vcc = 5 Vdc L L flows to ground when V in = logic Switch model of gate V cc = 5 V dc LL V in R b V in =5 V R L V o V in = 5 V V L R L V o = V 5 V V in = 5 V for logic high and V for logic low When V in = 5 Vdc V o = V When V in = Vdc V o = 5 V Load will draw current when V in = 5 V dc. Switch (Transistor) must sink load current 7 SOURCE AND SNK CURRENTS Switch model of gate current sourcing V cc = 5 V dc L Circuit with transistor showing current sourcing V in V o Load LL Load LL V in When V in is 5 V load is deactivated (switch closed) When V in is V load draws current from source Transistor Logic nverter 8 4

5 4/25/26 SOURCE AND SNK CURRENTS TTL nverter symbol TTL nverters Sinking Current Load 5 Vdc R Sourcing current LL Output Port D D D2 D3 D4 D5 D6 D7 Resistors used to limit current through gate. TTL buffer limit:6 ma ( unit loads) 9 DGTAL NTERFACES For high current output use discrete transistor or relay (electromechanical or solid state) Solid State Relay 5 Vdc Ground AC AC TRAC Electrical solation : 75 V LED nput: 33 Vdc LED Devices integrated on the same chip. LED light output triggers TRAC that passes ac current. Does not electrically disconnect load from source beware of leakage currents 5

6 4/25/26 DGTAL NTERFACES Typical Application Ac Motor starting 5 V dc Motor Load /4 HP 2 Vac M 2 V Grd 5 V dc V o = V (grd), motor is on V o = 5 V motor is off nput Voltage From Port Output Voltage V o Port output is inverse of solidstate relay input DGTAL NTERFACES Electromechanical Relays Diode voltage spike protector To output bit 2 Vdc Typical To high current load AC or DC Relay coil dc resistance transistor load 2 Vdc Typical R b Resistor, R b sized to allow TTL level to turn on relay NPN transistor LS746 chip To high power loads AC or DC Current limited by the TTL chip Relay interface using open collector TTL inverter 2 6

7 4/25/26 DGTAL NPUT NTERFACES nterface should limit currents and voltage levels to TTL limits Mechanical switch interfacing Size resistor to limit current below sink limit To DAQ bus 5 Vdc 2.2 k 5/2.2k=2.3 ma 5 Vdc Mechanical switch Debounce switch Digital interface for digital port. Switches momentary contact or toggle 3 DGTAL NTERFACE: NONTTL LEVELS Use Optocoupler to isolate high voltages from TTL levels 24 V dc 2.2 kw Typical 5 Vdc Switch closed LED deenergized Switch open LED energized To TTL input R TTL inverter gate (744 or 744) Transistor off inverter input 5 Vdc output V Transistor on inverter input Vdc output 5 V Optocouipler Optocoupler ntegrated LED and optical transistor Energizing LED causes optical transistor to conduct 4 7

8 4/25/26 NTERFACE EXAMPLE Determine the logic levels and currents in the digital interface circuit shown below. Assume that the optocoupler diode has an onstate voltage drop of.4 V and the optical transistor has an onstate collectortoemitter drop of.4 V. 24 Vdc 2.2k R = 4N35 f 5 Vdc 2.2k c 744 To TTL input Logic open switch = = V close switch = = 5 V 5 NTERFACE EXAMPLE SOLUTON Device Specification 4N35 f = continuous forward current: 6 ma c = continuous collector current: 5 ma Source voltage isolation: 75 V peak 24 Vdc 2.2k R = Compute f with switch open to see if it exceeds the continuous rating f Write KVL around loop V D =.4 V 24 (2.2k)( f ) ( f ) 23 f f = A 9.83 ma 23 Current is within specifications 6 8

9 4/25/26 NTERFACE EXAMPLE SOLUTON (CONTNUED) With switch closed, LED is shorted out so f =. Switch must be open for optical transistor to conduct C 5 V L V ce =.4 V 2.2k L 744 Specifications OH = maximum source current from output: 4 ma OL = maximum sink current into output: 6 ma L = current flowing out of input when logic low V level (.4 V) is applied:.6 ma ( unit load) Assume optical transistor is in saturation Find c and determine if it is below 5 ma C = L L Find L from KVL around collectoremitter loop 5 (2.2k)( ).4 L C L mA 2.2k 2.mA.6 ma 3.7 ma Below maximum 7 NTERFACE EXAMPLE SOLUTON (CONTNUED) 8 Determine the interface logic. When optocoupler transistor conducts, the 744 input is logic low, therefore the inverter output is high. See table below 24 Vdc 2.2k R = 5 Vdc 2.2k 4N35 f c 744 To TTL input Switch Position LED Transistor 744 nput open on on Low (.4 V) closed off off High (5 V) 744 Output High (4.6) Low (.4 V) 9

10 4/25/26 ELECTROMECHANCAL RELAY EXAMPLE V s Size R b such that Q will activate with a TTL input b mh 5 W R b V be c 24Vdc Q V ce Relay coil model Transistor Parameters, Q (2N394) h FE = 2 (nominal) V ce(sat) =.2 V V be(sat) =.8 V Assume transistor is in saturation and compute the value of c Write a KVL equation around the collectoremitter circuit 24 5( c )V CE(sat) = 245( c ).2 = c 24.2 c 47.6 ma 5 9 ELECTROMECHANCAL RELAY EXAMPLE (CONTNUED) Relate the collector current, c, to the base current b using the dc gain, h FE. c 24Vdc The parameter, h FE also known as b is: V s b mh 5 W R b V be Q V ce Relay coil model c h FE 2 b Dc gain drops in saturation. Use h FE/ to account for this phenomena h FE 2 c 2 b c b 2.38 ma b b c 47.6 ma 2.38 ma 2 2 2

11 4/25/26 ELECTROMECHANCAL RELAY EXAMPLE (CONTNUED) Find value of R b from a KVL equation around the baseemitter circuit c 24Vdc Assume a TTL high level of 4.8 V Remember V be(sat) =.8 V V s b mh 5 W R b V be Q V ce Relay coil model V s b (R b ) V be(sat) = R b 4.8 V.8 V.68 kw 2.38 ma Ans Note: this value is above the maximum TTL source current of 4 ma. Drive Q from opencollector invertor 2 ELECTROMECHANCAL RELAY EXAMPLE (CONTNUED) nductive voltage protection using freewheeling diodes Freewheeling diode V coil Rb 2N394 Q 24Vdc mh Relay Coil model 5 W Cutingoff Q reduces c to zero Coil voltage changes polarity due to induction Collapsing magnetic field produces Diode D provides a path for the current induced when the transistor is switched off. t also clamps the induced voltage to the forward drop of the diode. (.7 V) 22

12 4/25/26 SMULATON RESULTSLTSPCE 23 Simulation without diode Circuit simulated c 5mA 4mA 3mA 2mA ma ma ma.kv (L) V(n).5KV.KV.s.s.2s.3s.4s.5s.6s.7s.8s.9s.s V ce SMULATON RESULTSLTSPCE Simulation with diode c 5mA (L) 23mA V ce 5mA 26V V(n) 3V V.s.s.2s.3s.4s.5s.6s.7s.8s.9s.s 24 2

13 4/25/26 SOFTWARE CONTROL OF DGTAL /O ndividual bit of an output byte can be toggled by the application of a binary mask number and the appropriate bitwise logic function. These functions include: OR, AND, XOR Procedure:. ) dentify present port binary pattern 2. ) Determine desired port binary pattern 3. ) Select appropriate bitwise operator 4. ) Determine correct mask value 5. ) Apply bitwise operator to present pattern and mask to create desired pattern. 25 SOFTWARE CONTROL EXAMPLE Example: An 8 bit digital output port drives a group of 8 LEDs through TTL inverters. Determine the binary byte value that will cause LEDs, 3, 5, 6 to light. Convert this byte to a decimal value. 26 3

14 4/25/26 SOFTWARE CONTROL EXAMPLE SOLUTON Port 5 V V 5 V dc Answer To light the LEDs, port outputs must be Logic (5 Vdc) input to the inverting buffer. This causes the inverter output to go to a logic ( V dc) sinking current through the inverter. Bit 7 Convert to decimal = = 5 27 SOFTWARE CONTROL EXAMPLE SOLUTON Determine the binary mask value and logic function that will toggle off LED 5 yet leave the other LEDs in their original state. New byte value Answer 5 Use AND function and a mask value that has a logic low bit in bit location 5. 5 original AND mask desired 28 4

15 4/25/26 SOFTWARE CONTROL EXAMPLE SOLUTON Determine the decimal value of the mask value from above. Mask = = 73 Now use a mask value and a logic function to turn on LEDs and 2 while leaving the others unchanged. Answer 7 2 Desired byte value Use the OR function and set the bits in positions and 2 in the mask to the high position. Make all the other bit values to complete the mask. 29 SOFTWARE CONTROL EXAMPLE SOLUTON Toggle bits and 2 2 Set these bits high OR original mask desired XOR function could also be used to toggle bits if a different mask value is used. Use the XOR function to turn all LEDs off. 3 5

16 4/25/26 SOFTWARE CONTROL EXAMPLE SOLUTON Review of XOR logic Y A B Answer A B Y Like bits produce logic Unlike bits produce logic Copy the original byte value and use it as the mask value. Using the XOR bitwise logic function will set all bits low. 7 Desired byte value 3 SOFTWARE CONTROL EXAMPLE SOLUTON XOR Mask Result XOR 7 original mask desired Example Summary.) AND Function with bit in mask resets output bit 2.) OR Function with bit in mask sets output bit 3.) XOR Function with opposite bit value from original set output bit XOR with same value as original value resets output bit 32 6

17 4/25/26 33 END LESSON 9: DGTAL NPUT OUTPUT SGNAL NTERFACNG ET 438b Sequential Control and Data Acquisition Department of Technology 7

ET 438B Sequential Digital Control and Data Acquisition Laboratory 4 Analog Measurement and Digital Control Integration Using LabVIEW

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