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1 THE UNIVERSITY OF TRINIDAD & TOBAGO FINAL ASSESSMENT/EXAMINATIONS APRIL/MAY 2014 Course Code and Title: Digital Electronics Programme: Communications Engineering Technology Diploma Date: 16 th April 2014 Time: 9:00am 12:00noon Duration: 3 Hours Read all instructions carefully before you begin this examination. Materials supplied: 1. Question Paper and Answer booklet Instructions to Candidates 1. This Paper comprises three (3) Sections and Eight (8) pages. 2. You are required to answer ALL questions in Section I and Section II and ANY TWO (2) from Section III. 3. The answers to Section I are to be completed on the Answer sheet provided by circling the most appropriate choice. 4. Begin each question in section II on a new page. 5. Please attach the Answer Sheets to your answer booklet, using string/s or staple/s. 6. You must return the question paper along with your answer booklet and other writing paper to the Invigilator at the end of the examination. 7. Use appendix B when required. Key Examination Protocol 1. Students please note that academic dishonesty (or cheating) includes but is not limited to plagiarism, collusion, falsification, replication, taking unauthorised notes or devices into an examination, obtaining an unauthorised copy of the examination paper, communicating or trying to communicate with another candidate during the examination, and being a party to impersonation in relation to an examination. 2. The above mentioned and any other actions which compromise the integrity of the academic evaluation process will be fully investigated and addressed in accordance with UTT s academic regulations. 3. Please be reminded that speaking without the Invigilator s permission is NOT allowed. The University of Trinidad & Tobago Page 1 of 8
2 Question 1. (Show working) SECTION II Essay-Type Items (Answer ALL Questions) (a) (b) (c) (d) Convert the decimal number to: (i) Binary (ii) Hexadecimal Convert the binary number to: (i) Octal (ii) Hexadecimal Convert the octal number to: (i) Decimal (ii) Hexadecimal Write the decimal number 487 in: (i) BCD code (ii) Excess-3 code [16 marks] Question 2. (a) For the logic circuit shown in Figure 1 obtain the Boolean expression for the output X, simplify this expression and develop a truth table for the logic circuit. (b) (c) Figure 1 Use a truth table to prove that the Boolean equation is correct. Simplify the following equations using Boolean algebra. [8 marks] [3 marks] (i) (ii) (iii) The University of Trinidad & Tobago Page 3 of 8
3 Question 3. Sketch the output waveforms for the following gates given the input waveforms A and B as Shown in Figure 2 in the Answer sheet provided in Appendix A. Figure 2 (i) An OR gate. (ii) An AND gate. (iii) An EX-NOR gate. (iv) An EX-OR GATE Question 4. (a) (i) Use Karnaugh mapping techniques to determine the minimal SOP expression for the Boolean equation. W = A B C D + A B C D + A B C D + A B C D + A B C D + A B C D [7 marks] (ii) Hence draw the logic circuit for the minimal SOP solution. [3 marks] (b) Use Karnaugh mapping techniques to simplify the truth table in Figure 3 into a minimal SOP expression for Z. [7 marks] Hence draw the logic circuit for the minimal SOP solution using only NAND gates. A B C D Z Figure 3 [3 marks] The University of Trinidad & Tobago Page 4 of 8
4 SECTION III Essay-Type Questions (Answer Any TWO Questions) Question 5. Figure 4 shows a diagram for an automobile alarm circuit used to detect certain undesirable conditions. The three switches are used to indicate the status of the door by the driver s seat, the ignition, and the headlights, respectively. Design the logic circuit with these three switches as inputs so that an alarm will be activated whenever either of the following conditions exists: The headlights are on while the ignition is off. The door is open while the ignition is on. i) Obtain the truth table of the system ii) Obtain the sum of products (SOP) Boolean expression for the system. iii) Implement the system using AND, NOT and OR logic gates using the least amount of gates. Figure 4 The University of Trinidad & Tobago Page 5 of 8
5 Question 6. A house has two lights to illuminate the stairs leading from the hall to the upstairs landing. The lights can be switched OFF and ON by either one of two switches, one in the hall and one in the landing. The lights are to be OFF when both switches are either ON or OFF together, and the lights are to be ON when one switch is ON and the other is OFF. i) Obtain the truth table of the system ii) Obtain the sum of products (SOP) Boolean expression for the system. iii) Implement the system using AND, NOT and OR logic gates using the least amount of gates. Question 7. A bank vault has 3 locks with a key for each lock. Key A is owned by the bank manager. Key B is owned by the senior bank teller. Key C is owned by the trainee bank teller. In order to open the vault door at least two people must insert their keys into the assigned locks at the same time. The trainee bank teller can only open the vault when the bank manager is present in the opening. i) Determine the truth table for such a digital locking system ii) Design, using Karnaugh Map techniques, a minimum AND-OR gate network to realise this locking system. Question 8. A car seat belt interlock requires that the car should only start if the driver s seat belt is fastened and either the front passenger seat is unoccupied or the front passenger seat is occupied and the passenger seat belt is fastened. i) Obtain the truth table of the system ii) Obtain the SOP Boolean expression for the system. iii) Use a Karnaugh map to simplify the SOP Boolean expression iv) Implement the system using AND, NOT and OR logic gates. END OF EXAMINATION The University of Trinidad & Tobago Page 6 of 8
6 APPENDIX A Answer Sheet Candidate No : Question 3 (i) (ii) (iii) An OR gate. An AND gate. An EX-NOR gate. (iv) An EX-OR GATE Please attach this Answer Sheet to your answer booklet The University of Trinidad & Tobago Page 7 of 8
7 APPENDIX B The University of Trinidad & Tobago Page 8 of 8
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