Digital Fundamentals

Transcription

1 07/ago/2017 Digital Fundamentals ELEVENTH EDITION CHPTER 1 Introductory Concepts

2 Digital electronics uses circuits that have two states, which are represented by two different voltage levels called HIGH and LOW. The voltages represent numbers in the binary system. In binary, a single number is called a bit (for binary digit). bit can have the value of either a 0 or a 1, depending on if the voltage is HIGH or LOW. FIGURE 1-6 Logic level ranges of voltage for a digital circuit.

3 Digital waveforms change between the LOW and HIGH levels. positive going pulse is one that goes from a normally LOW logic level to a HIGH level and then back again. Digital waveforms are made up of a series of pulses. FIGURE 1-7 Ideal pulses.

4 ctual pulses are not ideal but are described by the rise time, fall time, amplitude, and other characteristics. FIGURE 1-8 Nonideal pulse characteristics.

5 FIGURE 1-9 Examples of digital waveforms. In addition to frequency and period, repetitive pulse waveforms are described by the amplitude (), pulse width (t W ) and duty cycle. Duty cycle is the ratio of t W to T. Volts mplitude () Pulse width (t W ) Period, T Time

6 Periodic pulse waveforms are composed of pulses that repeats in a fixed interval called the period. The frequency is the rate it repeats and is measured in hertz. f = 1 T T = 1 f The clock is a basic timing signal that is an example of a periodic wave. What is the period of a repetitive wave if f = 3.2 GHz? T = 1 f = GHz = 313 ns

7 Digital Fundamentals ELEVENTH EDITION CHPTER 3 Logic Gates

8 The Inverter FIGURE 3-1 Standard logic symbols for the inverter (NSI/IEEE Std /Std. 91a-1991).

9 The Inverter The inverter performs the oolean NOT operation. When the input is LOW, the output is HIGH; when the input is HIGH, the output is LOW. Input Output LOW (0) HIGH (1) HIGH (1) LOW(0) The NOT operation (complement) is shown with an overbar. Thus, the oolean expression for an inverter is =.

10 The Inverter Example waveforms: group of inverters can be used to form the 1 s complement of a binary number: inary number s complement

11 The ND gate FIGURE 3-8 Standard logic symbols for the ND gate showing two inputs (NSI/IEEE Std /Std. 91a- 1991).

12 The ND gate The ND gate produces a HIGH output when all inputs are HIGH; otherwise, the output is LOW. For a 2-input gate, the truth table is Inputs Output The ND operation is usually shown with a dot between the variables but it may be implied (no dot). Thus, the ND operation is written as =. or =

13 The ND gate FIGURE 3-10 Example of ND gate operation with a timing diagram showing input and output relationships.

14 The ND gate Example waveforms: The ND operation is used in computer programming as a selective mask. If you want to retain certain bits of a binary number but reset the other bits to 0, you could set a mask with 1 s in the position of the retained bits. If the binary number is NDed with the mask , what is the result?

15 The ND gate Waveform for? FIGURE 3-13

16 The ND gate FIGURE 3-15 oolean expressions for ND gates with two, three, and four inputs.

17 The OR gate 1 The OR gate produces a HIGH output if any input is HIGH; if all inputs are LOW, the output is LOW. For a 2-input gate, the truth table is Inputs Output The OR operation is shown with a plus sign (+) between the variables. Thus, the OR operation is written as = +.

18 The OR gate Example waveforms: The OR operation can be used in computer programming to set certain bits of a binary number to 1. SCII letters have a 1 in the bit 5 position for lower case letters and a 0 in this position for capitals. (it positions are numbered from right to left starting with 0.) What will be the result if you OR an SCII letter with the 8-bit mask ? The resulting letter will be lower case.

19 The OR gate FIGURE 3-23

20 The OR gate FIGURE 3-24 oolean expressions for OR gates with two, three, and four inputs.

21 The NND gate & The NND gate produces a LOW output when all inputs are HIGH; otherwise, the output is HIGH. For a 2-input gate, the truth table is Inputs Output The NND operation is shown with a dot between the variables and an overbar covering them. Thus, the NND operation is written as =. (alternatively, = )

22 The NND gate Example waveforms: The NND gate is particularly useful because it is a universal gate all other basic gates can be constructed from NND gates. 2-input NND gate with both inputs connected together is equivalent to which gate?

23 The NND gate The output waveform is LOW only when all three input waveforms are HIGH as shown in the timing diagram. FIGURE 3-29

24 The NOR gate 1 The NOR gate produces a LOW output if any input is HIGH; if all inputs are HIGH, the output is LOW. For a 2-input gate, the truth table is Inputs Output The NOR operation is shown with a plus sign (+) between the variables and an overbar covering them. Thus, the NOR operation is written as = +.

25 The NOR gate Example waveforms: The NOR operation will produce a LOW if any input is HIGH. When is the LED is ON for the circuit shown? +5.0 V 330 W The LED will be on when any of the four inputs are HIGH. C D

26 The NOR gate FIGURE 3-37

27 The OR gate = 1 The OR gate produces a HIGH output only when both inputs are at opposite logic levels. The truth table is Inputs Output The OR operation is written as = +. lternatively, it can be written with a circled plus sign between the variables as = +.

28 The OR gate Example waveforms: Notice that the OR gate will produce a HIGH only when exactly one input is HIGH. If the and waveforms are both inverted for the above waveforms, how is the output affected? There is no change in the output.

29 The OR gate a b c d OR or de n entradas: - 1 quando número de bits é impar - Corresponde à soma dos bits

30 The NOR Gate = 1 The NOR gate produces a HIGH output only when both inputs are at the same logic level. The truth table is Inputs Output The NOR operation shown as = +. lternatively, the NOR operation can be shown with a circled dot between the variables. Thus, it can be shown as =

31 FIGURE 3-48

32 TLE 3 13 n OR gate used to add two bits.

33 Resumão das Portas

34 Transformações entre Representações Lógicas

35 Transformações entre Representações Lógicas

36 [John_R._Gregg]_Ones_and_Zeros_Understanding_ool(ookZZ.org)

37 [John_R._Gregg]_Ones_and_Zeros_Understanding_ool(ookZZ.org)

38 Examine the conditions indicated in Figure 3 92, and identify the faulty gates.

39 Simplificação Lógica Lógica simplificada == hardware mais eficiente Menor área de hardware Menor o atraso da lógica Próximo conteúdo: simplificação lógica.