Manipulate Boolean expression using Boolean theorem and

Transcription

1 LERNING OUTOMES 6 th EDITION t the end of this course, the students would be able to: Differentiate between digital and analogue system principles. onvert numbers between different numerical systems and codes. Manipulate oolean expression using oolean theorem and Karnaugh Map. Synthesize logic circuit its relation with oolean algebra. Design register and counter using memory element circuit. Justify data converters design based on its application. MUHMMD SHUKRI IN HMD DR. MUHMMD MHDI IN DUL JMIL HMD LQRI IN M RDZI ROKIH INTI NSRUDDIN TENGKU NDZLIN IN TENGKU IRHIM MZIT INTI MOHMD ID LIL INTI HMD FKULTI KEJURUTERN ELEKTRIK DN ELEKTRONIK UNIVERSITI TUN HUSSEIN ONN MLYSI

2 HPTER INTRODUTION TO DIGITL SYSTEM OUTLINE NUMERIL REPRESENTTION DIGITL ND NLOG SYSTEM DVNTGES OF USING DIGITL OVER NLOG LIMITTION OF DIGITL SYSTEM OVEROMING THE LIMITTION OF THE NLOG WORLD DIGITL NUMER SYSTEM REPRESENTING INRY QUNTITIES DIGITL DT TRNSMISSION MEMORY ND NON-MEMORY IRUIT DIGITL OMPUTERS

3 . NUMERIL REPRESENTTION For a physical system to manipulate quantities, the quantities must be represented in a numerical value. Let s look at temperature for an example, our body can feel hot or cold, but for a physical system to understand hot and cold, the temperature quantities must be represented in numerical values (in this case in unit degree elsius, o ). There are basically two ways of representing numerical value of quantities; analog and digital nalog Representations In analog representation, a quantity is represented by a variable that will change proportionally with the quantity. Lets look at this three example: ar speedometer: the deflection of the needle is proportional to the car speed and follows any changes that occur ( speed up or slows down) Mercury thermometer: the height of the mercury in the column will go up and down proportional to the room temperature. The level of mercury represents the value of temperature. n important characteristic of analog quantities is that it can vary over a continuous range of data. nalog or analogue? In the U.S., the spellings analog and analogue are interchangeable for the noun (except, for example, in the literary sense above); the adjective is usually spelled analog. In the rest of the English-speaking world the spelling is usually analogue for both noun and adjective; see og/ogue. However, the spellings given above should be retained in cases where it forms part of a name or is an acronym. Digital Representation digital system is one that uses discrete numbers, especially binary numbers, or non-numeric symbols such as letters or icons, for input, processing, transmission, storage, or display, rather than a continuous spectrum of values (an analog system). digital clock provides time in decimal digit that represents hours and minutes (and also seconds). Time itself change continuously but the changes shown in a digital clock are in steps (of one second for example). n important characteristic of digital quantities is that it can vary over a discrete range of data.

4 Did you know? The word digit comes from word digitus: the Latin word for finger (counting on the fingers as these are used for discrete counting). REMEMER analog = continuous digital = discrete. DIGITL ND NLOG SYSTEM digital system is combinations of devices that takes digital data (logical information or physical value in digital form) and manipulate/processed them. These devices are mostly electronics, but can also be a mechanical, magnetic or pneumatic. n analog system in the other hand is a combination of devices that manipulate values that are represented in analog form (continuous). Some of the common analog systems are amplifier and simple light dimmer..3 DVNTGES OF USING DIGITL OVER NLOG The usual advantages of digital circuits when compared to analog circuits are: Less affected by noise. In fact, if the noise is below a certain level (the noise margin), a digital circuit behaves as if there was no noise at all, this is a necessary and sufficient property for a circuit to be considered a digital circuit. However, if the noise exceeds this level, the digital circuit can give catastrophically wrong results. nalog signal transmission and processing, by contrast, always introduces noise. Ease of design: Digital systems are easier to design compared to analog system because only two level of signal are involved. Programmable: Digital systems interface well with computers and are easy to control with software. It is often possible to add new features to a digital system without changing hardware, and to do this remotely, just by uploading new software. Design errors or bugs can be worked-around with a software upgrade, after the product is in customer hands.

5 Fabrication technique advancement: More digital circuitry can be fabricated per square millimeter of integrated-circuit material (wafer). Ease of information storage: Information storage can be much easier in digital systems than in analog ones. In particular, the great noise-immunity of digital systems makes it possible to store data and retrieve it later without degradation. In an analog system, aging and wear and tear will degrade the information in storage, but in a digital system, as long as the wear and tear is below a certain level, the information can be recovered perfectly. Higher accuracy and precision: Theoretically, there is no dataloss when copying digital data. This is a great advantage over analog systems, which faithfully reproduce every bit of noise that makes its way into the signal..4 LIMITTION OF DIGITL SYSTEM The usual disadvantages of digital circuits when compared to analog circuits are: The world in which we live is analog, and signals from this world such as light, temperature, sound, electrical conductivity, electric and magnetic fields, and phenomena such as the flow of time, are analog quantities rather than discrete digital ones. For a digital system to do useful things in the real world, translation from the continuous realm to the discrete digital realm must occur (analog to digital conversion) [see.5]. Digital systems can be fragile, in that if a single piece of digital data is lost or misinterpreted, the meaning of large blocks of related data can completely change. This problem can be mitigated by designing the digital system for robustness. For example, a parity bit or other error-detecting or error-correcting code can be inserted into the signal path so that if less than a certain fraction of the data is corrupted, the system can determine that this has occurred and possibly uncorrupt the data, or ask for the corrupted data to be resent. Digital circuits are made from analog components, and care has to be taken in design so that the analog natures of these components don't dominate over the desired digital behavior. In particular, attention must be paid to all noise and timing margins, to parasitic inductances and capacitances that can cause

6 intermittent problems such as "glitches". Digital circuits use more energy than analog circuits to accomplish the same calculations and signal processing tasks, thus producing more heat as well. In portable or battery-powered systems this can be a major limiting factor, but in a situation where power is plentiful, a digital system is often preferred because of all the advantages listed above, especially that of (re-) programmability and ease of upgrading without requiring hardware changes. Digital circuits are sometimes more expensive, especially in small quantities..5 OVEROMING THE LIMITTION OF THE NLOG WORLD To enable a digital system to process analog information, these analog information needs to be translated into a representation that can be understand by a digital system (digital form). So a process of translation (or conversion) from analog to digital form must be done by circuit called nalog-to-digital onverter, in shorts D. Similarly, for a digital system to control an analog devices, digital data need to be converted to analog form. This process is done by a Digital-to-nalog onverter, in short D. D ND D esides the abbreviation D, some books and authors uses /D or to D. For this module, we will use D abbreviation for nalog-to-digital converter and D for Digital-to-nalog onverter. Figure. shows a block diagram for a digital temperature control system. Explanations for each block are shown in table..

7 FIGURE. lock diagram for a digital temperature control system NLOG SENSOR / TRNSDUER ONVERSION NLOG-TO- DIGITL ONVERTER DIGITL SIGNL NLOG SIGNL DIGITL PROESSING NLOG SIGNL ONTROLLER DIGITL-TO- NLOG ONVERTER DIGITL SIGNL TLE. lock explanation of a digital temperature control system Sensor/transducer D Digital Processing D ontroller onvert physical variable to electrical signal (analog form). In this case, it is a thermostat that will measure the temperature. hange analog signal to digital signal Will do the processing to determine the necessary adjustment. In can be a microcontroller. hange digital signal to analog signal Will take action to adjust the temperature. It can be a fan or an air conditioner circuit..6 DIGITL NUMER SYSTEM Within this subject, we will look at the four most common numbering systems for digital use, decimal, binary, octal and hexadecimal. In this topic, an introduction for decimal and binary system will be given and for the other two system, we will look at it in the next chapter. bbreviation DE = Decimal IN = inary OT =Octal HEX = Hexadecimal

8 Decimal System This is the most common numbering system. It is called base- because it consists of ten symbols that are,,, 3, 4, 5, 6,7, 8, and 9. The decimal system is a positional numeral system; it has positions for units, tens, hundreds, etc. The position of each digit conveys the multiplier (a power of ten) to be used with that digit, each position has a value ten times that of the position to its right. Take 345 for an example, 3 is for three hundred, 4 is for forty, and 5 is for five. So we can say that: The number three is the most significant digit because it has the weight of while number 5 is the least significant digit because it has the weight of. inary System bbreviation MSD = most significant digit LSD = Least significant digit This system in the other hand only consists of symbols, and. Thus, it is also known as a base- system. ounting in binary is similar to counting in any other number system. eginning with a single digit, counting proceeds through each symbol, in increasing order. Decimal counting uses the symbols through 9, while binary only uses the symbols and. When the symbols for the first digit are exhausted, the next-higher digit (to the left) is incremented, and counting starts over at. In decimal, counting proceeds like this:,,,... 7, 8, 9, (rightmost digit starts over, and next digit is incremented),,, , 9, 9,... 97, 98, 99, (rightmost two digits start over, and next digit is incremented),,,... fter a digit reaches 9, an increment resets it to but also causes an increment of the next digit to the left. In binary, counting is the same except that only the two symbols and are used. Thus after a digit reaches in binary, an increment resets it to but also causes an increment of the next digit to the left:

9 ,, (rightmost digit starts over, and next digit is incremented),, (rightmost two digits start over, and next digit is incremented),,... inary system are also a positional numeral system that has different weight for each bit (in decimal we call it digit) depending on the position. Let take the number binary as an example inary Notation Notice that in the previous example that subscript and are use to differentiate between binary and decimal. These conventions are user to avoid confusion when multiple number systems are used. Other than subscript notation, there are other type of notation such as: binary (explicit statement of format) b (a suffix indicating binary format) bin (a prefix indicating binary format) Pronouncing a inary Number When pronounce, binary numerals are usually pronounced by pronouncing each individual digit, in order to distinguish them from decimal numbers. For example, the binary numeral "" is pronounced "one zero zero", rather than "one hundred", to make its binary nature explicit, and for purposes of correctness..7 REPRESENTING INRY QUNTITIES To represent quantities in a digital system, it makes more sense to make use binary system because we only concern about two state rather than decimal ( states). Things that has only two operating states in two extreme conditions such as switch (on-off), light bulb (bright-dark), transistor (cutoff-saturated) etc. Transistor - Digital or nalog Devices Device such as transistor actually can perform as both digital and analog device. ut-off and saturation region are used for digital purposes, while active/linear region are used for analog purposes.

10 Digital electronics is based on a number of discrete voltage levels, usually two, as distinct from analog electronics which uses voltages to represent variables directly. In most cases the number of states is two, and these states are represented by two voltage levels: one near to zero volts and one at a higher level depending on the supply voltage in use. These two levels are often represented as "Low" and "High." The two states of a wire are usually represented by some measurement of electric current and voltage (voltage is the most common), but current is used in some logic families. threshold is designed for each logic family. When below that threshold, the wire is "low," when above "high." Digital circuit establish a "no man's area" or "exclusion zone" that is wider than the tolerances of the components. The circuits avoid that area, in order to avoid indeterminate results. It is usual to allow some tolerance in the voltage levels used; for example (see figure.), to volts might represent logic, and 3 to 5 volts logic. voltage of to 3 volts would be invalid and would occur only in a fault condition or during a logic level transition, as most circuits are not purely resistive, and therefore cannot instantly change voltage levels. However, few logic circuits can detect such a fault, and most will just choose to interpret the signal randomly as either a or a. Figure. Presenting binary values using voltage level. The levels represent the binary integers or logic levels of and. In active-high logic, "low" represents binary and "high" represents binary. ctive-low logic uses the reverse representation. Table. shows examples of binary logic levels. Table. inary logic level for different technology. Technology L voltage H voltage Notes MOS V to V/ V/ to V V = supply voltage TTL V to.8v V to V V is 4.75V to 5.5V EL -.75V to -VEE.75V to V VEE is about -5.V V=Ground

11 .8 DIGITL DT TRNSMISSION Other than operation of a digital system, another issue is the transmission of the information from one place to another. The distance maybe as small as in the same P (printed circuit board), a few meters (such as printing or networking) or over several miles (internet or phone line). This section will look at the two most common transmission method, serial and parallel data transmission. Serial Data Transmission Figure.3 Serial transmission diagram In serial data transmission, data are send bit by bit (one after another) in a predefine interval of time for each bit starting from the LS (typical for serial communication) over a single wire. Figure.3 shows the serial transmission for 8-bit binary data. Serial transmission OUT IN omputer Printer Nibble, it, yte, Word and Longword 4 bit = nibble nibble = byte (8 bit) byte = word (6 bit) word = longword (3 bit) In parallel data transmission, data are sent simultaneously. Let take the same 8-bit binary as the previous example transmitted via an 8-bit data bus. Each bit will occupy one line and all 8-bit are sent simultaneously.

12 Figure.4 Parallel Transmission Diagram omputer LS Parallel Transmission Printer Figure.5 Parallel Transmission Diagram using Data bus symbol omputer Data us 8-bit data bus means that there are 8 line connections for data transmission. Figure.5 show symbolic representation of an 8- bit data bus 8 Printer The common trade off between these two methods is speed versus simplicity. We can see from the previous example that parallel transmission is 8 times faster than serial transmission because all eight bits are sent simultaneously. On the other hand, serial transmissions offer more simplicity because only one wire is required (low cost). Therefore, parallel transmission is used for high-speed data transfer while serial transmission is used for long distant data transfer. Is one wire enough for serial transmissions? Theoretically yes, but practically no. Usually extra wires are added for ensuring the reliability of the transfer such as ground reference line.

13 .9 MEMORY ND NON MEMORY IRUIT For a non-memory circuit, the change in input will also result in the change of output, and when it changes back to its original state, the output will also change to its original states. Memory circuit however will retain (hold) the output states although the input reverts back to its original state. Figure.6 Non-memory and memory circuit comparison INPUT NON-MEMORY IRUIT OUTPUT MEMORY IRUIT In analog electronics, device such as inductor and capacitor are memory element. Take capacitor for an example, its ability to store energy through charging process and release energy through discharging process will allow the circuit to retain (for some amount of time) the voltage are basically a memory characteristic. In digital electronics, flip-flop is the basic memory element circuit. We will see this later in chapter 4.. DIGITL OMPUTER In a digital computer, there are many parts that can be broken down into five functional blocks, rithmetic Logic Unit (LU), ontrol Unit, memory, input and output. Table.3 summarizes each block description. Table. asic functional block of a digital computer lock LU Input Output ontrol Unit Description ll the processing such as arithmetic and logical operation are done here. Takes input from the outside world. E.g. US (scanner) and serial or US or P/S (keyboard and mice) Used for outputting data. E.g. US or parallel port (printing) and VG or DVI port (display). Takes instruction from memory, interprets (decodes) it and then executes it by sending instruction to other units.

14 Figure.7 Functional diagram of a digital omputer INPUT entral Processing Unit (PU) rithmetic Logic Unit (LU) OUTPUT ontrol Unit RM ROM MEMORY. EXTR REDING SSIGNMENTS What is Fuzzy Logic. esides analog and digital system, there is also a Mixed Mode System. Explain what it is. US connection is serial or parallel data transmission system?

15 TUTORIL OJETIVE QUESTION. Which of the following quantities is a digital quantity? (a) ltitude of an aircraft (b) Pressure in a bicycle (c) urrent through a resistor (d) The amount of time before the buzzer goes off. quantity that has continuous values is (a) a digital quantity (b) an analog quantity (c) a binary quantity (d) a natural quantity 3. Which quantity below representing an analog quantity? (a) the hourly changes of air temperature (b) original sound wave (c) vehicle speed over an hour (d) recorded data on D tracks 4. Which of the following is not an advantage of digital system? (a) Digital circuits are less affected by noise (b) Energy usage is minimal (c) Operation can be programmed (d) Information storage is easy. 5. The following are analog information processing system except (a) FM radio (b) Television receiver (c) Handphone (d) Electronic organ

16 6. ased on figure above, what is the name of the component in the box? (a) Voltmeter (b) Digital-nalogue onverter (c) mmeter (d) nalogue-digital onverter 7. The term bit means (a) a small amount of data (b) a or (c) binary digit (d) both answers (b) and (c) 8. Numbers are entered into a microcontroller-based system in D, but stored in straight binary. If the system takes a 3-digit decimal entry, how many bytes of your storage location will be allocated for this? (a) 4 bytes (b) 3 bytes (c) bytes (d) bytes 9. If a high logic level is assigned a binary and a low is assigned the logic is called (a) binary logic (b) positive logic (c) invalid logic (d) negative logic. How much time is required for a parallel transfer of 6 bits data if the clock frequency is MHz? (a) ms (b) μs (c) 6μs (d) ns. Suppose that the decimal integer values from to 5 are to be transmitted in binary. How many lines will be needed if parallel representation is used? (a) 8 (b) 7 (c) 6 (d) 5

17 . Serial data transmission is employed to send data from a computer to a modem. The least significant bit is sent first. What is the data received at the modem if the data is? (a) (b) (c) (d) 3. entral Processing Unit (PU) comprises of control unit and (a) input unit (b) memory unit (c) output unit (d) arithmetic/logic unit STRUTURED QUESTION. Data transmission is the common operation that occurs in any digital system. State two types of digital data transmission.. Suppose a digital system is used to transmit the decimal integer values from to. (i) (ii) If the system has unlimited number of connection lines, what is the type of transmission would be best employed so that the time delay would be as minimum as possible? What are the minimum lines required in this transmission? (iii) If the number of connection lines available is only, what type of transmission should be employed here? (iv) Suppose the type of transmission in part b(ii) is employed with the least significant bit is sent first, what would be received by the receiver if number is sent by the transmitter? 3. Elaborate some applications which use digital system in the field of: (i) (ii) Image Processing. Medical Equipment. (iii) Power plant. 4. There are two mostly employed data transmissions for a digital system. (i) ompare between serial and parallel data transmission.

18 (ii) What is the main advantage of parallel transfer of binary data? (iii) In terms of design, which approach offers a better solution? 5. Explain the difference between analog and digital quantities Give an example that is combination of both analog and digital system. 6. Discuss the advantages of using digital system over analog. 7. Explain how a digital system can process analog information.

19 HPTER NUMERIL REPRESENTTION OUTLINE INRY SYSTEM INRY RITHMETI SIGN ND UNSIGNED NUMERS SIGNED NUMERS RITHMETI OPERTION HEXDEIML NUMERING SYSTEM DIGITL NUMER SYSTEM OTL NUMERING SYSTEM DIGITL ODE ERROR DETETION

20 In this chapter, we will look binary, hexadecimal and octal numbering system.. inary System This is the fundamental of digital system. In digital system, mostly we dealt with binary number rather than decimal because it only has two states. We can always convert binary to and from other system depending on our needs. inary to Decimal onversion ecause of binary is a positional numbering system, each bit has a different weight. The following figure. shows the weight for each bit position. Figure. inary weight Decimal value Weight inary point Example. onvert. to decimal. Whole number (positive power of two) inary point Fractional number (negative power of two) Weight ( ) ( ) ( ) ( ) ( ) 4 ( ) ( ) Example. onvert. to decimal ( ) ( ) ( ) ( ) ( ) ( ) ( ) Example.3 onvert. to decimal ( ) ( ) ( ) ( ) ( ) ( )

21 Decimal to inary onversion To convert decimal numbers to binary, the decimal number are divided by using repeated-division-method. Figure. shows the step for conversion of 3 to binary. The result is. Figure. Repeateddivisionmethod for decimal to binary conversion remainder Read from bottom ( remainder) 6 3 ( remainder) 3 ( remainder) ( remainder) = Example.4 onvert 89 to 8-bit binary. remainder TIPS ND TRIKS 5 It is always a good practice to write binary numbers in group of four to avoid mistake (add space between them). 89 = Example.5 onvert to 8-bit binary. remainder = REMEMER dd an extra zero s in the in front of the answer to make it 8-bit. We will see the practicality of this when we start discussing about signed numbers

22 Now let s take a look at converting a decimal number with fraction to binary. The digit to the left of the decimal point can be converted using the repeated-division-method as previous example, but for the digit to the right of the decimal point (fractional part), we will do repeatedmultiplication-method. Figure.3 shows how to convert fractional decimal (.6875) to binary. Figure.3 Repeatedmultiplicationmethod for decimal to binary conversion.6875 X =.375 X = X =.5 + Read from top 3.5 X = + 4 Stop when.6875 =. Example.6 onvert 37.35to binary. Stop at the 4 th fractional bit. From previous example we already know that 37=. For the fractional part, 5 Read from top.35 X = X = X = X = + 4 Stop when.35 =. Therefore, =.

23 Example.7 onvert.876to binary. Stop at the 4 th fractional bit. From previous example we already know that =. For the fractional part, 5 Read from top.876 X = X = X = X = =. Therefore,.876=. 3 4 Stop conversion at the 4 th bit. lways refer to the question for this.. INRY RITHMETI OPERTION Let s look at the basic of binary arithmetic. ddition Subtraction Multiplication ( borrow) ( carry) Now let us do some arithmetic operation in binary and compare it with the same operation in decimal. Example.8 add with arry forward

24 Example.9 add with Example. Subtract from orrow, so here become () REMEMER - 6 If the instruction is: Subtract from 5 It means that: - Example. Subtract from orrow, so here become () orrow, so here become () nd here become Example. Multiply with orrow, so here become () orrow, so here become () nd here become st partial product nd partial product 3 rd partial product + 4 th partial product Final product (6)

25 Example.3 Divide with Signed and Unsigned Numbers Up to this point, we ve been only discussing about positive numbers. This are called unsigned numbers. Unlike decimal, we don t have (-) sign in binary to express negative value. So for binary, there are three ways (form) to represent negative value, sign-magnitude form, s complement form and s complement form. Sign-magnitude form In this form, the leftmost bit are used as sign indicator (=positive, =negative) while the rest are the same as other negative numbers. Example.4 Represent 54in sign magnitude form using 8-bit binary. Find the binary for +54 using repeated-division-method = 3 Write the result from in 8-bit hange the leftmost bit (MS) to to indicate a negative value in sign-magnitude form

26 Example.5 Represent 83in sign magnitude form using 8-bit binary. Find the binary for +83 using repeated-division-method = 5 Write the result from in 8-bit hange the leftmost bit (MS) to to indicate a negative value in sign-magnitude form s complement form In this form, all the bits are inverted ( and ). Example.6 Represent 54in s complement form using 8-bit binary. Find the binary for +54 using repeated-division-method = 3 Write the result from in 8-bit Invert all the bit

27 Example.7 Represent 83in s complement form using 8-bit binary. Find the binary for +83 using repeated-division-method = 5 Write the result from in 8-bit Invert all the bit s complement form In this form, all the bits are inverted ( and ) and then add. Example.8 Represent 54in s complement form using 8-bit binary. Find the binary for +54 using repeated-division-method = 3 Write the result from in 8-bit Invert all the bit 3 dd

28 Example.9 Represent 83in s complement form using 8-bit binary. Find the binary for +83 using repeated-division-method = 5 Write the result from in 8-bit Invert all the bit 3 dd Example. Determine the value of if it is expressed in (i) sign-magnitude-form (ii) s complement form (iii) s complement form Solution (i) sign-magnitude-form This is the sign bit onvert this part to decimal fter conversion: = 6 3 dd (-)ve sign: -6

29 (ii) s complement form This is the sign bit omplement this part fter complement: 3 onvert to decimal: = 67 4 dd (-)ve sign: -67 (iii) s complement form This is the sign bit omplement this part fter complement: 3 dd : 4 onvert to decimal: = 68 5 dd (-)ve sign: - 68 Range of Signed and Unsigned Numbers For unsigned numbers, all the bits are used to represent the value. Therefore, in an 8-bit binary numbers, the range are between ( ) to ( 55). In mathematical form, the range is from n to, where n is the bit. For signed numbers (in s complement), the MS is used for the sign and the range are form negative number to positive. Therefore, in an 8-bit system, the range are between ( 8 ) to ( 55). In mathematical form, the range is between ( n n ) to ( ).

30 .4 SIGNED NUMERS RITHMETI OPERTION In most microcontroller and microprocessor, the LU only capable of doing addition operation. For subtraction operation, the subtrahends are change into its s complement form. Let say, subtract 7(subtrahend) from 4(minuend). It actually means that 7 ( 7). ll numbers are in 6-bit binary (in 's complement form) 7 Lets look at these 4-bit signed binary arithmetic operation Positive numbers add with positive numbers Positive numbers add with larger negative numbers Positive numbers add with smaller negative numbers discard Negative numbers add with negative numbers discard

31 ll the examples we seen so far give the right answer. Observe these following example: Positive numbers add with positive number give negative result??? Negative numbers add with negative number give positive result??? discard The above two example show what we call overflow condition. It happens when the bit are not enough to represent the answer. Usually in a computer system, there will be a flag that indicates every time an overflow occurs. REMEMER (Range) Unsigned n to Signed ( n n ) to ( ).5 HEXDEIML NUMERING SYSTEM s a base-6 system, hexadecimal has a combination of numbers and alphabet (,,, 3, 4, 5, 6, 7, 8, and 9,,,, D, E and F). Each digit in hexadecimal is equal to 4 bit binary or a nibble. ecause of most microprocessor and microcontroller has memory and register with the size of byte, word and long word, its easier to see the data in hex rather than binary. Microcontroller and Microprocessor Most microcontroller has smaller register size (mostly 8-bit such as Microchip PI) compared to microprocessor (3-bit such as Motorola 68)

32 inary to Hexadecimal onversion inary numbers can be converted to octal by grouping the binary bit in group of four because a digit in hex is equal to four digits in binary (two to the power of four equal 6). Take a look at figure.4. It shows the step for binary to Hexadecimal conversion. Figure.4 inary to hexadecimal conversion inary Number Group the bit in four starting from LS. dd infront make group of four onvert Result in Hex 5 9 D Example: onvert these following binary numbers hexadecimal. (i) (ii) Solution inary Number inary Number

33 Hexadecimal to inary onversion From previous example, each of the hex digits is equal to four bit of binary. So we expand each hex digit to four bit just like in figure Hexadecimal Number F 4 D 8 Expand each hex digit to four binary bit Result in inary F4D86= Decimal to Hexadecimal onversion To convert decimal numbers to octal, the decimal numbers are divided by 6 using the same repeated-division-method. For remainder larger than 9 (,,, 3, 4 and 5), alphabet,,, D, E and F are used to represent them respectively. Figure.5 shows the step for conversion of 4498 to octal. The result is D 6. Figure.5 Repeateddivisionmethod for decimal to hexadecimal conversion remainder D ( remainder) ( remainder) 6 6 Read from bottom ( remainder,3 D) 6 ( remainder, ) = D6

34 For fractional decimal number, repeated-multiplication-method is used. Figure.6 show step to convert.6785to hexadecimal. Figure.6 Repeatedmultiplicationmethod for decimal to hexadecimal conversion.6785 X6 =.856 X6 = X6 = X6 = =.D6 Read from top 3 4 Stop after 4 th octal point digit but always refer to the question. Example. onvert these following decimal numbers hexadecimal. (i) (ii) Solution remainder F 8 5 REMEMER For hexadecimal system, if remainder larger than 9, replace as follow: = = = 3 = D 4 = E 5 = F = 5F remainder D = 5F38

35 Hexadecimal to Decimal onversion Weight 5 Hex point ( 6 ) (56 ) ( 6 ) ( 6 ) ( 6 ) ( 496) (5 56) (6) (.65) OTL NUMERING SYSTEM Octal also offered a simpler way to expressed binary numbers, but is the least used numbering system in computer system. Octal to inary onversion We have seen how to convert binary to octal by grouping the bit into a group of three. So, a digit in octal is equal to three bit in binary. Figure.7 Octal to binary conversion Octal Number Expand each octal digit to three binary bit Result in inary 468=

36 Octal to Decimal onversion Just like the other system, octal is also a positional-numbering system. So each digit has a different weight depending on its position. Figure.8 show the weight of each digit and converting to decimal Figure.8 inary to decimal conversion Weight Octal point (8 ) (5 8 ) (3 8 ) (48 ) ( 8 ) ( 5) (5 64) (3 8) 4 (.5) 37.5 Example. onvert these following octal numbers decimal. (i) (ii) 3. 8 Solution ( 8 ) (8 ) (5 8 ) ( 8 ) (48 ) 5 ( 64) (5 8) (4.5) ( 8 ) (3 8 ) (8 ) (8 ) 5 (3 8) (.5) Octal to Hexadecimal onversion Unfortunately, there is no direct method to convert between these two systems. You can either convert octal to decimal and then decimal to hexadecimal, or convert octal to binary and then binary to hexadecimal. omparing these two methods, the latter is easier.

37 Figure.9 Octal to hexadecimal conversion Octal Number 7 4 Expand each octal digit to three binary bit Result in inary 3 Group in four 4 onvert F 748= F6 Example.3 onvert these following decimal numbers to octal. (i) (ii).34 Solution remainder 37 4 REMEMER 7 3 For octal system, the number will appear larger 5 than its decimal counterpart. 37 = Read from top.46 X 8 =.48 +,48 X 8 = X 8 = X 8 = Stop after 4 th octal point digit but always refer to the question..46 = =

38 Solution 8 remainder = Read from top.34 X 8 = X 8 = X 8 = X 8 = Stop after 4 th octal point digit but always refer to the question..34 = = inary to Octal onversion We can convert binary to octal by grouping the binary bit in group of three starting from LS. Why three? Remember that octal is a base-8 system and eight is equal to two to the power of three. So, a digit in octal is equal to three digit in binary (digit in binary are called bit). Take a look at figure.6. It shows the step for binary to octal conversion.

39 Figure. inary to octal conversion inary Number Group the bit in three starting from LS. dd infront make group of three onvert Result in Octal = 6358 Example.4 onvert these following binary numbers decimal. (i) (ii) Solution inary Number Result in Octal = 6748 inary Number Result in Octal 3 3 = 338

40 Hexadecimal to Octal onversion Same with octal to hexadecimal conversion, you can either use hex-decoct method or hex-bin-oct method (this one is easier). Figure. Hexadecimal to octal conversion Hexadecimal numbers Expand each hex digit to four binary bit E 6 4 Result in inary 3 Group in three 4 onvert E646= DIGITL ODES Other than numbering system, codes are also used to represent value in digital system. Some codes are strictly numbers, and some also contains alphanumeric character. inary-coded-decimal (D) D is a way to express each decimal digit in 4-bit decimal. Therefore, for a 4 digit decimal numbers, 6-bit are needed. Figure below show how conversion between decimal and D are done. Figure. Decimal to D conversion Decimal numbers Expand each digit to four binary bit Result in D

41 Figure.3 D to Decimal conversion D Group the bit in four starting from LS. dd infront make group of four onvert Result in DE From the previous figure, we can see the simplicity of converting between D and decimal. That is the main advantage of us (human). ut that is not the case for digital system. This is because D required more bit to represent decimal value. Take for example, it requires only 7-bit in binary form but in D, -bit are required. nother disadvantage is that D has illegal code. ecause of 4-bit binary can take value from up to5. llowed D codes are only up to 9 and extra circuitry is needed to detect these illegal codes. Gray ode Gray code is unweighted and not an arithmetic code. The important characteristic of gray code is that only one bit can change in a sequence. The purpose of this code is to minimize error when counting in sequence. Figure.4 show how to convert binary to gray code. The steps are: (i) Retain the MS (ii) dd adjacent binary bit, discard carry. Figure.4 inary to Gray code conversion inary numbers + + Start from left to right Retain MS Discard carry Discard carry Gray code

42 Figure.5 show how to convert gray code to binary. The steps are: (i) Retain the leftmost bit. (ii) dd the converted gray bit to the adjacent binary bit, discard carry. Figure.5 Gray code to inary conversion Gray code Retain leftmost bit + Discard carry + Start from left to right Discard carry + + inary numbers SII ode SII (merican Standard ode for Information Interchange), generally pronounced aski, is a character encoding based on the English alphabet. SII codes represent text in computers, communications equipment, and other devices that work with text. Most modern character encodings have a historical basis in SII. SII is, strictly, a seven-bit code, meaning that it uses the bit patterns represented with seven binary digits (a range of to 7 decimal) to represent character information. t the time SII was introduced, many computers dealt with eight-bit groups (bytes) as the smallest unit of information; the eighth bit was commonly used as a parity bit for error checking on communication lines or other device-specific functions.

43 Figure.6 SII Table.8 ERROR DETETION In the previous chapter, we have discussed about digital data transmission. In ideal case, data sent by the sender are identical when it received by the receiver. ut in practice, error can happen when digital data is transmitted. Therefore, the receiver needs a means to detect whether the digital data it received contains any error or not. The simplest method for error detection is parity bit. String of transmitted digital data is added with one extra bit. This extra bit is a parity bit. There are two parity bit scheme, the odd parity and even parity scheme. In this odd parity scheme, the parity bit will ensure that the total numbers of in the data string (including itself) is odd. In contrast, even parity bit will ensure that the total numbers of in the data string (including itself) is even. Example.5 Digital data to be transmitted: Numbers of = 4 Transmitted Digital Data: (using odd parity scheme) Transmitted Digital Data: (using even parity scheme) Parity bit Parity bit

44 Example.6 Digital data to be transmitted: Numbers of = 5 Transmitted Digital Data: (using odd parity scheme) Transmitted Digital Data: (using even parity scheme) Parity bit Parity bit When the receiver receives the data string, it will check for error using the parity bit. Parity bit offers a very simple method of error detection but the limitation is that if error affected more than one bit, detection will give a wrong result.

45 TUTORIL. Fill in the blank space with the correct value. ll numbers are unsigned. DEIML INRY HEXDEIML OTL (i) 345 (ii) 4D (iii) 64 (iv) (v) 58 (vi) 73 (vii) E (viii) (ix) (x) 78 (xi).75 (xii).99 (xiii).45 (xiv). (xv).e

46 . rrange these unsigned numbers from the smallest to the largest E Fill in the blank space with the correct value. ll numbers are unsigned. INRY D GRY (i) 35 (ii) 78 6 (iii) (iv) (v) (D) 4. Fill in the empty boxes with the correct value for the series below (i),,,,, (ii) 85 6, 88 6,, 8E 6,, (iii) 66 8,, 74 8, 8, 8, (iv) (bcd), (bcd), (bcd),,, (v) 8, 4 6,, 8, 6,

47 5. Fill in the blank space with the correct value. ll numbers are 8-bit s complement signed binary numbers. s OMPLEMENT DEIML DEIML s OMPLEMENT (i) (vi) -67 (ii) (vii) 98 (iii) (viii) -8 (iv) (ix) 3 (v) (x) onvert the following decimal numbers into 8-bit signed binary numbers. DEIML SIGN MGNITUDE s OMPLEMENT s OMPLEMENT (i) -35 (ii) -5 (iii) -99 (iv) - (v) -56

48 7. rrange these s complement 8-bit signed binary numbers from the smallest to the largest 8. Perform the following unsigned arithmetic operation + = - = = = E3 6= = 6 (D) + (D) = (D) (D) - (D) = (D)

49 9. Perform the following s complement 8-bit signed binary arithmetic operation and compare the operation with a normal decimal addition. Identify if there is an overflow occurs. INRY (i) = + = = DEIML INRY (i) = + = = DEIML INRY (i) = + = = DEIML INRY (i) = + = = DEIML INRY (i) = + = = DEIML

50 HPTER 3 SI & OMINTIONL LOGI IRUIT OUTLINE INTRODUTION TO SI GTES NLYZING OMINTIONL LOGI IRUIT DESIGNING LOGI IRUIT FROM OOLEN EXPRESSION DESIGNING LOGI IRUIT FROM TRUTH TLE OOLEN THEOREM KRNUGH-MP PPROH THE DON T RE ONDITION UNIVERSLITY OF NND ND NOR GTES

51 In this chapter, we move into the circuit part of digital system. We will look at basic logic gate and combinational logic circuit operation and application. 3. INTRODUTION TO SI GTES In this topic, we will take a look basic gate symbol, operation, truth table, timing diagram and logic expression. The Inverter lso known as NOT gate. Inverter has only one input and one output. It will invert or complement the input to its opposite logic level and send it to output. Figure 3. show the different symbol for inverter. Figure 3. Inverter symbol (NSI/IEEE std ) Distinctive shape symbol Rectangular outline symbol REMEMER Take note that the bubble shape in the inverter symbol is a negate sign, means that it will inversion or complement operation Whenever the input is high (), the output is low () and when the input is low (), the output will become high (). Table 3. shows the truth table of inverter with input and output. Table 3. Truth table for inverter (input) (output) (low) (high) (high) (low) TRUTH TLE Truth table is a table that relates input combination with output. If truth table shows the relation between input and output in form of table, timing diagram shows the relation between input and output using waveform, more like a graph. Figure 3. Waveform response of an inverter Input Output simpler (or more practical) way to represent logic circuit is by using oolean expression. In this expression, input and output of a logic circuit are illustrated in mathematical form. Not only it takes form of mathematical equation, but also inherits some of its property (we will look at this more in oolean theorem topics).

52 Inverter with input and output can be expressed in oolean expression below: The bar indicates negate operation OOLEN EXPRESSION Write the output variable at the left side of the expression while the input variable in the right side. If output of an inverter with input are connected to the input of a second inverter, the output of the second inverter will be the same as. Two bar with the same size can cancel of each other. Figure 3.3 shows the pin connection diagram of I 744 (inverter). Figure 3.3 Inverter I pin connection

53 The ND Gate Unlike inverter, ND gate can have two or more input but only one output. Figure 3.4 show the different symbol for ND gate. Figure 3.4 ND gate symbol (NSI/IEEE std ) x Distinctive shape symbol & x Rectangular outline symbol ND gate will only produce output high () when all the input are high (), else the output are low (). Table 3. shows the truth table of ND gate with two input and, and output X. Table 3. Truth table for two input ND gate (input) (input) X (output) (low) (low) (low) (low) (high) (low) (high) (low) (low) (high) (high) (high) Write input on the left side in binary counting order. Timing diagram in figure 3.5 shows the output waveform of a ND gate X, when input waveform and are applied. Figure 3.5 Waveform response of an ND gate Input () Input () Output Two input ND gate with input and and output X can be expressed in oolean expression below: X The dot indicates an ND operation and its also inherits the properties of a normal multiply operation. If any of the input is low (), output will also become low () because any other input multiply with is equal to (same as normal math). Therefore, it can be summarize as:

54 If both the inputs are the same variable, and it is low (), we will get low () output ( multiply by equal ) and if both inputs are high (), we will get high () output ( multiply by equal to ). This can be summarize as below: If the two input are the same variable but with one is complement of the other, the output will always be low (). This can be written as: Figure 3.6 shows the pin connection diagram of I 748 (ND). Figure 3.6 ND gate I pin connection

55 The OR Gate Similar to ND gate, OR gate can have two or more input but only one output. Figure 3.7 show the different symbol for an OR gate. Figure 3.7 OR gate symbol (NSI/IEEE std ) x Distinctive shape symbol >= x Rectangular outline symbol OR gate will only produce output low () when all the input are low (), else the output are high (). In other words, it will produce high () when one or more inputs are high (). Table 3.3 shows the truth table of OR gate with two input and, and output X. Table 3.3 Truth table for two input OR gate (input) (input) X (output) (low) (low) (low) (low) (high) (high) (high) (low) (high) (high) (high) (high) Timing diagram in figure 3.8 shows the output waveform of a OR gate X, when input waveform and are applied. Figure 3.8 Waveform response of an two inputs OR gate Input () Input () Output Two input OR gate with input and and output X can be expressed in oolean expression below: X The plus indicates an OR operation and its also inherits the properties of a normal addition operation with an exception. If any of the input is high (), output will also become high () because any other input add with is equal to (same as normal math) ut how about when both input are high ()? In math it supposed to be like this: (or in binary)

56 The exception is that for oolean expression,, and also applied for Therefore, it can be summarize as: If both the inputs are the same variable, and it is low (), we will get low () output ( plus equal ) and if both inputs are high (), we will get high () output ( add equal to ). This can be summarize as below: If the two input are the same variable but with one is complement of the other, the output will always be high (). This can be written as: Figure 3.9 shows the pin connection diagram of I 743 (OR). Figure 3.9 OR gate I pin connection

57 The NND Gate NND gate can have more than one input but only one output. Figure 3. show the different symbol for an NND gate. Figure 3. OR gate symbol (NSI/IEEE std ) x Distinctive shape symbol & x Rectangular outline symbol NND gate will only produce output low () when all the input are high (), else the output are high (). Table 3.4 shows the truth table of OR gate with two input and, and output X. Table 3.4 Truth table for two input NND gate (input) (input) X (output) (low) (low) (high) (low) (high) (high) (high) (low) (high) (high) (high) (low) NND gate is the same with ND gate with inverted output Timing diagram in figure 3. shows the output waveform of a NND gate X, when input waveform and are applied. Figure 3. Waveform response of an two inputs NND gate Input () Input () Output Two input NND gate with input and and output X can be expressed in oolean expression below: X ( ) Its always a good practice to put expression in bracket The part in the bracket is a ND operation. The bar above the bracket indicates that any result from the bracket will be complimented. Figure 3. shows the pin connection diagram of I 74 (NND).

58 Figure 3. NND gate I pin connection The NOR Gate NOR gate can have two or more input but only one output. Figure 3.3 show the different symbol for an OR gate. Figure 3.3 NOR gate symbol (NSI/IEEE std ) x Distinctive shape symbol >= x Rectangular outline symbol NOR gate will only produce output high () when all the input are low (), else the output are low (). Table 3.5 shows the truth table of OR gate with two input and, and output X. Table 3.5 Truth table for two input NOR gate (input) (input) X (output) (low) (low) (high) (low) (high) (low) (high) (low) (low) (high) (high) (low)

59 Timing diagram in figure 3.4 shows the output waveform of a NOR gate X, when input waveform and are applied. Figure 3.4 Waveform response of an two inputs NOR gate Input () Input () Output Two input NOR gate with input and and output X can be expressed in oolean expression below: X ( ) The part in the bracket is an OR operation. The bar above the bracket indicates that any result from the bracket will be complimented. Figure 3.5 shows the pin connection diagram of I 74 (NOR). Figure 3.5 NOR gate I pin connection

60 The Exclusive-OR Gate Exclusive-OR gate (or XOR gate for short) can only have two inputs but only one output. Figure 3.6 show the different symbol for an XOR gate. Figure 3.6 XOR gate symbol (NSI/IEEE std ) x Distinctive shape symbol = x Rectangular outline symbol XOR gate will only produce output high () when the input has different state, one is high () and the other is low (), else the output are low (). Table 3.6 shows the truth table of OR gate with two input and, and output X. Table 3.6 Truth table for two input XOR gate (input) (input) X (output) (low) (low) (low) (low) (high) (high) (high) (low) (high) (high) (high) (low) Timing diagram in figure 3.7 shows the output waveform of a XOR gate X, when input waveform and are applied. Figure 3.7 Waveform response of an two inputs NOR gate Input () Input () Output XOR gate with input and and output X can be expressed in oolean expression below: X symbol is indicating exclusive operation Figure 3.8 shows the pin connection diagram of I 74 (XOR).

61 Figure 3.8 XOR gate I pin connection The Exclusive-NOR Gate Exclusive-NOR gate (or XNOR gate for shorts) can only have two inputs but only one output. Figure 3.9 show the different symbol for an XOR gate. Figure 3.9 XNOR gate symbol (NSI/IEEE std ) x Distinctive shape symbol = x Rectangular outline symbol XNOR gate will only produce output high () when the input has same state, else the output are low (). Table 3.7 shows the truth table of OR gate with two input and, and output X. Table 3.7 Truth table for two input XOR gate (input) (input) X (output) (low) (low) (high) (low) (high) (low) (high) (low) (low) (high) (high) (high)

62 Timing diagram in figure 3. shows the output waveform of a XNOR gate X, when input waveform and are applied. Figure 3. Waveform response of an two inputs NOR gate Input () Input () Output XOR gate with input and and output X can be expressed in oolean expression below: X 3. NLYZING OMINTIONL LOGI IRUIT single gate cannot do much by itself. In digital system, different gate are connected to perform different function. Such circuits are called combinational logic circuit (combination of gates). Given a combinational logic circuit, we must be able to understand what it does. In order to do that, we must know what are the output corresponding to all the possible input combination. What better way to present this than to use truth table. The only problem is that we have to analyze each output of each gate for every input combination. To overcome this problem this problem, we will obtain the oolean expression first, and the analyze it to build the truth table. Let take a look at example 3.. It shows the process of building truth table for a combinational logic circuit. Example 3. uild the truth table for the combinational logic circuit below Z

63 . Obtain the oolean expression at each node (this step can be skip when you have become familiar with combinational logic circuit) d e d Z e d f d f. Write the complete oolean expression for Z Z e f ( ) ( ) 3. uilt an empty truth table for the circuit. Fill all input combinations in binary counting order. Z three input circuit has eight possible input combinations. n Possible input combination = (n is the number of input) 4. Using oolean expression for Z, evaluate Z for each input combination. Z Z ( ) ( ) ( ) ( ) Z ( ) () ( ) ( ) Z ( ) ( ) ( ) ( ) Z ( ) ( ) ( ) ()

64 Z ( ) ( ) ( ) ( ) Z ( ) () ( ) ( ) Z () ( ) ( ) ( ) Z () ( ) ( ) () 5. Fill in the Z column of the truth table Z 6. Done! Example 3. uild the truth table for the combinational logic circuit below Z. Obtain the oolean expression at each node (this step can be skip when you have become familiar with combinational logic circuit) d e d e d ( ) Z f f. Write the complete oolean expression for Z Z ef (( ) ) ( )

65 3. Evaluate Z, and fill in the truth table. Z three input circuit has eight possible input combinations. n Possible input combination = (n is the number of input) 4. Done! 3.3 DESIGNING OMINTIONL LOGI IRUIT FROM OOLEN EXPRESSION To design a circuit from a given oolean expression, the important thing you must do is, group the variable in bracket. Then start the design from either input or output. Example 3.3 shows how both methods are used. Example 3.3 Design a combinational logic circuit for oolean expression Z. Group in bracket Z ( ) ( ). Draw the circuit. Z Example 3.4 Design a combinational logic circuit for oolean expression Z. Group in bracket Z

66 . Draw the circuit. Z 3.4 DESIGNING OMINTIONL LOGI IRUIT FROM TRUTH TLE To design a combinational logic circuit from truth table, first thing we need to do is to get the oolean expression. Then we follow the step shown in previous example. Each row of a truth table represents an input combination. Each of the input combination is a product term (because the multiply) or minterm.. ll the minterm for a three input combinational logic circuit are shown in figure 3.. Figure 3. Minterm of a three input combinational logic circuit We will used the the minterm system because you will use this term in microelectronics subject Example 3.5 Write the oolean expression for Z for a circuit that produce a truth table below in SOP form Figure 3. Truth table for example 3.5 Z

67 To design a combinational logic circuit for truth table in figure 3.6, first we list out all the minterm that produce high () output. Z Then we add (OR-ed) all the minterm to get Z Z ecause of the minterm are product and being add (OR-ed) to express Z, this form are called Sum-of-Product (SOP). This is also a standard form of SOP because all the product have all the input variable in them (we will find other SOP form later) Writing product term can be tedious for a complex circuit, therefore a short-hand notation can be used. Figure 3.3 shows short-hand for each minterm. Figure 3.3 Short-hand notation for minterm Short-hand m m m m3 m4 m5 m6 m7 s a result, Z in the example 3.5 can also be expressed as Z m m4 m5 REMEMER Don t use capital letter for m in minterm short-hand Simpler is it? We can also use canonical form to make it even simpler. For the same example, the form canonical are: Z (,, ) m(,4,5)

68 Figure 3.4 Explanation for canonical form Output Variable Z(,, ) m(,4,5) Input Variable (MS on the left) Sigma (sum) m for minterm ll minterm that produce high () output Other than SOP, there is another form called the Product-of-Sum (POS). Figure 3.5 shows the summation term (or maxterm) for each of the input combination and also the shorthand notation for each of the maxterm Figure 3.5 Maxterm and shorthand notation Short-hand M M M M3 M4 M5 M6 M7 REMEMER Use capital M in maxterm short-hand For writing a oolean expression in POS form, take the maxterm for all the input combination that produce a low () outputs. Therefore, the expression for Z in example 3.5 are: Z (,, ) M (,,3,6,7) anonical form Z (,, ) MM M3 M6M7 Maxterm shorthand Z ( ) ( ) ( ) ( ) ( ) POS form For this subject, we will only use SOP form. The POS are introduced to make you familiar with it as you will often use it in microelectronics subject. 3.5 OOLEN THEOREM s other mathematical expression, oolean expressions also have certain theorem or rules that must be followed when applying oolean algebra. This is important in reducing expression to its simplest form.

69 ommutative law Rule : Rule : ssociative law Rule 3: ) ( ) ( Rule 4: ) ( ) ( Distributive law Rule 5: ) ( D D D ) ( ) ( D D D

70 Single variable theorem Most of these theorems we have seen in topic 3.. Rule 6: Rule 7: Rule 8: Rule 9: Rule : Rule : Rule : Rule 3: Rule 4: Rule 5: Rule 6: This can be proven by: factorizing the expression: ( ) y applying rule : () This rule is can be proven as follows: ( ) Rule 5 ( ) Rule 9 Rule ( ) ( ) () () Rule 4 eside these 6 rules, there are two other rules called the Demorgan s theorem. The theorem are: Rule 7:

71 Rule 8: The easiest way to understand Demorgan s theorem is to break (or connect) bar above the sign that change. Figure 3.7 Demorgan s simplified Sign + change to. breaks the bar D D Now that we have all the tools needed, lets try to do expression minimization. The advantage of getting a minimize expression is that its need less logic gate to be implemented. Thus, reduce cost and increase speed (also lower the cost). In reality, each gate will introduce some delay. That means lesser gate, higher speed Example 3.6 Simplify the expression y y ( ) Factorize the st and 3 rd product () Rule 4: Rule 8: ( ) () ( ) Rule 8: multiply out the bracket ( ) Factorize the st and 3 rd product () Rule 4: Rule 8: () () ( ) Factorize () Rule : Rule 8: () ()

72 In example 3.6, the solution shown is a very detail step by step simplification process. Most of these steps can be skipped or combined when you get more familiar with all these laws. The rest of the example will not show the simplification process as detail as this. The simplified expressions are still in form of SOP but not the standard SOP form. Example 3.7 Simplify the expression y ( ) ( D) y ( ) ( D) ( ) ( D) D D Example 3.8 Simplify the expression y ( D) y ( D) ( D) D Example 3.9 Simplify the expression y ( ) ( ) y ( ) ( ) ( ) Example 3. Simplify the expression y y ( ) ( ) Example 3. Simplify the expression y (Q R) (Q R) y (Q R) (Q R) Q R Q R

73 Example 3. Simplify the expression y (Q R) (Q R) y (Q R) (Q R) (Q R) (Q R) Example 3.3 Simplify the expression y R ST (R S T) y R ST (R S T) Or ( R S T) (R ST) R S T y R ST (R S T) R ST R S T R (S T ) S T R S T Now we take a look at circuit simplification using oolean algebra. First step is to obtain the oolean expression, minimized the expression and re-draw using the minimized expression. Example 3.4 Simplify the circuit in figure 3.8 using oolean algebra Figure 3.8 ircuit for example 3.4 Z Obtain the oolean expression Z ( ) ( ) Simplify Z ( ) ( ) ( ) () ( ) Re-draw the simplified circuit.

74 Z Example 3.5 Simplify the circuit in figure 3.9 using oolean algebra Figure 3.9 ircuit for example 3.5 Z Obtain the oolean expression Z ( ) ( ) ( ) ( ) Re-draw the simplified circuit. Z Example 3.6 Simplify the circuit in figure 3.3 using oolean algebra Figure 3.3 ircuit for example 3.5 Z Obtain the oolean expression Z ( )

75 3.6 KRNUGH-MP PPROH oolean algebra uses mathematical approach for minimizing logic function and sometimes given a not so minimize expression because of the choice of theorem used. Karnaugh map (or k-map for short) approach on the other hand uses graphical method for minimizing logic function. The steps for minimizing using k-map are: (i) Map the output in k-map (ii) Group the (iii) Determine the minimum product term for each group (iv) Summed all the term to obtain the minimize SOP Step : Mapping the k-map Given a logic function in form of truth table or oolean expression, the first thing you must (be able to) do is map the output level in the k-map. Mapping the k-map from truth table Mapping from truth table is easier than mapping from oolean expression. Figure 3.3 and 3.3 shows a three input (,, and ) logic circuit k-map and how the mapping are done from a truth table while figure 3.33 shows a k-map for a four input logic circuit. Figure 3.3 Mapping k- map from truth table for a three input logic circuit. Z REMEMER The 3 rd and 4 th row of the k-map is not in normal order because the counting order is in gray code.

76 Figure 3.3 Mapping k- map from truth table for a three input logic circuit. Z Figure 3.33 Mapping k- map from truth table for a four input logic circuit. D Z 3 D D D D Input are also called varible (because the value varies), so a 4 input logic circuit k- map can also be called 4 variable k-map Mapping from oolean expression To map a k-map from a oolean expression, the easiest way (and to avoid mistake) is to change the expression into SOP (or also POS) standard form. You can also map it directly from a non-standard oolean expression (not recommended for beginner). Figure 3.34 and 3.35 show how standard product terms of SOP are mapped in k-map for a three input and four input logic circuit.

77 Figure 3.34 Mapping k- map from oolean expression for a three input logic circuit. Figure 3.35 Mapping k- map from oolean expression for a four input logic circuit. D D D D D D D D D D D D D D D D D Transforming a non-standard SOP to standard SOP form non-standard SOP doesn t have the complete variable set for its product term. simplified expression is usually in form of non-standard SOP. So, we need to add up the missing variable in each term. Example 3.6 hange the oolean expression below to its standard SOP form Z ( ) ( ) ( )

78 Figure 3.36 Solution for example 3.6 Z () () () Missing Missing Missing and () ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) Delete redundant term ( ) ( ) ( ) ( ) ( ) Direct mapping from a non-standard oolean expression. You can also directly map a non-standard oolean expression to k-map. e very careful to avoid any mistake. Example 3.7 Map the oolean expression directly into k-map. Figure 3.37 Solution for example 3.7 Z ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) Delete redundant term

79 Step : Grouping of s efore you can start grouping the s in k-map, you must familiarized yourself with the adjacent cell concept. djacent cell in k-map One more thing that you must know is the adjacent cell of a k-map. djacent cell are define as cell that are left, right, above and below and not diagonal. The 4 th column is adjacent to the st column and the 4 th row is adjacent to the st row. s a result, the four corner cells are adjacent to each other. Figure 3.38 djacent cell of a 4- variable k- map D Each cell are adjacent to the cell at its right, left, above and below D Each cell at the outer left column are adjacent to the corresponding cell at the outer right corner. ( wrap around adjacency) D 3 Each cell at the top row are adjacent to the corresponding cell at the bottom row. ( wrap around adjacency)

80 fter the oolean expresson are fully mapped, all s in adjacent cell in the k-map must be enclosed together (we will call this group). To obtain the minimal oolean expression, the aim is the smallest number of group and largest group possible according to these rule: Rule : group can only contain either,,4,8 or 6 cells, which are all power of two. Figure 3.39 Explanation of rule. D D D Rule : Each cell in a group must be adjacent to one or more cell in that same group, but all cells in the group do not have to be adjacent to each other. Figure 3.4 Explanation of rule. D These two is not adjacent but still in group

81 Rule 3: The group must be the largest group possible. Figure 3.4 Explanation of rule 3. D Select the largest group (contains 8 cells) Rule 4: ll must be enclosed in a group (at least one) and s that already in a group can overlap (included) in other group as long as it contains the non-common s Figure 3.4 Explanation of rule 4. D Overlapped cell Non-common cell Step 3: Determining the minimum SOP expression from k-map When cells are group together, the contradictory variable (one complemented or non-complemented) in the group can be eliminated. For a three variable k-map: (i) a group of cell produce a 3-varible product term (ii) a group of cells produce a -variable product term (iii) a group of 4 cells produce a -variable product term (iv) a group of 8 cells produce a value For a four variable k-map: (i) a group of cell produce a 4-varible product term (ii) a group of cells produce a 3-variable product term (iii) a group of 4 cells produce a -variable product term (iv) a group of 8 cells produce a -variable product term (v) a group of 6 cells produce a value

82 Step 4: Summed all the term to obtain the minimize SOP DONE! To make better understanding of this approach, lets take a look at some examples. Example 3.8 Obtain the simplest SOP form for the oolean expression below: Z D D D D D D D Solution ecause of the expression is in standard SOP form, we can straight away mapped it in k-map (i) Map the output in k-map D (ii) Group the D

83 (iii) Determine the minimum product term for each group D D D (iv) Summed all the term to obtain the minimize SOP Z D D Example 3.9 Obtain the simplest SOP form for the oolean expression below: Z D D D D D D D D D D Solution ecause of the expression is in standard SOP form, we can straight away mapped it in k-map (i) Map the output in k-map D

84 (ii) Group the D (iii) Determine the minimum product term for each group D D D (iv) Summed all the term to obtain the minimize SOP Z D D Example 3. Obtain the simplest SOP form for the oolean expression below: Z D D D Solution ecause of the expression is in non-standard SOP form, we can convert it to standard SOP form or straight away map it in k-map.

85 (i) Map the output in k-map D (ii) Group the D (iii) Determine the minimum product term for each group D D (iv) Summed all the term to obtain the minimize SOP Z D

86 Example 3. Obtain the simplest SOP form for truth table below: Figure 3.43 Truth table for example 3. D Z Solution (i) Map the output in k-map D (ii) Group the D

87 (iii) Determine the minimum product term for each group D D D (iv) Summed all the term to obtain the minimize SOP Z D D Example 3. Re-draw the simplified circuit of the logic circuit in figure Figure 3.44 ircuit for example 3. D D D D Z Solution (i) Obtain the oolean expression for Z Z D D D

88 (ii) Map the output in k-map D (iii) Group the and determine the minimum product term for each group D D (iv) Summed all the term to obtain the minimize SOP Z D ( D) (v) Draw the simplified circuit Z D

89 3.7 THE DON T RE ONDITION In many design, there will sometimes a non-existent input combination. For example, let say we have two sensor for the same tank, one for full and one for empty, and both will produce HIGH () when active. Therefore, condition for both are HIGH () is not valid. We may use this combination to produce error or just take it as don t care condition. y taking it as a don t care (usually represented by X), we can take its value as either or depending on which will give us the more simplified expression. lthough it s good to have a simplified more expression (cost, speed), using don t care also make the circuit more vulnerable to error (because there always an output even when invalid input are applied). Don t care simplification Simplification is done using k-map approach. Mapping the k-map are the same as before but use X for every don t care condition. Example 3.3 Obtain the simplest SOP form for truth table below: Figure 3.45 Truth table for example 3.3 D Z X X

90 Solution (i) Map the output in k-map D x x (ii) Group the D X Take this as ' X Take this as ' (iii) Summed all the term to obtain the minimize SOP Z D Example 3.4 Obtain the simplest SOP form for truth table below: Figure 3.46 K-map for example 3.4 D X X x x

91 Solution (iv) Group the D X X X Take this as ' X X Take this as ' (v) Summed all the term to obtain the minimize SOP Z D D 3.8 UNIVERSLITY OF NND ND NOR GTE oth NND and NOR gate are called universal circuit because it can be used to produce NOT, the ND, the OR and NOR function shown in figure 3.39 and 3.4 respectively. Figure 3.47 Universality of NND gate Z Z Z Z Z Z Z Z Z

92 Figure 3.48 Universality of NOR gate Z Z Z Z Z Z Z Z Z Designing a circuit using only NND gate. For designing this kind of circuit, there are two kinds of approach, the direct translation method and oolean manipulation method. Using direct translation method, we just replace the gate other than NND with the equivalent NND shown in figure Though this is easier (assuming you remember the entire equivalent NND gate), the resulting circuit will consist of many NND gate. Using oolean manipulation in the other hand, require you to use oolean theorem to transform the expression into a NND gate only expression. Example 3.5 Re-draw the logic circuit in figure 3.4 using only NND gate. Figure 3.49 Logic circuit for example 3.5 D Z

93 Direct Translation D Z oolean manipulation Firstly, we need to obtain the oolean expression for Z. Z D Then use oolean theorem to manipulate it into NND form. (i.e. no + sign and a long bar on top) Z D D D Finally, draw the circuit D Z omparing the total NND gate used in the two approaches, the oolean manipulation uses lesser gate (4 gates) than direct translation (8 gates). So, if you were instructed to design a NND gate only circuit with the least gate, you must use the oolean manipulation approach. Designing a circuit using only NOR gate. Just like circuit using only NND gate, there are the same two kinds of approach, the direct translation method and oolean manipulation method.

94 Example 3.6 Re-draw the logic circuit in figure 3.5 using only NOR gate. Figure 3.5 Logic circuit for example 3.6 D Z Direct Translation D Z oolean manipulation Firstly, we need to obtain the oolean expression for Z. D Z Then use oolean theorem to manipulate it into NND form. (i.e. no sign and a long bar on top) D Z D D D ) ( D ) ( Finally, draw the circuit D Z

95 3.9 ONSTRUTING DIGITL LOGI IRUIT There are several things we need to know before circuit construction can be started, the protoboard, the Digital Lab Trainer and the I s. Figure 3.5 Solderless readboard Solderless readboard for Prototyping This is a way of making a temporary circuit, for testing purposes or to try out an idea. No soldering is required and all the components can be reused afterwards. It is easy to change connections and replace components. We will use this to construct our circuit on during lab experiment. onnections on readboard readboards have many tiny sockets (called 'holes') arranged on a." grid. The leads of most components can be pushed straight into the holes. Is are inserted across the central gap with their notch or dot to the left. Wire links can be made with single-core plastic-coated wire of.6mm diameter (the standard size) usually referred as jumper wire. Stranded wire is not suitable because it will crumple when pushed into a hole and it may damage the board if strands break off.

96 Figure 3.5 Solderless readboard onnection The top and bottom rows are linked horizontally all the way across as shown by the red and black lines on the diagram. The power supply is connected to these rows, + at the top and V (zero volts) at the bottom. I suggest using the upper row of the bottom pair for V, then you can use the lower row for the negative supply with circuits requiring a dual supply (e.g. +9V, V, -9V). The other holes are linked vertically in blocks of 5 with no link across the centre as shown by the blue lines on the diagram. Notice how there is separate blocks of connections to each pin of Is. Large reaboards On larger breadboards there may be a break halfway along the top and bottom power supply rows. It is a good idea to link across the gap before you start to build a circuit, otherwise you may forget and part of your circuit will have no power! I pin numbers I pins are numbered anti-clockwise around the I starting near the notch or dot. The diagram shows the numbering for 8-pin and 4-pin Is, but the principle is the same for all sizes.

97 Figure 3.53 I Pins Numbering omponents without suitable leads Some components such as switches and variable resistors do not have suitable leads of their own so you must solder some on yourself. Use single-core plastic-coated wire of.6mm diameter (the standard size). Stranded wire is not suitable because it will crumple when pushed into a hole and it may damage the board if strands break off. Figure 3.54 push button switch with soldered wire uilding a ircuit on readboard onverting a circuit diagram to a breadboard layout is not straightforward because the arrangement of components on breadboard will look quite different from the circuit diagram. When putting parts on breadboard you must concentrate on their connections, not their positions on the circuit diagram. The I (chip) is a good starting point so place it in the centre of the breadboard and work round it pin by pin, putting in all the connections and components for each pin in turn.

98 uilding a Logic ircuit ased on Logic Gates Diagram.. Labeled all the gates with the I numbers. E.g. 74 for NND, 74 for NOR or you can also write NND in the gates symbols. This will make it easier to identify the I for each gate Z Labeled all the pins at every interconnection. Refer to pin configuration. Remember that every I pin configuration is NOT THE SME. heck all I s using I TESTER first Z onnect the V pin to +5V and GND pin to ground for EVERY I s. MKE SURE YOU DIDN T USE THE ~5V SOURE. (refer to Section ) 4. onnect I s using jumper wire. 5. onnect the input (, and ) to the DT SWITH and output (Z) to LED. (refer to Section ) HEK EFORE TURNING ON THE POWER.

99 readboarding tips: It is important to breadboard a circuit neatly and systematically, so that one can debug it and get it running easily and quickly. It also helps when someone else needs to understand and inspect the circuit. Here are some tips: lways use the side-lines for power supply connections. Power the chips from the side-lines and not directly from the power supply. Use black wires for ground connections (V), and red for other power connections.(if possible) Keep the jumper wires on the board flat, so that the board does not look cluttered. Route jumper wires around the chips and not over the chips. This makes changing the chips when needed easier. ssume you will have to make changes. Whether it is correcting design flaws, fixing mistakes in wiring, adding extra circuitry, tweaking component values, or re-engineering your entire concept, the odds that you will NOT have to make any changes to your circuit are very close to zero. So choose methods that allow for easy changes, leave yourself enough space on your boards, and don't set anything in stone until you are certain it's working how you want it. ccount for LL your pins. Whether or not they appear on your schematic or in an example circuit you are borrowing from, make sure you take a look at the data sheet for each I and be sure that every pin is appropriately connected if it needs to be. The classic mistake here is the student who can't figure out why his op-amp circuit doesn't work, when they didn't bother hooking up the + and - voltage supply pins that didn't appear on the schematic. esides power and ground connections, there may be chip enables, clocks,resets, and other similar inputs that have to be made happy before things will work. Unused inputs on extra gates should be connected to ground or the logic supply: left unconnected, some kinds of gates can oscillate and cause wierd problems. Unused outputs can be left open, as a rule. "It's must be a bad chip"...not!!! When a circuit design doesn't work, the first impulse is to blame a failed component because we just know the design and wiring are right. In practice, it is really quite amazing how seldom the chips are at fault, and how much abuse (wrong wiring, wrong power supplies) many common chips will withstand without damage. (DO watch that static electricity, though.) The problem is almost invariably somewhere else. uild one whole device first, if you are intending to make several identical units. It's tempting to save time by, for example, drilling all

100 the chasses for all the units while you have your drill set up: soldering all the boards at once; etc. etc. ut if you then find you've got to undo or redo something that didn't work the way you thought it would, you've multiplied your mistake across all the units. Finish one unit completely to find all the mistakes and optimize the design, then go into "mass production." Make sure you can get the parts before basing a design on it. You may find the ideal integrated circuit for your application in a data book, but it may not be in production, may be unavailable from distributors, or may be too expensive. Especially if you are creating a design you hope to produce for a while, it's wise to choose devices that are widely available and that (you hope) won't be discontinued. THE IDL-8 DIGITL TRINER RULES TO FOLLOW LWYS SWITH OFF THE IDL EFORE UILDING/MODIFYING YOUR IRUIT USE PPROPITE TOOLS TO PULL THE I FROM THE PROTOORD POWER SWITH VOLTMETER FUNTION GENERTOR mplitude Frequency Multiplier Frequency Waveform type Signal Out

101 7 segment display 8-bit data display panel Variable power supply 3-way switch panel Pulser switch panel 8-bit data switch panel Integrated ircuit (I s) There are several families of logic chips numbered from 74xx onwards with letters (xx) in the middle of the number to indicate the type of circuitry, eg 74LS and 74H. The original family (now obsolete) had no letters, eg 74. The 74LS (Low-power Schottky) family (like the original) uses TTL (Transistor-Transistor Logic) circuitry which is fast but requires more power than later families. The 74 series is often still called the 'TTL series' even though the latest chips do not use TTL! The 74H family has High-speed MOS circuitry, combining the speed of TTL with the very low power consumption of the 4 series. They are MOS chips with the same pin arrangements as the older 74LS family. Note that 74H inputs cannot be reliably driven by 74LS outputs because the voltage ranges used for logic are not quite compatible, use 74HT instead. The 74HT family is a special version of 74H with 74LS TTL-compatible inputs so 74HT can be safely mixed with 74LS in the same system. In fact 74HT can be used as low-power direct replacements for the older 74LS Is in most circuits. The minor disadvantage of 74HT is a lower immunity to noise, but this is unlikely to be a problem in most situations. The MOS circuitry used in the 74H and 74HT series Is means that they are static sensitive. Touching a pin while charged with static