SOMETHING LIKE A DISCLAIMER

Transcription

1 SOMETHING LIKE A DISCLAIMER In the following hundreds of pages of this tutorial (one hundred to be precise), the design of an L Band amplifier using QUCS Studio is presented. Once the document is considered as a whole, it is clear that there are many other ways of facing this problem, and it is sure that in case of having to do so, some of the assumptions made in this document are, at least, discussable. Some of the options taken, steps analyzed and solutions presented are not the most suitable ones to complete the task of designing and L Band Amplifier. Even it is possible that some of them are useless. But these decisions were taken in order to cover all the possible options that can come up during the design process, and to show how they can be handled using QUCS Studio. Of course, I am also sure that there are analysis that are not included in this document and they are very useful to solve issues presented during the discussions. On the other hand, it is not my intention to teach Microwave Design to anybody. It is exactly the opposite. After thirteen years working in the business I have learnt to be always ready for learning, from everybody in every time. I have done the things my way, but I am aware it is not the only way. The whole point of the following document is to encourage the use of QUCS Studio and to show that it is possible to use it in Microwave Designs, not only for low frequency applications. Jose M. Campelo. Page 1

2 The aim of the following tutorial is to show how to perform all the tasks involved in the design of a RF L Band amplifier using the QUCS Studio CAD tool. The performances that the amplifier must comply are summarized in the following table: Parameter Value Central Frequency 1200 MHz Frequency Bandwidth 100 MHz Maximum expected Input Power -20 dbm Gain >10 db Return Loss at the input < -15 db Return Loss at the output < -15 db STAGE 1. GETTING THE INFORMATION FOR THE DESIGN The first steps is to choose what is going to be the transistor used for the amplifier. For the present design the BFR520 transistor manufactured by NXP was selected. Three main reasons were the most important to choose this transistor as the core of the amplifier: 1. According to the performances shown in the data sheet, the transistor can meet the specifications of the amplifier. It can be seen in the following figure: Jose M. Campelo. Page 2

3 The parameter GUM, the maximum unilateral power gain, shows that it is possible to get a power gain higher than 10 dbs, which is the specification for the amplifier. Next figure is a detail of the figure 8 shown just before. It shows that biasing the transistor with a VCE of 6 volts and a current collector IC of 20 ma the maximum unilateral gain for a frequency of 1500 MHz (approx.) is about dbs. So there is enough margin of frequency and gain for assuming that the specified gain of 10 db can be met. Jose M. Campelo. Page 3

4 2. There is plenty of information regarding the electrical behavior of this transistor. There are scattering parameters files available in the NXP website and even a non linear spice model. It seems unnecessary to remark that this is essential for the design. 3. The transistor is available in most of the electronic components websites and the price is not a problem, because it is possible to buy several units for less than five euros. After choosing the transistor, the next step will be to collect all the design data available in order to start the design. In the NXP website and in others, like Infineon for example, it is possible to find a set of scattering parameters files for some different bias point. Besides it is available the SPICE non - linear model, which is very useful too. Just for information, the SPICE file containing the non - linear model is shown hereafter: * Filename: BFR520_SPICE.PRM * BFR520 SPICE MODEL * PHILIPS SEMICONDUCTORS * Date : September 1995 * * PACKAGE : SOT23 DIE MODEL : BFR520 * 1: COLLECTOR; 2: BASE; 3: EMITTER;.SUBCKT BFR Q BFR520 * SOT23 parasitic model Lb 4 5.4n Le n L n L n L n Ccb f Cbe 4 8 2f Cce f * * PHILIPS SEMICONDUCTORS Version: * Filename: Date: Feb 1992 BFR520.PRM 1.0 *.MODEL BFR520 NPN + IS = E BF = E NF = E+000 Jose M. Campelo. Page 4

5 + VAF = E IKF = E ISE = E NE = E BR = E NR = E VAR = E IKR = E ISC = E NC = E RB = E IRB = E RBM = E RE = E RC = E EG = E XTI = E CJE = E VJE = E MJE = E TF = E XTF = E VTF = E ITF = E PTF = E CJC = E VJC = E-001.ENDS Now it is time for starting up the job with QUCS Studio. The transistor will be analyzed using the scattering parameters included in a file.s2p or using the non - linear model. Both the SPICE model and the scattering parameters can be included in the QUCS Studio environment. For the scattering parameter file, it can be used the element dedicated to this task. (See the figure in the next page) 1.- In the tabs in the left side of the screen select Components. 2.- In the combo just above the window of the elements select devices. 3.- Among the elements displayed, it is the S-Parameter file. Dragging and dropping the element it will be available in the working space of the schematic. Jose M. Campelo. Page 5

6 For including the desired S-param. File it is necessary to edit the element: 1.- Click on the right button of the mouse and select Edit Properties Jose M. Campelo. Page 6

7 2.- In the menu that appears, select Browse and in the windows that pops up just immediately, look for the S parameters file that you are interested on: 3.- After select Open in the last window, the Edit Component Properties window will look like the following: Jose M. Campelo. Page 7

8 After selecting the button Apply the file will be included in the element and it will be available for the simulations. Just to clarify, the symbol of the S parameter element can be edited. It can be selected one more suitable by doing the following: 1.- Right button of the mouse over the element S param. in the schematic 2.- Click on Edit Properties and the Edit Component Properties will appear in the screen 3.- In the options window placed in the left, go to Symbol and a combo will be available in the right side of the window. In that combo it is possible to choose among several predefined symbols, like FET, coil, capacitor or BJT, which is (obviously) the best this time. (See the next figure in the following page) Jose M. Campelo. Page 8

9 After clicking in the Apply button, the proper symbol will appear in the schematic Since the SPICE model for the transistor is also available, it will be included in the design like the scattering parameters files. Two different process described hereafter can be done in order to do so: 1. The first one is very simple, but very time consuming. It consists of including the non - linear transistor element available in QUCS Studio and fill all the parameters manually. To do so, the process is as follows: 1. Got to the tabs on the left side of the project navigator window and click on Components. 2. In the combo above the window of the elements, choose nonlinear components 3. Nonlinear models of many devices will appear in the window. Drag and drop in the schematic the npn ransistor. Jose M. Campelo. Page 9

10 4. Once the element is in the schematic, click right button of the mouse over it and choose Edit Properties. The Edit Component Parameters window will appear in the screen. Inside this window all the parameters that model the NPN BJT transistor are available for the edition. Manually, and one by one, the parameters can be edited and the non - linear model will be ready for the analysis. Jose M. Campelo. Page 10

11 This method is not, for sure, the most efficient in terms of time. But what is sure is that you will never forget any parameter, and once you edited all the parameters the job is done. Fortunately, QucsStudio has implemented a better way of doing this kind of thing. QucsStudio is able to import.cir files, where the SPICE description of a device is contained. Jose M. Campelo. Page 11

12 In the Project menu, choose Import. Another windows will pop up. In this windows there are two text fields. In the one labeled as Input File it will appear the name of the.cir file that it is going to be imported to the QUCS Studio browser. Jose M. Campelo. Page 12

13 In the Output File text field it will appear the name of the new QUCS Studio schematic where we get the translation of the.cir file that we want to import. Going to the Browse button of the window, we can navigate to the folder where the.cir file is located. Once selected, the text filed Input File shows the path to the.cir file: Jose M. Campelo. Page 13

14 After doing that, it is only a question of converting the file. Clicking in Convert button of the main window Convert Data File and the task will start. At this stage, it is not strange getting an error and failing in the process. Depending on how you get the.cir file, it is possible to find errors in the conversion. SPICE models of the devices are well known and they are spread all over the internet, but there are parameters in those descriptions that are not understood by QUCS Studio. Jose M. Campelo. Page 14

15 The first time I tried a conversion of a BJT SPICE Model I got this error message: In this case it was the conversion of the BFR540 BJT SPICE model. There is a parameter included in the description that provokes the problem. It is the IRB parameter. If you look for the definition of this parameter in the official SPICE user's guide and reference manual, (Michael B. Steer, ed 1.3 July 2, 2007) is the following: This parameter is not one of the most important among all the parameters that defines the BJT model in SPICE, so the best option to proceed in this case is to remove the definition of the IRB in the SPICE file that we are trying to convert. In this other case, I tried to import the NPN BJT SPICE model of the ZXTN19100CZ. Jose M. Campelo. Page 15

16 The result obtained for the importing process of this.cir file, was the following: In this case, there are six different parameters that provokes a problem in the importing process. Consulting them in the SPICE User guide mentioned before, there are three of them that do not even exist for the BJT SPICE model description: GAMMA, RCO and QUASIMOD. GAMMA parameter exists for the definition of the MOSFET, but RCO and QUASIMOD are not referenced in the manual at all. The other three parameters, TRB1, TRC1 and TRE1 are defined as follows: These parameters are relevant if you have to consider the effect of the temperature in the design, which is something that happens quite often. In this case, the omission of these parameters will lead to a lack of accuracy of the model. But the procedure if this transistor is needed for the design is the same as before. They have to be removed from the list of parameters before importing the.cir file. Jose M. Campelo. Page 16

17 Coming back to the BFR540.cir file, once the IRB is removed from the model contained in the.cir file, and the process is finished, a new schematic will appear in the project browser of QUCS Studio. In order to use this circuit in the proper way, it is necessary to remember the structure of the.cir file, and what kind of things were contained in the file. In this case, it is not only the NPN BJT model of the transistor. In the SPICE description, the effect of the package was included in the model. Something that is really important and useful for RF simulations regarding the accuracy of the results. In the page nº3 of this tutorial, the structure of the.cir file can be reviewed. The SOT-23 parasitic model is taken into account by means inductors and capacitors. That is why we find the nets connected to the transistor itself and other nets connected to the ports. Working only a little with the elements resulting from the import process the non linear model of the BFR540 is ready to be used. Just for clarification, the name of the ports have been changed according to the SPICE model. (Click on the right button over each port, we choose Edit Properties and the name can be edited) Jose M. Campelo. Page 17

18 This group of elements, now included in QUCS Studio in one schematic, can be used as a new element. QUCS Studio allows you to create new symbol for a schematic and after then, it will be available for a new design. How can we get a symbol for the schematic? Click the right button over the schematic containing the model and select Edit Circuit Symbol Jose M. Campelo. Page 18

19 Just after clicking on Edit Circuit Symbol a basic rectangular symbol appears in the window. This basic shape can be easily altered. Got to the tabs on the left side of the project navigator window and click on Components. The only set of components available in the combo button in the symbol editor mode is the Paintings Basic geometric figures are available for painting almost any symbol that you can imagine. Jose M. Campelo. Page 19

20 All the shapes can be edited (right button of the mouse over the shape and choose Edit Properties ) in terms of color, width, length so it is very easy to get the symbol of a transistor, like the one shown in the previous figure. Once the symbol is finished, each time you drag and drop the schematic, where the symbol has been edited, to a new schematic, all the elements defined in the original.cir file can be handled like a unique component, with the symbol previously designed. STAGE 2. DESIGN PROCESS OF THE IDEAL AMPLIFIER Once it is available the scattering parameters and the non - linear model of the transistor that it is going to be used, it is necessary to determine whether is possible or not to met all the requirements for the amplifier. The first approach to the task is to analyze the amplifier stage, considering all the elements ideal. If the ideal amplifier is able to meet all the requirements, the design process can continue. Otherwise, it would mean that the components, mainly the transistor, would not be suitable for the job. The core of the amplifier is the transistor. It must be biased in the best point considering all the requirements. As always, there is a trade off, but it is necessary to take into account the following general ideas of design: Jose M. Campelo. Page 20

21 In order to get optimal gain characteristics, it is necessary biasing the transistor at a collector current that leads to the maximum or near the maximum transition frequency, ft. On the other hand, for best noise characteristics, a low collector current is generally most desirable. According to the data sheet of the transistor, the relation between the transition frequency and the current collector, is depicted in the following figure: For a wide range of VCE values, from 4 V to 8 V, the maximum ft is achieved biasing the transistor with a current collector IC of 40 ma. As it was seen previously, there are plenty of scattering parameters files available for this transistor. In this case, it will be chosen the file containing the closest to the optimum bias point discussed before. In this case, the bias point for the transistor will be, IC = 30 ma, and VCE = 3 V. Jose M. Campelo. Page 21

22 And, why we choose the scattering parameters instead of using the non - linear model even though the bias point is rather far from the one determined in the previous discussion? There are two main reasons: 1. In the table of the requirements for the amplifier, it is defined the maximum input power expected at its input. This value is -20 dbm. This means that the small signal approximation is perfectly applicable. So, the scattering parameters are valid for the design. 2. The non - linear model of transistors is extracted from actual measurements in the laboratory. Among others, the scattering parameters are one of these measurements, but not the most important. The process is quite complex and eventually the model obtained is valid for a specific range of voltages and currents, and also it is only valid in a range of frequencies. But in terms of accuracy it is always better to design basing on actual measurements, better than models obtained from them. But, in order to calculate what are the resistors needed for biasing the transistor in the point chosen, it is necessary to use the non - linear model. It will not be the last time that we need to use it. For doing this analysis, the next schematic is presented: Jose M. Campelo. Page 22

23 The lumped elements used in the schematic are available in the left browser window, in the Components tab. In the other hand, the non - linear model of the transistor is included, dragging and dropping the schematic from the browser window, as it was explained in the page 18. The voltage source can be found in the Components tab, choosing in the combo button the option sources In this group of elements, it can be found all the sources that are normally used in electric designs: independent sources, dependent sources, modulated sources, noise sources and many more. Jose M. Campelo. Page 23

24 There are two other elements in the schematic, that are the current probes. These elements are used for measuring the currents in the branches where they are included. They can be found choosing in the combo button the option devices : The DC Analysis can be done by proceeding in two different ways: 1. Including in the schematic the DC analysis box, that can be found in the combo mentioned before, choosing the option simulations. In this window it can be found all the analysis that are available in QUCS Studio. Dragging and dropping the DC simulation box into the schematic and naming all the nodes where the voltages are needed, the schematic can be analyzed. Jose M. Campelo. Page 24

25 For naming the nodes, in the tools bar in the upper side of the window, it can be found the button Wire label. After clicking in this button, the shape of the cursor changes into a hand with a pointing finger that can be used for signaling the node that we want to put a name: Jose M. Campelo. Page 25

26 Once all the interesting nodes for the DC simulation are ready, it is time for simulating the schematic, by clicking in the simulate wheel: Just after finishing the simulation, the results window appears in the right side of the schematic window as another selectable tab. In the project browser, in the left side of the screen, they will appear all the different types of graphs that are available for representing measurements in QUCS Studio. In this case, for showing DC values, the best type of graphic could be the tabular one. It is only necessary, as in all the other cases, to drag the selected type of graphic, and dropping it in the. dpl results window. Jose M. Campelo. Page 26

27 When the tabular graphic is dropped, it will appear a new window, where the data available from the DC simulation can be found. In this case, all the nodes named in the schematic, will contain information regarding the DC voltages and also the current probes will be available with the names that were set during the definition of the schematic. QUCS Studio offers another possibility to analyze the DC values in a circuit. And it is really interesting, because it is not necessary to name any node. Using the same schematic, and using the simulation wheel but the one labeled as DC, the voltages for all the nodes of the circuit and the currents in the branches where the current probes where included will be depicted over the schematic, as it can be seen in the next figure: At this stage, regarding the design of the amplifier, it is already clear what are the resistors that are needed for biasing the transistor in the desired point. Jose M. Campelo. Page 27

28 The next step is to analyze what are the performances as an amplifier of the transistor itself. Essentially the unique component that is needed for designing one amplifier is the transistor. Since we have the scattering parameters file we can analyze the performances of the transistor biased in the selected point with the next schematic depicted in the next figure: The schematic includes the scattering parameters file, with its symbol changed to the one for the NPN BJT transistor, and the sources needed for the S Parameter simulation. Also it can be noticed the presence of several equations. This is a relevant point to remark. QUCS Studio has the possibility of working with equations relating parameters of many types. That is very useful for simulating lots of different performances for all kinds of circuits, and all the combination among then. Using equations in the schematics is very simple. It is just necessary click on the button shown in the previous figure and dropping the element in the schematic. After that, the equations can be edited just by double-clicking on the element: Jose M. Campelo. Page 28

29 I In the window that appears it can be edited the name of the equation, in the text field labeled as Name and the expression in the other labeled Value. The expressions that can be included in one equation are available in the help window of QUCS Studio. Pressing F1 button, this window will appear: Jose M. Campelo. Page 29

30 Choosing Mathematical Functions the basics for all the operations and values for the equations in QUCS will be shown in the screen: 1. The values that are extracted from the circuit and can be handled in the equations of the schematics are listed beneath the title Name of values. Among them, voltages, currents, scattering parameters The mathematical expressions that can handle and transform those values are listed beneath the title Operations and functions. 3. Constants like PI (3, ) and other are in the paragraph titled the same way. 4. Mathematical expressions for being applied in the graphics of the results windows are also included among the others mentioned. Those expressions do not work if they are included in the schematics. An example of them is going to be discussed later. Using the equations, it is possible to analyze the gain of the amplifier stage taking into account all the scenarios for the gain which is the most relevant parameter. According to the literature ( Microwave Transistor Amplifiers by González) there are several concepts regarding the amplifier gain, that must be considered: 1. The transducer gain. GT: It is the ratio of power delivered to the load to the power available from source including the effects of input and output matching. It is the actual gain of an amplifier. 2. The Operating Power Gain, GP: It is the ratio of power delivered to the load to the input power to the network 3. The Maximum Transducer gain, GTMAX: Maximum Transducer Gain. is the ratio of power delivered to the load to the power available from source including the effects of input and output matching, but being both conjugated to the source and the load, respectively, which is as best case. It is the actual maximum gain of an amplifier. 4. The Maximum stable gain. GMAX: It is the maximum stable gain that can be accomplished in an amplifier, when the stability factor K (Rollet factor) is equal to one. Jose M. Campelo. Page 30

31 The transistor selected, biased with a collector emitter voltage of 3 volts, and a collector current of 30 ma, standing alone, is capable of the following figures at 1200 MHz. Jose M. Campelo. Page 31

32 The two previous figures are the transducer power gain and operating power gain. According to the definitions explained before, the difference between both are due to the relatively lack of input and output matching of the transistor network. If these matching were better, the differences between both defined gains would be negligible. The next two figures show the goals that you can expect from the amplifier stage working in this conditions: The left figure shows the Maximum transducer gain. This is the maximum gain that can be expected from the circuit when the input and the output are matched to the load and the source. Jose M. Campelo. Page 32

33 The right figure is the maximum stable gain, which is the maximum gain that is possible to get from the transistor, taking into account the stability K=1. These results mean that the gain and the overall performances of the amplifier can be (and must be) improved by means matching the input and the output of the network. Regarding the stability of the circuit, that parameter can be analyzed in various ways. The most used and (maybe) known analysis is the Rollet factor K. QUCS Studio has a built - in measurement that can be invoked in the results window. In our case this result is the following: For amplifiers it is mandatory to get a Rollet factor always bigger than one. Otherwise, the results can be disastrous. Instead of an amplifier, it is not difficult to get an oscillator, if you don't take into account the stability analysis. Jose M. Campelo. Page 33

34 Rollet factor is not the only stability parameter that can be analyzed with QUCS Studio. Mu factor is also present in the pre defined expressions for the results window. For including this parameter, the procedure is the same than the one needed for the Rollet parameter, but typing mu() and mu2() instead of rollet() The results for this analysis, for the amplifier design, are in line with the ones obtained for the Rollet factor. It can be seen in the next figure: Jose M. Campelo. Page 34

35 The results obtained and presented in the previous figures, show a frequency bandwidth below 500 MHz where the circuit is conditionally stable. That means there could be problems in those frequencies depending on the loads connected to the circuit. In order to know what are these loads that can lead to an instability, the Stability Circles are a very powerful tool. Representing these circles in the Smith chart it is very easy to know what are the impedances which connected to the circuit of the transistor, (at the input or the output) are susceptible to provoke an oscillation. (For a detailed explanation of the Stability circles, see Microwave Transistor Amplifiers by Gonzalez, page 95) QUCS Studio has this type of analysis implemented and it is not necessary to include the equations for determining these areas of the Smith chart. The Stability analysis are expressions that are built in QUCS Studio for working in the results window. This analysis works as follows: Each frequency included in the frequency plan of the Scattering parameters analysis in the schematic will produce a stability circle. There are two analysis available. One regarding the source impedance, which is called stabs(), and another regarding the load impedance, which is called stabl(). Just for not making a mess with the results, it is better to analyze a limited number of frequencies and only represent a limited number of circles in the Smith chart. In the schematic where the circuit is analyzed, the way of doing so, is to specify a certain number of points in the scattering parameters analysis: Jose M. Campelo. Page 35

36 In the case of our L Band Amplifier, the frequencies that enclose the conditionally stable bandwidth are, in the lower limit, 40 MHz, because of the scattering parameters file that is provided by the manufacturer, which starts at 40 MHz, and 500 MHz in the upper limit, where the Rollet factor starts to be greater than one. After the analysis, in the results windows, the Smith chart type of graphic must be chosen, and dropped. Then, in the text field, (beneath the label Graph Properties ) the stabl() for the load (or stabs() for the source) can be edited. The discussion of the results can be found in the literature (see Microwave Transistor Amplifiers by Gonzalez, page 97). In the present design, taking into account that S11 and S22 are <1 both, the impendances that would provoke the instability of the amplifier, are inside the red circles, as it can be seen in the next figure: Jose M. Campelo. Page 36

37 The shadowed areas of the two Smith charts define the impedances that must be avoided to ensure the stability of the amplifier. After all these analysis and considerations, just a quick review of the values that are included in these areas enclosed by the stability circles, an analysis of the Rollet curves, and the other stability criteria, all of them demonstrate that it is clear that the transistor, standing alone, is not enough to ensure a stable and compliant design. At this stage it is time to introduce in the design the input and output matching networks. In the technical literature there are many explanations regarding the useful topologies for the matching networks. There are plenty of analysis talking about the forbidden zones of matching depending on the type of network chosen. In this case, as basic guidelines to the process will be as follows: Jose M. Campelo. Page 37

38 1. The first step is to choose the matching network topology. Since the specification in terms of bandwidth is not to tight, it is reasonable to think that L type of matching network would be enough to meet the requirement. Besides, as almost all the situations in RF design, the simpler solutions the better results. 2. Both input and output impedances will be calculated. In this case, the normalized ones are the parameters needed for the analysis. The expressions for evaluating the impedances can be found in the technical literature, and are the following: Z IN = Z 0 ( 1+S 11 ) ( 1 S 11) and Z OUT = Z 0 ( 1+ S 22 ) ( 1 S 22 ) The normalized expressions are these ones presented before, divided by Z 0 In QUCS Studio this calculations can be done in two different ways: a) Including the expressions in the schematic, using an equation Item: b) Using the built-in command expression: rtoz(x, Z0). This expression is capable of transforming, reflection coefficients, (like S[1,1]) into the equivalent impedance. (See next figures for an example). This expression is available at the schematic level (as it can be seen in the next figure) and also in the results window, this expression can be used in any of the graphics. (see the following figure of the window results) J. M. Campelo. Page 38

39 1. Examining the real part of both expressions, the type of L Matching networks and the values of its components can be properly chosen. There will be two different types of L-Matching networks depending if the real part of the impedance that we want to match is higher or lower than the unity: J. M. Campelo. Page 39

40 In the case of the L Band amplifier, the table of impedances can be obtained using a Table type of graphic in the results area, like the following: J. M. Campelo. Page 40

41 2. With these values of impedance, coming from the scattering parameter file of the transistor, and the equations presented before, the components of the matching networks are easily calculated: 3. Next step must be to take a look to the values obtained from the equations. For the two sets of results for each matching structure (B1, B2 and X1 and X2) there can be values that are not possible to find in real commercial components. This is not the case this time, but that is something to carefully take into account. For example, the capacitor calculated for the admittance jb1 is pf. That is a value that can be found in the commercial sites like FARNELL, MOUSER ELECTRONICS, RS-AMIDATA J. M. Campelo. Page 41

42 Lower values than 0.4 one can be tough to find in the commercial sites. 4. After all the calculations, it is time to choose the eventual matching network topology. As a general rule, lower values of inductances are better always. As long as the inductance increases, the self - resonant frequency and quality factor decreases. Even to values that are not compatible with the design. This is not the case for the inductors that come up from the equations. The larger is 9.57 nh. There are commercial inductors of this value, whose resonant frequency is above 5 GHz, as it can be seen in the next figure. On the other hand, the matching network where the inductors are connected in parallel to ground offers one extra performance that could not be found in the other one. This network is a high pass network, so the gain of the amplifier stage at low frequencies is not a problem, as it will be seen in the next figures. Therefore, at this stage of the design, there is no clearly better matching network if both solutions are compared. The best solution would be the one that makes compatible both matching solutions. That is, a layout that can admit both L type matching networks calculated previously. That idea would be explained in the next paragraphs. J. M. Campelo. Page 42

43 In order to see the results that can be foreseen from the networks calculated before, the following schematic was design in QUCS Studio: The performances of the amplifier stage including the first L-matching network are the following: J. M. Campelo. Page 43

44 Several conclusions can be obtained from the previous results: 1. The maximum transducer gain is not met in this design. There are 0.6 db of differences the actual transducer gain, and the maximum value that the stage is able to deliver. 2. There is a tremendous amount of gain at low frequencies. That is something dangerous for the stability of the amplifier. 3. The stability parameter shows that the previous comment is clearly a problem, and the design needs to be improved The performances of the amplifier stage including the second L-matching network are the following J. M. Campelo. Page 44

45 As in the previous design, some conclusions can be obtained from the results: a. The maximum transducer gain is not met either in this design. There are the same 0.6 db of difference between the actual transduced gain and the maximum value that the stage is able to deliver. b. The gain at low frequencies is not a problem in this case. It is highly attenuated due to the high pass topologies of the matching networks. c. The stability parameter is clearly a problem, and the design needs to be improved. 1. There are two things that are remarkable of both designs of amplifier using different L - matching networks: a. The transducer gain obtained which is not the maximum that is possible to achieve of the stages, according to the expressions. b. The matching is good, but it is not bigger than -15 dbs that can be considered as good enough. This is because the S12 of the transistor, that is small, but it is not negligible. Trying to improve both situations, a T-type matching network is analyzed. It consists of three elements, two of them series inductor, and one shunt capacitor connected to ground. Considering one more element in the matching network allows to have one more degree of freedom and also allows to match nearly all the possible impedances. The amplifier stage using these T type matching networks are as follows: J. M. Campelo. Page 45

46 The equations for calculating the components of the T - matching network are those presented for the L- matching networks, but working in two steps. In this case it is necessary to find an intermediate resistor R X which is not a part of the matching network, but participates in the equations. The idea is to divide the three section T - matching network in two simpler L networks, whose equations have been used before. J. M. Campelo. Page 46

47 The conditions that must comply the virtual resistor included (only in the calculations) depends on the type of three matching network chosen. In this case, R X > RL, being RL the real part of the impedance that it is being matched. The equations that are needed in this case are the ones that define the L-matching network, taking into account that the process is divided in two steps: 1. The L-matching equations are used to match the impedance Z IN to the virtual resistor RX.RX must be greater than Z0. The results will be the values for C2 and L2 of the previous figure. 2. The same equations are used to match the impedance of the generator, the Z0, to the RX. Those values will be L1 and C1. Just to test the values obtained from the equations, a very simple schematic can be implemented in QUCS Studio. One circuit containing a simple impedance, built by a resistor and a capacitor, will be analyzed. The impedance will be calculated without matching at all and then, the values obtained from the equations will be tested. The example considers a frequency of 1 GHz. The first analysis is done taking into account that there is no matching network of any kind: J. M. Campelo. Page 47

48 J. M. Campelo. Page 48

49 Note. In the previous schematics, the elements crossed (or not, depending the case) are resistors from the lumped components palette, with 0 ohms and with all the ticks of the Edit Properties (right button) display menu deactivated. Coming back to the schematic of the amplifier that includes the T-matching networks at the input and the output of the transistor, the results that can be expected from the circuit are the following: 1.- The overall performances of the amplifier stage: J. M. Campelo. Page 49

50 2.- A detail of the matching at the input and the output of the circuit is as follows: 3.- The stability analysis offers the following curve: (Rollet factor K) 4.- The main reason to introduce the three section matching networks was the idea of improve the transducer gain of the stage, and the matching of the input and the output of the circuit. As it is clear in the previous figures, the matching levels are really good. The foreseen gain is the following: J. M. Campelo. Page 50

51 In the figure above, the operating power gain G P and the transducer gain, GT, are presented. As it was mentioned in previous discussions of this document, the transducer gain, GT, is the actual power gain of the amplifier stage. If this quantity is compared to the maximum transducer gain, G TMAX, it can be found how far from the limit of gain is the design that we are dealing with. The maximum transducer gain for this stage is calculated using the mathematical expression in a Cartesian graphic of the diagrams palette and put it in the results window. J. M. Campelo. Page 51

52 This shape of this curve is the following: The ideal maximum gain that could be obtained from the amplifier, using this configuration and this bias for the transistor, comes from the expression STABLE G 10 log 10 ( (( S 21 ) S 12 ) ) This is the ideal situation where the S11 and S22 of the amplifier are equal to 0 in magnitude (minus infinite in db). This is something that is not possible, and establishes the upper limit (non achievable) to the gain of the amplifiers. This expression can be used at schematic level, or in the window results. In this case, it is used at schematic level, as follows: The results for this parameter, is depicted in the following graph: J. M. Campelo. Page 52

53 At this stage, all the information needed to decide is gathered in the previous comments and figures: 1. The bias point for the transistor seems to be enough to meet the requirements 2. The matching networks topology that seems to be the best for meeting the specifications in the T-matching network. It offers the best performances in terms of matching, and, therefore, the best foreseen gain. 3. The stability of the stage is something that needs to be improved. It is not a good design regarding this parameter. Next step in the design process is to go from the ideal situation to the real world. All the simulations and the analysis performed up to now consider the circuit to be ideal. The DC block capacitors are ideal both (the input one and the output one), the DC Bias choke is ideal too, and the components are all of them ideal, except from the transistor which has been considered as real from the beginning, since scattering parameters file has been used since the first simulation. Perhaps the next step, shown in the next figure, would be better to be skipped in order to save time, but it is very interesting for noting several remarkable things. J. M. Campelo. Page 53

54 This schematic is rather far from the real yet. The change from the ideal one is only the structure, which is now the real one. There is also a new network connected at the output of the transistor and also a resistor connected to the base but set to 0 ohm. These are fundamental to improve the stability of the circuit up to the needed values. Besides, the transistor is simulated using the same scattering parameters considered since the beginning. But the rest of the elements are still ideal. After making the calculations for the input and output matching networks and a few iterations of manual optimization, (due to the real fact that the S 12 is not equal to 0 and the transistor is not perfectly unilateral) the results that are obtained for the amplifier stage are shown in the following figures: J. M. Campelo. Page 54

55 The stability analysis, which most relevant parameters (rollet factor and factors) are shown in the previous figure, shows that the improvement produced by the networks introduced in the design, is enough to ensure the proper working of the stage. The figure shown before the stability graphs, also confirms an improvement in the input and the output matching of the amplifier. Finally, the comparison between the maximum transducer gain and the maximum stable gain is presented in the following graphic: J. M. Campelo. Page 55

56 Maybe this last figure is the most relevant one, because it provides one really remarkable concept. The improving of the stability that is not free. Absolutely not. It has an important impact of the performances of the circuit. Despite the matching of the input and output is rather good, better than -23 db at both sides, the amount of gain is reduced significantly. This is the cost that must be paid in order to get the stability of the amplifier into the levels recommended. However, this reduction can be improved. The resistor placed at the output of the transistor is mainly responsible of controlling the improving of the stability parameters. The results presented in the figures previously, were obtained using a resistor of 390 Ohm. This value is not high enough. It can be increased up to 680 Ohm. This increase will impact the stability parameters as it can be seen in the next figure. But it has also an effect on the gain, which increases up to 11.3 db On the other hand, the reduction of the stability parameters are also easily observable in the curves presented in the next figure. J. M. Campelo. Page 56

57 So, finally, as the result of the first step into transforming the circuit from the ideal to the real, the amplifiers losses gain. This is caused by two different effects: 1. The mismatching of the circuit. In this case this is almost negligible because the matching levels obtained with the matching networks are really good. 2. The improvement of the stability. This causes a significant reduction of the gain, which is the toll that must be paid in order to assure the function of the design. The next stage is to include in the design the effect of the microstrip lines which is the deepest impact of all in the amplifier performances, as it will be seen in the next analysis. J. M. Campelo. Page 57

58 STAGE 3. DESIGN OF THE REAL AMPLIFIER Up to now, the circuit designed is completely useless. It is true that the amplifier analyzed at this stage considers all the components that will compose the eventual RF block, but it is very far from the actual behavior. The PCB lines of the circuit that will connect the components each other, have an important and deep effect on the performances of the amplifier. Also the actual models for the components. That is why this must be the next analysis to be done after the PCB lines issue. Focusing on the layout of the amplifier, all the lines that will compose the eventual design must be simulated together with the models of the components. That is essential to get an accurate response of the whole circuit. The method that will be used to design it, will necessary have to consider: 1. The actual length and widths of the components. 2. Their location on the board. 3. The distances between each other. 4. The path and physical dimensions of the connecting lines between the components 5. The physical dimensions of the footprints recommended for them. Taking into account all these physical constraints, translating them into circuital models (microstrip elements) is a challenging task. Each element, (each line of the layout), must be modeled as a microstrip element; one of the following palette (see figure in next page) included in QUCS Studio. J. M. Campelo. Page 58

59 As an example, the resistor footprint is analyzed. The recommended land pattern of a 0603 resistor (one of the standard size for resistors among many others, like 0805, 1005, 1206, 1210 ) according to the IPC (the ASSOCIATION CONNECTING ELECTRONICS INDUSTRIES) set of rules, compiled in the document IPC SM 782, and in the Generic Requirements for Surface Mount Design and Land Pattern Standard document, the IPC 7351, is presented in the following figure: J. M. Campelo. Page 59

60 The land patterns dimensions shown in the previous figure are the recommended ones for the metallic pieces that must be in the layout of the PCB for soldering the resistors on them. These recommended land patterns have to be modeled using microstrip elements for including their effect on the circuit analysis. The model that will be used for simulating the 0603 footprint is depicted in the next figure: J. M. Campelo. Page 60

61 The eventual situation is to have all the components footprints modeled in terms of basic microstrip elements. That means a lot of elements in the circuit. To reduce the complexity of the schematic, in QUCS Studio, it is possible to create a symbol that represents a group of elements, saving space in the schematic and simplifying the view. For doing so, in the previous schematic shown, right click on the right button of the mouse: J. M. Campelo. Page 61

62 NOTE: It is necessary to include in the schematic the number of sub - circuits ports that are needed for the connection of the symbol in the schematic. In this case the ports P1 to P4. They can be located in the Components tab, in the lumped components element of the combo, as it shown in the next figure: The schematic window will change into the symbol window, and the painting tools will appear in the combo: J. M. Campelo. Page 62

63 A basic square symbol appears, containing all the sub circuits ports that were included in the schematic view. Using the elements of the painting palette, the default symbol can be edited, changed, and, in general, improved in many ways. This process is also done for the inductors, capacitors and for the transistor. The BFR520, as it was presented at the beginning of this document, is packaged in a SOT-23 case and the model in terms of microstrip elements is the following: This model corresponds to the recommended land pattern mentioned in the IPC document: J. M. Campelo. Page 63

64 Working the same way with the elements in the palette shown before, it is possible to have an elegant symbol for this device in QUCSStudio. It can be seen in the following figure: Working with symbols associated to sub-circuits allows to maintain certain level of cleanliness and clarity in the schematic, resulting much more easy to follow during a design review. J. M. Campelo. Page 64

65 Once all the sub - circuits are prepared and all the corresponding symbols are ready, it is possible to get a very elegant and clean schematic, very easy to follow. It is time to simulate the exact length (as much as possible) of the lines that connect each element in the eventual design, with the exact (again, as much as possible) run including bends and the rest of the possible curves, crosses, steps, gaps of them. For doing so, it is better to use some short of layout tool. Calculating the run of each line from one component to another is a very tough task without any graphical reference. This task can be done in following way. QUCS Studio has implemented a link to the layout KICAD module, one of the best layout CAD tool available, and what is as important (maybe more): It is a free CAD tool. This will be our graphical assistant. The suggested procedure is as follows: 1. Load the file where is archived the lumped model of the amplifier, which was presented in the previous page, page nº XX J. M. Campelo. Page 65

66 2. Check what are the footprints chosen for all the components in the schematic for doing so, right button click of the mouse over each component to get the properties menu: 3. Choosing Edit Properties in the pop up window, we get the options menu that must be already known, and taking the right slide bar to the bottom, it can be found the combo where the footprint of the element for the layout is chosen: J. M. Campelo. Page 66

67 In this case, the SMD0603 type of footprint is selected, because it is the best for the application considering the frequency bandwidth required. This process must be carried out for all the components in the layout. Even the scattering parameters file, can be edited in terms of its PCB layout. (See figure in next page). In this case, the package type TO92 is not a suitable one for RF applications. This is a typical package for low frequency designs. The chosen one must be SOT23. J. M. Campelo. Page 67

68 There will be a problem related to the package of the inductors. In the set of package types set by default for the inductors in QUCS Studio it is not included the SMD types necessary for RF applications: J. M. Campelo. Page 68

69 The packages shown in the previous figure are not useful at the frequency bands of the design. This problem will be solved later. 4. Go to the menus and click on Tools Create PCB Netlist. Or, directly, press F10 in the keyboard. 5. The KICAD module is loaded and it appears in the screen, just after pressing F10 or doing the previous point (4) J. M. Campelo. Page 69

70 6. To include in the workspace the components coming from the schematic, go to the Read Netlist button: A new window appears. In this window, the netlist will be handled. First, pressing Browse Netlist Files, it can be chosen the.net file generated with QUCS Studio where the data regarding the components is in. J. M. Campelo. Page 70

71 Second, pressing Read Current Netlist, the components from the schematic will be included in the KICAD workspace. At the beginning, all the components appear overlapped, located in the same position. Of course, they can be moved wherever you want. Doing the next: Place the arrow of the cursor in the center of the group of components. Press the right button of the mouse and the following window will pop up: J. M. Campelo. Page 71

72 In this window, choose the footprint of the component that it is to be moved. Right after choosing the footprint, the window changes into the Footprint window for the component: Here, the type of edition to be performed can be selected: the footprint can be moved, rotated, flipped, deleted or edited, which is something very useful in this case, that will be commented later. 1. After repeating this last point the necessary number of times, (minimum, the same number of times than components placed in the schematic, of course) all the footprints will be spread in the KICAD workspace. Then, it is possible to start thinking of how it will be the layout for the amplifier. But first, it is necessary to change those footprints that are not the ones that are to be used. More precisesly, the inductors. The footprints placed in the workspace must be of SMD type. J. M. Campelo. Page 72

73 In order to change those footprints, the process is the following: Locate the cursor over one of the inductor footprint. Clicking on the right button of the mouse, the Editor window will pop up. The first option of this window is related to the footprint. Moving the cursor over this option another window will appear at the right of the other one. There, it can be chosen the option Edit J. M. Campelo. Page 73

74 After clicking Edit the Module properties window is shown. Then, clicking in Change Module another window named Exchange Modules will pop up. Clicking in Browse Libs modules all the modules available in the libs loaded for the project will be invoked. They appear in a third window, named Modules where a list of modules is displayed. The one that is needed is the SM0603. Once it is chosen, we go back to the Exchange Modules window, where the footprint can be changed only for the instance by clicking Change Module. But It can happen that the same operation must be done for many other elements that are the same. J. M. Campelo. Page 74

75 By clicking Change same modules this action will be performed for all the footprints of the design that are the same than the selected one. 1. Once all the footprints are the suitable ones, it is time to locate them, trying to achieve a design where the microstrip lines are the shortest possible. The main point of using the KICAD module is that it is possible to calculate the exact length of the lines between the footprints of the components and the microstrip elements that must be used to connect them. If the task has to be done without a graphical support, it will lead to mistakes and inaccuracies that will impact the design, in a greater way as the frequency increases. In order to calculate the distances of microstrip lines between components, the KICAD module implements a dedicated microwave toolbar where it can be found several basic microstrip elements for making high frequency layouts. J. M. Campelo. Page 75

76 One of the primitives can be used for the microstrip lines is labeled as Create stub of specified length Clicking on this element, the length of the line can be edited, but only the length. J. M. Campelo. Page 76

77 For editing the width, it is necessary to go to Dimensions Track and Vias Track width Now it is possible to draw a line of 1 mm width, for example, but for getting the exact length, it is necessary to take into account the way the lines are depicted by KICAD. The problem lays on the way the microstrip lines are built using this primitives of this special microwave toolbar. In the following figure, several microstrip lines length are shown, just to clarify this point. J. M. Campelo. Page 77

78 The elements shown in the previous figure demonstrate that the way of defining the microstrip lines in KICAD is not useful for the purpose of measuring distances, because, in each line, apart from the desired length chosen for the line, it appears a block (a little bit longer than one millimeter) where the value and the reference are shown. There is a way of measuring distances in KICAD and using them as reference for the footprint placement. In the standard right toolbar of the window, it can be found the Dimensions tool. This tool is designed for delimiting the tracks and drawings in a layout. If this tool is used for delimiting a length equal to the distance between the components, it can be used as reference for the placement of the microstrip elements. For doing so, two relevant aspects must be taken into account: The working layer can t be Copper or Component layer. One suitable layer for delimiting the layout can be the Drawing layer. The texts must be edited, and the width of them must be reduced to 0.03mm or 0.02 mm. Larger values will provoke that texts are unreadable. J. M. Campelo. Page 78

79 J. M. Campelo. Page 79

80 1. As a conclusion to this procedure, regarding the KICAD layout module, the most remarkable things are the following: a. The module can be used as a graphical support for the placement of the footprints. b. This will allow to simulate accurately the lines and the situations that occurs in the layout, which produce a deep impact in the amplifier performances. c. In order to get eventually the layout of the amplifier, the KICAD module is not the best tool for doing so. The limitations of the tool are solvable, but really demanding.in terms of time. The next scenario to be considered in the simulation process is to translate the conclusions obtained from the draft of the layout worked in the KICAD module. Along with the sub circuits developed for the lumped components, the resulting schematic is the following: In this schematic, it is included one extra net, which is very relevant to ensure the stability. At low frequencies, amplifiers use to have large gain values. General recommendation is to reduce these value. The L-C resonant circuit introduced in parallel to the main signal flow is used to do so. J. M. Campelo. Page 80

81 The first thing remarkable in terms of the simulation is the effect that all the microstrip lines structures have in the performances of the circuit. If the values obtained are introduced directly in the new schematic, the results are the following: A detail of the response, in the frequency bandwidth of interest is as follows: J. M. Campelo. Page 81

82 In terms of stability, the improvements achieved using the mentioned networks for stabilizing the stage are still working: J. M. Campelo. Page 82

83 It is clear that the amplifier needs a re-tuning process to get the correct values, now that the effects of the microstrip lines are considered. QUCS Studio includes a module for optimization, but it is in the early stages of the development. This re-tuning tasks seems to be to heavy for this module. This is not a big deal. It is perfectly possible to perform the re-tuning by hand. Just by including a Parameter Sweep module, it is possible to determine which range the best values for each parameter are located in. In the tab Components, choose in the combo box the option Simulations and there the Parameter Sweep is available to be included in the schematic. Once the box is included in the schematic, it is necessary to define the sweep. In this case, the parameter submitted to the swept is going to be one of the input inductance of the matching network: L1. The definition window is depicted in the following figure. It is named Edit Component Properties as in other situations described previously. J. M. Campelo. Page 83

84 There is a field, labeled as Simulation for determining the type of analysis that is going to be used for the swept. In this case, the Scattering Parameter simulation, codified by the instance name of the scattering parameter box in the schematic, SP1. In the field labeled as Sweep Parameter the parameter of the schematic must be noted. In this case, the variable LIN1, which is the inductor mentioned before. After defining these two fields, the rest that must be defined are concerning the initial value of the swept, the final one, and the number of points that must be considered for the analysis. In this example, as the number of steps is set to 5, the simulator will perform the scattering parameters analysis 5 times, and the results will be as follows: J. M. Campelo. Page 84

85 Iterating this way with the parameters under optimization eventually the figures will converge to the desired solution: J. M. Campelo. Page 85

86 The results analyzed in all the usable bandwidth are the ones depicted in the next figure: In terms of stability the stage optimized behaves as follows: J. M. Campelo. Page 86

87 There are some conclusions that can be obtained from the results already obtained. The most relevant one is that the required gain for the amplifier stage will not be met. At least, not using this biasing for the transistor. But this is not the last step in the simulation yet. There are a few more things that must be taken into account. Up to now, the resistors, capacitors and inductors analyzed have been lumped ideal elements. That is far from the real situation. Those ideal components should be replaced for their electrical equivalent models if those were available. When the time of purchasing the components has come, it is fundamental to consider if the manufacturers selected provide information about spice models or other similar type of data. There are several manufacturers of passive components that provide a complete information regarding spice models. AVX, TDK, Vishay, Coilcraft, Tayo Yuden, Murata, KEMET, Infineon are several of those mentioned before. By the time this tutorial is written the following links are useful regarding the issue under discussion: For TDK multilayer chip capacitors: For Coilcraft inductors: For AVX passive components: For Murata passive components: For the TAIYO YUDEN design support and spice models: Infineon Technologies includes in its site a very good application for looking for models. They call it the Simulation & Tool finder channel=5546d da #! showallparameters=false&radiooption0=5546d da dc &r adiooption1=5c a1d11e381a2d c&sort=group&sortfield=smal LEST It seems clear that there is enough information to simulate inductors and capacitors quite accurately and it is easy to find. There are enough commercial providers offering spice J. M. Campelo. Page 87

88 models and scattering parameters. Eventually, it is only question of purchasing the right brand Regarding the spice models for the resistors, they are not so common. There are vendors, that provide libraries for the commercial CAD software but it is very difficult to find this information in plain spice files or similar. Normally, resistors are not mounted in the RF path, because of the losses that they include in the networks. They are used to build bias networks mainly, and, since the impedance that presents this elements is several orders higher than the 50 ohms used to design the RF paths, the effect on them is minor. But resistive attenuators are not so strange in the RF circuits, and in order to get an accurate response it is necessary to analyze accurate models for the resistors. VISHAY is one of the most important vendor of passive components and they have perform analysis of the resistor electrical models working up to microwave frequencies. They can be found on their web site, and in their pages it is possible to find accurate models for resistors according to the package dimensions considered: In the next figure, is presented the model for the resistor suggested by the vendor, and the values that need to be considered for defining it. J. M. Campelo. Page 88

89 All these models can be easily included in QUCS Studio. And this will allow to simulate accurately the real components in the schematics. Let s take the example of the Multilayer Chip Capacitors manufactured by TDK. There are quite an amount of types of components that can be used for designing circuits. Let s consider one of them, because the procedure will be the same (obviously) for the rest. J. M. Campelo. Page 89

90 In a new schematic file, proceed to include the basic components of the model, shown in the previous figure, which is a detail of a piece of information published by the vendor where the electrical model is pictured. The elements, according to the model, must include parameters. To do so, right button click on the mouse over the element, and choose Edit Properties. NOTE. If the information is contained in a spice file, the best way of proceed is to import them, as it was done in the case of the transistor parameters previously in this tutorial. J. M. Campelo. Page 90

91 In the Edit Component Properties window that pops up, in the field dedicated to specify the capacitance in Farad, the parameter C1 is included. This is the way to inform QUCS Studio that the value for the capacitor will be a parameter of the design. These same steps must be done for the rest of the elements in the model that include parameters. J. M. Campelo. Page 91

92 Once all the parameters are included, in the schematic window, press right click button and choose Edit Circuit Symbol The schematic window changes into the symbol window. The prototype symbol for a two port components will appear by default. This can be edited and changed into a cooler one the same way that has been explained in this tutorial before. J. M. Campelo. Page 92

93 Regarding the parameters, just beneath the symbol itself, there is a text field where the parameters will appear once they are defined. Double click on this text field, o right button click over it and clicking on Edit Properties, the Edit Subcircuit Properties window will pop up (See previous figure). The fundamental properties of the symbol can be edited in this window. The first one is the name of the symbol that will be seen as a prefix once it is included in a schematic. Therefore, it is better to edit the text by default SUB and changed into something that describes as much as possible the function of the elements contained in the symbol. Since the symbol will represent the TDK model for a MLCC capacitor, the text selected for the prefix is TDK_C0603_ The steps to include one parameter are the following: In the field labeled as Name will be placed the designator of the parameter. For example C1 In the field labeled as Default Value, obviously, will be included the default value for the parameter. In the case of the capacitance C1, the value in Farads. There is an extra field, labeled as Description, which can be useful to include a short explanation regarding the nature of the parameter in the electric model. J. M. Campelo. Page 93

94 Each time the description of a parameter is over, to include it as part of the symbol properties, it is necessary to click on New. The final result for the TDK MLCC capacitor presented before, after editing the symbol and considering a nominal capacitance of 10 nf is the following: J. M. Campelo. Page 94

95 It is important to remark several things about the usage of Parameters: Those parameters defined inside a model can be used in equations to generate other parameters depending on them. In the example of the figure, K1, K2, K3, K4 and K5 are parameters used in an equation to calculate others parameters, RVAR1, RVAR2 and LVAR. Seems to be obvious, but If the name used for the parameter inside the design does not coincide with the one used defining the symbol, there will be an error. They must be the same. So, the final stage in the process is to include in the simulation of the amplifier the effect of the real component whose models can be found and introduced in QUCS Studio as it has been shown. For replacing the resistors VISHAY resistors will be the ones chosen. They can be easily purchased in the dedicated websites. J. M. Campelo. Page 95

96 The capacitors of 100 pf that work as DC Block, will be purchased from TDK. For the capacitor of the input matching network, AVX MLCC capacitors will be purchased, while the inductors, will be purchased from Taiyo Yuden,, which scattering parameters are available from. The inductor of 330 nh, acting as RF choke, one high frequency inductor from Coilcraft was selected. The following two figures show the schematic once the lumped components have been replaced by their spice models or scattering parameters file. J. M. Campelo. Page 96

97 Several components, mainly inductors, where replaced by scattering parameters files obtained from the vendor websites. Looking carefully to the schematic, they look like inductors. That is something that QUCS Studio allows to do and it is very useful to clarify what kind of components are being simulated. The way of doing it, is very simple, and the procedure is the following: Include the S parameter file container that is available in QUCS Studio the way that it was explained in this tutorial before, for the case of the transistor. J. M. Campelo. Page 97

98 Right button click on the mouse over the S parameters file device and the Edit Component Properties window will pop up. In the symbol property it is possible to choose the shape of the symbol that will be shown in the schematic. The effect of the replacement of the lumped components is not negligible at all. Even more when the theoretic values obtained cannot be found for the commercial components. This is one of the consideration that must be analyzed for designing RF circuits. Up to this frequency bandwidth, it is still possible to discuss about the use of components or microstrip structures. Higher frequencies are out of discussion. The use of discrete components of this size, 0603 is not possible because of the parasitic effects that appear. Smaller packages can be an option. Even more when the board space is a constraint of the design packages for capacitors and inductors are able to deal with higher frequencies but at expense of the power handling capability. In any case, microstrip structures are always a cheap and versatile option. J. M. Campelo. Page 98

99 The results obtained of the amplifier using the electrical models for the real components are shown in the next figures: J. M. Campelo. Page 99

100 J. M. Campelo. Page 100