FACULTY OF ENGINEERING

Transcription

1 FACUTY OF ENGINEEING AB HEET EMG4086 F TANITO CICUIT DEIGN TIMETE (01/013) F Amplifier Design *Note: On-the-spot evaluation may be carried out during or at the end of the experiment. tudents are advised to read through this lab sheet before doing experiment. Your performance, teamwork effort, and learning attitude will count towards the marks. F. Kung 1

2 Designing A Constant Power Gain Amplifier Introduction In this experiment you are going to design a simple single-stage bipolar junction transistor (BJT) amplifier with a power gain of +0dB into 50Ω load and operating at 600MHz. The design is carried out using the software Advance Design ystem by Agilent Technologies. Follow the procedures outlined below. Overview of Design Procedures A typical design flow for small signal amplifier is shown in Figure 1: Defining amplifier Characteristics DC biasing design -parameters measurement tability check equirement not met Power upply and d.c. biasing Plotting gain circles, mismatch circles and noise figure circles ource Network Amplifier oad Network Determine optimum source and load impedance Verify Gain, bandwidth, VW, noise figure etc of amplifier Figure 1 Amplifier block diagram and small-signal amplifier design cycle. We are going to design a small-signal amplifier with a specific gain at 600MHz, the other parameters such as input and output VW (voltage standing wave ratio) and noise END equirement met F. Kung

3 figure are not considered. implemented. Therefore only the steps underlined in Figure 1 are The Detailed Design Procedures tep 1 un AD software og into Windows workstation (username and password would be supplied to you). un Advance Design ystem software from the start menu as shown in Figure or from the icon on the desktop. or Figure unning AD. tep Create a new project From the main window of AD, create a new project named EMG4086 under the folder D:\AD\default\. Figure 3 Creating a new project EMG4086. F. Kung 3

4 A new chematic window will automatically appears once the project is properly created. Otherwise you can manually open a new chematic window by double clicking the Create New chematic button Figure 4 below. on the main window. The work area is shown in Component Palette election ist Component Palette Component history GND node Insert variable Wire Wire/node name imulate Tuning Data Display Component ibrary Work Area Figure 4 The schematic work area. tep 3 Drawing the basic circuit The first step is to choose a suitable transistor for the job. For this example we select the NPN wide-band transistor BF9A. This transistor comes in an OT-3 package and has a transition frequency f T of 5.0GHz. Both Infineon Technologies and NXP emiconductor (formerly Phillips emiconductors) manufacture this device. You can get a model of this transistor from the component library. Use the search function to look for bfr9a as illustrated in Figure 5A. There are many versions of the model, you should use the one with the description BF9A: OT3 Package.. This model simulates the transistor based on the laws of the device physic, taking into account the package parasitic capacitance and inductance. The other models are black box models based on -parameters measurement. These are only accurate for a certain d.c. bias condition. Datasheet for this transistor can also be obtained from the manufacturers websites. The actual transistor is shown in Figure 5B. F. Kung 4

5 Figure 5A Getting the transistor BF9A from the component library. C B E Figure 5B Top view of BF9A transistor from NXP emiconductor. Use the following component pallette to access the components button: umped Component Palette inductor, resistor and capacitor. ources -Time Domain Palette d.c. voltage source. imulation-dc DC simulation control. Construct the circuit as shown in Figure 6. This is a common-emitter configuration with F chokes b1 and b to isolate the d.c. biasing components from the transistor. F. Kung 5

6 V_DC C1 Vdc=5.0 V b1 =10.0 kohm c =330.0 nh = DC DC1 DC b1 =330.0 nh = b =330.0 nh = pb_phl_bf9a_ Q1 b =4.7 kohm e =100 Ohm C Ce C=470.0 pf Figure 6 The basic amplifier circuit for d.c. simulation. tep 4 Perform d.c. imulation to Ensure Transistor is Operating in Active egion un the d.c. simulation by clicking the simulation button on the chematic window. You can view the d.c. voltage and current on every nodes and wires on the circuit by activating the d.c. annotation command as shown in Figure 7 below. Go to the imulate menu and select annotate dc solution. The important voltages and current are shown in Table 1. Observe that BE junction of Q 1 is forward biased while BC junction or Q 1 is reversed biased, thus the transistor is operating in active region. The collector current I C and V CE affects the value of the small-signal -parameters to be obtained later. F. Kung 6

7 Figure 7 To display the d.c. solution results on the schematic window. V B V C V E I C 1.39V 5.0V 0.60V 5.9mA Table 1 The d.c. solution. tep 5 Modify the chematic -Parameter imulation After performing the d.c. simulation, modify the schematic of Figure 6 for -parameters simulation. Include the coupling capacitors C c1 and C c. Accessing the imulation- _Param component palette, insert the control and termination for - parameters simulation. et the parameters for simulation and termination as shown in Figure 8. Note the numbering of the termination, 1 for input port and for output port. We are going to run frequency sweep from 50MHz to 1.0GHz at a step of 1.0MHz. The software actually run a linear small-signal frequency domain simulation and calculates the -parameter using 1 a i = ( Vi + ZoIi ) Z b i 1 = Z b ij = a i j o o ( V Z I ) i o i F. Kung 7

8 where V i and I i are the voltage and current on the ith node. V_DC C1 Vdc=5.0 V C Cc1 Term C=470.0 pf Term1 Num=1 Z=50 Ohm b1 =10.0 kohm b1 =330.0 nh = b =330.0 nh = b =4.7 kohm c =330.0 nh = e =100 Ohm -PAAMETE _Param P1 tart=50.0 MHz top=1.0 GHz tep=1.0 MHz C Cc C=470.0 pf pb_phl_bf9a_ Q1 C Ce C=470.0 pf Term Term Num= Z=50 Ohm Figure 8 chematic for performing -parameter simulation. Before you run the simulation for Figure 8, save the schematic as bjt_amplifier.dsn as illustrated in Figure 9. Figure 9 aving the schematic or network (as it is known in AD). tep 6 Perform -Parameter imulation un the simulation of the schematic in Figure 8. A Data Display window will automatically pop up, if it does not you can manually call up a Data Display window using the button on the chematic window. You can now display the -Parameters 11,, 1 and 1 as a function of frequency as shown in Figure 10. F. Kung 8

9 elect 11 and click the Add button to include the trace in the plot. epeat for 1, and. Figure 10 electing a trace to be shown in a plot. The complete -parameters are shown in Figure 11 and Figure 1. ince the - parameters are complex quantities, 1 and 1 are shown as X-Y plot of the magnitude and phase versus frequency. 11 and are displayed in mith Chart format. Use the button to insert X-Y plot and the button to insert a mith Chart. Hint: By using a Marker, you can read the value from the graph. Double-clicking on each line allows you to change the property of the lines such as thickness and colour. F. Kung 9

10 mag((1,)) phase((1,)) freq, GHz freq, GHz 0 00 mag((,1)) phase((,1)) freq, GHz freq, GHz Figure 11 X-Y Plot of 1 and 1 versus frequency. (1,1) (,) Hint: You can check the values of individual points on the curves by using a marker. Go to the Marker command on the Data Display window s menu and select New. Then click your mouse pointer on the corresponding curve. Frequency 50MHz to 1.0GHz Figure 1 mith Chart display of 11 and versus frequency. F. Kung 10

11 tep 7 tability Check After obtaining the -parameters, we could check the stability of the amplifier circuit at various frequencies. This can be carried out by plotting the oulette stability factor (K) and D which are function of -parameters: 1 K = D = D When K > 1 and D < 1, the amplifier is unconditionally stable, otherwise it is conditionally stable or totally unstable. We can plot K and D by defining equations in the Data Display window. Insert an equation using the button. The definition for K and D are shown in Figure 13. These are then plotted as X-Y plot and is depicted in Figure 15. Note that AD also has built-in function to define the parameter K, which is the function stab_fact( ). Figure 13 Definition for oulette tability Factor K and D. To insert data from equation, use the button to insert an X-Y plot and select Equations from the Datasets and Equations drop-down menu. Make sure the dataset is bjt_amplifier, which is the name of the schematic. F. Kung 11

12 Figure 14 electing the equation data instead of simulation data to plot K and D Marker s textbox m1 freq=600.0mhz K=0.956 K m1 Marker D D K freq, GHz Figure 15 K and D versus frequency. F. Kung 1

13 Using a marker, it is seen from Figure 15 that K<1 and D <1 at f = 600MHz. Therefore the amplifier is conditionally stable. The means there are certain source and load impedance which might cause the amplifier to become unstable and oscillate. To determine the region of instability, we must plot the ource tability Circle and oad tability Circle in the next step. tep 7 Plotting tability Circles Before we proceed, save the schematic as a new file name bjt_amplifier_600mhz.dsn. The preceding simulation for bjt_amplifier.dsn runs the -Parameters simulation for a range of frequency. Now we would like to specifically concentrate on the frequency 600MHz, our frequency of interest. Hence the name bjt_amplifier_600mhz.dsn. Modify the -Parameter simulation control as shown in Figure 16 for single point simulation. -PAAMETE _Param P1 tart=600.0 MHz top=600 MHz tep=1.0 MHz Figure 16 ingle point simulation at 600MHz. imulate the new schematic and a new Data Display window will appear (or you can manually call up a new one). Now define two equations as in Figure 17. These equations uses built-in functions s_stab_circle( ) and l_stab_circle( ). These functions actually implement the stability circle equations for source reflection coefficient Γ s and load reflection coefficient Γ as follows: Γ Γ s * ( D ) * 11 D * ( D ) * D = = D 1 D Figure 17 Definition for source and load stability circles. The s_stab_circle(,51) function plots the ource tability Circle for Γ s using current -parameters value and forming the circle using 51 data points. imilarly for F. Kung 13

14 l_stab_circle(,51) plots the oad tability Circle for Γ using 51 data points. Use the table button 18. to display the values of 11 and and 600MHz as shown in Figure Figure and at 600MHz. The stability circles are plotted on the extended mith Chart in Figure 19. From Figure 17, 11 and are less than unity at 600MHz, hence the stable region is outside the circles from stability theory (see lecture notes). Thus if we were to design an amplifier, the source reflection coefficient and the load reflection coefficient as seen by the amplifier must reside in the stable region. The next step is to plot the locus of constant power gain, and to make sure that at least some part of the locus falls in the stable region. ource tability Circle oad tability Circle table source and load impedance region Magnitude = 1 Figure 19 The ource and oad tability Circles. The shaded region is the stable region for both source and load reflection coefficient. F. Kung 14

15 tep 8 Plotting the Constant Power Gain Circles and Finding the Optimum oad Impedance Using the Data Display window for bjt_amplifier_600mhz.dsn, we add the following definition for constant power gain circles depicted in Figure 0. Eqn Gain_10 = gp_circle(,10,51) Eqn Gain_15 = gp_circle(,15,51) Eqn Gain_0 = gp_circle(,0,51) Figure 0 Definition for constant power gain circles, for 10dB, 15dB and 0dB. Again this is a built-in function in AD, which plot all the Γ points on the mith Chart, which fulfills = 10log G. Here x is 10, 15 and 0. x 10 p G p 1 Γ 1 = 1 Γ 11 DΓ = Power Gain For instance, the definition gp_circle(,15,51) in Figure 19 means G p (Γ ) = 15dB circle using 51 data points and current -Parameters. The constant power gain circles are plotted together with the ource and oad tability Circles in Figure 1. ource stability circle oad stability circle 0dB tep 9 Time Domain imulation and Verfication Marker 15dB 10dB Magnitude = 1 Figure 1 Constant power gain circles. F. Kung 15

16 An important observation in Figure 1 is that as we increase the power gain of the amplifier, the required load reflection coefficient Γ will move towards the margin of stability. This is reasonable because as we increase the gain of an amplifier, the tendency to oscillate increases as any small amount of feedback will result in uncontrolled positive feedback and hence oscillation. The amount of feedback in the amplifier is given by the 1. ince we want an amplifier with +0dB gain at 600MHz, the load reflection coefficient must falls on the G p = 0dB circle. We choose the value marked by the marker in Figure 1. This value is the furthest away from the oad tability Circle; hence it will be less affected by changes in the stability circle due to parameters variation of the transistor. From the marker position, the value of optimum load is approximately (Z o is the impedance value of components TEM1 and TEM in the schematic): Z = Zo ( j.96) = j146.3 Zo = 50 At 600MHz, this load can be modeled by a 90.1Ohm resistor in series with 38.8nH inductor. If the actual load that is connected to the amplifier is not this network, we could employ an impedance transformation network to transform the actual load network to produce this equivalent value at 600MHz. Figure Equivalent load at 600MHz for amplifier. tep 9 Time Domain Verification Now we want to perform a time domain simulation to verify our circuit. ave the current schematic as bjt_amplifier_600mhz_td.dsn and modify the schematic to the one shown in Figure 3. You will need to change the component palette to ources-time Domain and imulation-transient to access the ine Voltage ource and the Transient imulation Control buttons. You will also need to name the input and output node as V in and V out as in Figure 3. Access the Name Wire/Node button on the chematic window. A dialog box as shown in Figure 3 will appear, type the name of the input node and click on the node to be named V in in the schematic. epeat the similar procedures for V out. F. Kung 16

17 Figure 3 Name the input node as V in and the output node as V out. TANIENT Input node Vin s Vtine =50 Ohm C Vdc=0 V Amplitude=0.1 V Freq=600 MHz Delay=0 nsec Damping=0 Phase=0 V_DC C1 Vdc=5.0 V C Cc1 C=470.0 pf b1 =10.0 kohm b1 =330.0 nh = b =330.0 nh = b =4.7 kohm c =330.0 nh = Tran Tran1 toptime=0.0 nsec MaxTimetep=1.0 nsec C Cc C=470.0 pf pb_phl_bf9a_ Q1 e =100 Ohm C Ce C=470.0 pf Vout Output node =38.8 nh = =90.1 Ohm Figure 4 The final schematic for time domain simulation. Finally run the simulation of the schematic in Figure 4. Plot the time domain waveform for V in and V out on a new Data Display window. The result is shown in Figure 5. F. Kung 17

18 V out Vout, mv Vin, mv V in time, nsec Figure 5 V out and V in as a function of time. The time average power dissipated at the load can be estimated by: P = 1 e * ( V I ) out out = 1 e V out V * out * Z = 1 V e out ( Z ) And the time average power input the amplifier can be estimated (we ignore the difference in phase between current and voltage) by: 1 Vin ( ) ( Vs Vin ) V I Ps = 1 in in * s F. Kung 18

19 From Figure 4, V out 0.78V and V in 0.033V. V s is the magnitude of the sinusoidal voltage source (0.1V) and s = 50, e(z ) = P W P s W Finally power gain is given by: G p = 10log 10 (P /P s ) = 10log 10 ( 15.7) = 1.84dB Which is quite near our frequency domain estimate using -Parameter simulation. The Experiment Based on the procedures presented above, design the schematic of a small-signal F amplifier for application at 800MHz, with minimum power gain of 1dB. Based your design on the NPN transistor BF9A, and a supply voltage of 5V. ab eport ubmit your lab report to the technician of Intel Microelectronic ab within 7 days from the date of experiment. You do not have to include the procedures. What is required is a paragraph on introduction stating the objective of the experiment, a few paragraphs on F amplifier design procedure, the schematics and the result from Data Display window, include a short discussion of the results and a paragraph on conclusion. All report must be handwritten, except for graphics, which can be saved, and printed out later (You can also draw the results if you prefer). Marking cheme Introduction to lab: 3 marks. esults (schematics, graphs and calculation): 5 marks. Discussion: marks. TOTA = 10 marks. eferences 1. D.M. Pozar, Microwave engineering, 3 rd edition, 005 John-Wiley & ons... udwig,. Bretchko, F circuit design, theory and applications, 000 Prentice- Hall International. F. Kung 19

20 Appendix I Data Display for bjt_amplifier.dsn mag((1,)) phase((1,)) freq, GHz freq, GHz 0 00 mag((,1)) phase((,1)) freq, GHz freq, GHz (,) (1,1) Eqn K=stab_fact() Eqn D = mag((1,1)*(,) - (1,)*(,1)) freq (50.00MHz to 1.000GHz) m1 freq=600.0mhz K= m D K freq, GHz F. Kung 0

21 Appendix II Data Display for bjt_amplifier_600mhz.dsn Eqn source_circle = s_stab_circle(,51) Eqn load_circle = l_stab_circle(,51) freq 600.0MHz (1,1) 0.63 / (,) / load_circle source_circle indep(source_circle) (0.000 to ) indep(load_circle) (0.000 to ) Eqn Gain_10 = gp_circle(,10,51) Eqn Gain_15 = gp_circle(,15,51) Eqn Gain_0 = gp_circle(,0,51) m1 source_circle load_circle Gain_0 Gain_15 Gain_10 m1 indep(m1)=8 Gain_0=0.755 / freq= mhz impedance = Z0 * ( j.579) indep(gain_10) (0.000 to ) indep(gain_15) (0.000 to ) indep(gain_0) (0.000 to ) indep(load_circle) (0.000 to ) indep(source_circle) (0.000 to ) F. Kung 1