RF circuits design Grzegorz Beziuk. RF Amplifier design. References

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1 RF circuits design Grzegorz Beziuk RF Amplifier design References [1] Tietze U., Schenk C., Electronic circuits : handbook for design and applications, Springer 008 [] Pozar D. M., Microwave engineering 3rd edition, 005, John Wiley and Sons, Inc. [3] Bowick C., RF circuit design, 1997, Newnes, Elsevier Science [4] Wadell B. C., Transmission line design handbook, 1991, Artech House, Inc. [5] Agilent Technology, A comparison of various bipolar transistor biasing circuits, Agilent Technology Application Note 193 [6] Avago Technologies, Microwave transistor bias consideration, Avago Technologies Application Note

2 Amplifier block diagram BIAS circuit Z G Input matching circuit RF transistor [S] Output matching circuit Z Amplifier parameters - Gain maximum or specified - Bandwidth wide bandwidth or single frequency - Noise Figure - Source impedance - oad Impedance - Output power for a power amplifier

3 - Gain maximum Transistor selection - Cut off frequency (f T ) - Noise characteristic - Maximum power for a power amplifier Datasheet and/or *.sp (measured for selected operating point) file delivered by transistor manufacturer Transistor selection - datasheet

4 Transistor selection - datasheet Transistor selection- datasheet

5 Transistor selection- datasheet Transistor selection datasheet/*.sp file Transistor S matrix can be taken from a datasheet or downloaded from transistor manufacturer website as a *sp file. The *.sp file can be created also with the transistor S parameters taken from datasheet.

6 ! Filename: BFR9AC.SP Version:.0! Philips part #: BFR9A Date: May 1990! Bias condition: Vce5V, Ic10mA! # MHz S MA R 50! Freq S11 S1 S1 S!GUM [db] ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! 5.0 Transistor selection *.spfile Ansoft Designer S s s 11 1 s s 1 re re( s ( s ) im( s ) + im( s 11 1 ) j ) j re( s re( s 1 ) + im( s ) + im( s 1 ) j ) j Transistor selection *.spfile

7 Transistor selection stability check Test for unconditional stability: 1 s11 s + K > 1 s1s1 s11 s s1 s1 < 1 (eq. 1 and eq. ) Transistor selection gain definitions Power Gain G P /P in the ratio of the power dissipated in the load Z to the power delivered to the amplifier input Available Power Gain G A P avn /P avs the ratio of the power available from the amplifier to the power available from the source. This assumes conjugate matching of both the source and the load. Depends on Z S and Z Transducer Power Gain G T P /P avs the ratio of the power delivered to the load to the power available from the source. Depends on Z S and Z

8 Transistor selection gain definitions Z G Input matching circuit G S RF transistor [S] G 0 Output matching circuit G Z ZS Z0 Γ S Γ in Γ out Γ Z (eq. 3) Γ (eq. 4) S Z0 Γ ZS + Z0 Z + Z0 unilateral case (s 1 0): G 0 s 1 1 Γ 1 Γ S (eq. 5) GS G (eq. 6) (eq. 7) 1 s11γ 1 s S Γ (eq. 8) G TU max GSG0G [ ] [ ] [ ] [ ] or GTU max db GS db + G0 db + G db (eq. 9) Transistor input and output reflection coefficients Z G Input matching circuit G S RF transistor [S] G 0 Output matching circuit G Z Z Γin Z in in Z + Z 0 0 s 11 s1s1γ + 1 s Γ Γ S Γ in Γ out Γ Γ out Z Z out out Z + Z s (eq. 10) (eq. 11) Remark: every reflection coefficient definition is related to Z 0. Thus, Z 0 ( usually 50 Ω) is treated as reference impedance. 0 0 s1s1γs + 1 s Γ 11 S

9 Maximum power transfer - impedance matching ( Pout ) ( R ) d max ( Pout ) 0 d I out Vg R + R P out U g out I out U out V R Vg R + R g ( R + R ) R g g d d ( P ) out ( R ) ( ) ( ) 3 d d Vg R + R g RV R + R ( Pout ) 0 R Rg ( R ) g g Maximum power transfer - conjugate matching idea X X g (for the specific frequency)

10 Transistor input and output conjugate matching Maximum power transfer from input to transistor and from transistor to output occur for: (eq.1) Γ * in Γ S and Γ * out Γ The input and output must be matched simultaneously: * ΓS s * Γ s 11 s1s + 1 s 1 Γ Γ s1s1γs + 1 s Γ 11 S (eq.13) Transistor input and output conjugate matching From the system of equations we obtain quadratic equation for Γ S (or Γ ): The solution is: (eq.14) (eq.15) B1 ± Γ S B ± Γ * * * ( s s ) Γ + ( s + s ) Γ + ( s s ) 0 11 S 11 1 S 11 1 C 1 1 B 4C B 4C C 11 B1 1+ s s 11 B 1+ s s C C * 1 s11 s * s s11 The signs in eq. 14 and 15 are opposite to signs of B 1 and B 1, respectively.

11 Transistor input and output conjugate matching Then, from (eq.3 and eq.4) we can calculate the impedances Z in and Z out that satisfy conjugate matching at transistor input and output: (eq.16) Z in Z * S Z 0 * Γ 1 S + 1 ΓS Z out Z * Z 0 * Γ Γ (eq.17) Now, we have to choice the matching circuit implementation (type): lumped elements, distributed elements, single or double stubs tuning technique, tappered line a. s. o.. Matching with shuntsingle stub technique Z g R g Z 0 d Z 0 Z 0 Y 0 1/Z 0 Y 0 Y 0 d Y open stub Z 0 l d Z R + jx Z g R g Z 0 Z 0 Z 0 open or shorted stub l shorted stub Z 0 l Z R + jx General circuit Matching circuit fabricated with microstrip technique

12 Matching with shuntsinglestub technique A distance from load to the stub: 1 arctg( t), for t 0 d π λ 1 ( π + arctg( t) ), for t < 0 π X ± R[ ( Z0 R ) + X ]/ Z R Z0 t X, for R Z0 Z0 0, for R Z 0 (eq.18) (eq.19) Matching with shuntsinglestub technique Stub length: l 1 open 0 Open: arctg( Z B) Shorted: λ l shorted λ π 1 1 arctg π Z0B (eq.0) (eq.1) Rt B Z 0 ( Z0 Xt)( X + Z0t) R + ( X + Zt) [ ] 0 The other microstrip matching circuit types are described in details in []. The references [1,3] describe the matching techniques, as well: [1] briefly, [3] for RF frequency region f <1 GHz (circuits with lumped elements).

13 RF Transistor Bias Circuits Transistor RF properties (S parameters vs. frequency) depends on its operating point. The operating point is set up by appropriate transistor bias circuit delivered I B, I C and U CE to RF transistor. For low and middle frequency region of RF frequency band (f > GHz) the biasing circuits usually are similar to bias circuits use at low frequencies (passive, resistive), described in details on Electronic Circuits course and in [5,6]. One difference is that the bias circuit is connected to the transistor terminals through RF chokes. For middle and high frequency band (f > 1GHz) active bias circuits (current sources or mirrors) are applied to improve a temperature stability of the transistor parameters. They were considered on Electronic Circuit course, as well. RF Transistor Bias Circuits The separation between DC bias amplifier circuit and RF amplifier part. BIAS CIRCUIT BYPEPASS CAPACITOR BYPEPASS CAPACITOR RF CHOKE RF CHOKE RF INPUT DC BOCK INPUT MATCHING CIRCUIT OUTPUT MATCHING CIRCUIT DC BOCK RF OUTPUT

14 RF Transistor Bias Circuits The separation between DC bias amplifier circuit and RF amplifier part in microstrip technique. BYPEPASS CAPACITOR RF CHOKE to bias circuit λ/4 RADIA STUB or to bias circuit λ/4 λ/4 Radial Stub dimentions can be calculated with [4] or using web calculator : php/stub/stub.php Uto transistor As narrow as possible (high Z) microstrip transmission lines to transistor Example of RF amplifier design Task: Design RF amplifier for maximum gain at 1.5 GHz using single, open stub, shunt matching section; Z g Z Z 0 50Ω. The amplifier will be fabricated on FR4 substrate:ε r 4.5, H 1.5mm, copper thickness 35 µm. Supply voltage U CC 9V. 1. Transistor selection (on the basis of datasheet) : BFR9A (β DC 90, G UM 14 db (1 GHz), f T 5GHz). With Ansoft Designer you can determine S parameters at 1.5GHz, for selected operating point.

15 Example of RF amplifier design a. Create schematic as below (use N-port element instead of transistor). b. Choose transistor operating point U CE 5V, I C 10 ma. Download to N- port element the BFR9AC.sp file (S parameters measured for selected operating point). c. Simulate circuit for a frequencies 0.1 3GHz, with step 0.01GHz. d. Read out magnitude and angle values of every s XX parameter at 1.5 GHz. Example of RF amplifier design Mag(S)

16 Example of RF amplifier design Angle(S) Example of RF amplifier design S matrix: s s S s s With eq. 1 and eq. calculate transistor stability factor 1 s11 s + K 1.0 s1s1 s11 s s1 s Because K>1 and <1 at f 1.5 GHz transistor is unconditional stable. 3a. Check transistor stability frequency range with Ansoft.

17 Example of RF amplifier design Example of RF amplifier design Transistor is stable for frequencies from 0.95 GHz to.48 GHz. Stability coefficient K at 1.5 GHz is equal to 1.01; the difference between calculated and simulated K values is caused by a precision of S matrix reading out from the s xx traces. 4. For maximum gain you should design matching sections for a conjugate match. Using eq. 14 and eq. 15 determine source and load reflection coefficients: B1 ± B1 4C1 ΓS C 1 B ± B 4C Γ C

18 Example of RF amplifier design 5. Maximum (unilateral) amplifier gain can be calculated with eq.: 5,6,7,8, and 9. 1 ΓS GS 1 s Γ G 0 s1 11 S G G TU max GSG0G [ db] G [ db] + G0[ db] + G [ db] 11.8[ db] TUma S Γ 1 Γ G 1 s Remember: G [ db] 10log( G) remark: The gain of amplifier will be less than calculated G TUmax because transistor is not unilateral (s 1 0). Example of RF amplifier design 6. Now you can calculate input and output transistor impedances (using eq. 16 and eq. 17): * ΓS + Zin ZS Z j 1 ΓS 1 * * Γ + Zout Z Z j 1 Γ 7. Next, calculate the parameters of the input and the output matching circuits using eq. 18, 19 and 0. 1 *

19 Example of RF amplifier design 7a. Input matching circuit calculation: Stub distance from the amplifier input: t X + R [( Z0 R ) + X ]/ Z in R Z0 d in 1 1 λ 94 λ π Stub length: B Rt ( π + arctg ( t )) ( Z0 Xt1 in )( X + Z0t1 in ) R + ( X + Zt ) 1 in Z0[ 0 1in ] lopen 1in 1 arctg( Z0B1 in ) λ λ π λ + 0.5λ t B l X + R [( Z0 R ) + X ]/ Z in R Z0 d in 1 λ ( t) arctg 39 λ π Rt ( Z0 Xtin )( X + Z0tin ) R + ( X + Zt ) in Z0[ 0 in ] openin λ arctg 0 in 3 π ( Z B ) λ 68. Example of RF amplifier design note1: if some od calculated dimension of d or l is negative just add to it 0.5λ. note: you got two solutions od the matching circuit dimensions, both of them are valid. 7b. Output matching circuit calculation: d1 out t 1 out λ λ B1 out l open 1out 0.08λ λ 0.08λ + 0.5λ dout t out λ λ out B out λ 73 λ et s choose the solutions: d in o, l openin 68.3 o, d out o, l openout 73 o. l open

20 Example of RF amplifier design Amplifier circuit without DC biasing circuit. The Transmission ines (T) impedance is equal to 50Ω. T width (.77 mm) was calculated with Ansoft T calculator. Example of RF amplifier design

21 Example of RF amplifier design Example of RF amplifier design

22 Example of RF amplifier design 8. Bias circuit. Example of RF amplifier design Bias circuit was calculated for: U CE 5V, I C 10mA, U CC 9V, U BE 0.65V, β DC 0.65V. RB3 1k was assumed. After the resistors calculations the circuit Pspice simulation was carried out. Pspice BFR9A model requires modification of BF parameter from 10 to 10 in order to simulate with betadc 90. Finally, U CE 4.95V and I C 10.1mA operating point was achieved.

23 Example of RF amplifier design 9. RF chokes. W 0.4mm RI 0.15mm P λ/49.mm A 90 o R 15.53mm Dimentions of Radial Stub, with assumption that RI 0.5W, were calculated with calculator on: ub/stub.php. The length of l\4 line was calculated with Ansoft T Calculator. The line width was assumed 0.4mm. U Example of RF amplifier design Final amplifier circuit

24 Example of RF amplifier design Example of RF amplifier design

25 Example of RF amplifier design Example of RF amplifier design

26 Example of RF amplifier design Example of RF amplifier design

27 Example of RF amplifier design Example of RF amplifier design

28 Example of RF amplifier design