RRAM based analog synapse device for neuromorphic system
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1 RRAM based analog synapse device for neuromorphic system Kibong Moon, Euijun Cha, and Hyunsang Hwang Pohang University of Science and Technology (POSTECH), Korea The 13 th Korea-U.S. Forum on Nanotechnology, Sep , Seoul, Korea
2 Outline Introduction and Motivation Mo/PCMO synapse device Pattern recalling system Summary
3 Introduction Neuron (~10 11 ) + Synapse (~10 15 ) + Learning Rule Low energy (~10fJ) synapse and neuron devices Source: HP
4 Introduction CEA-LETI, IEDM 2012 Stanford Univ., IEDM 2013 Panasonic, VLSI 2013 Univ. of Nat. Chiao Tung, IEDM 2014 Various new synapse devices were proposed (CBRAM, PCM, 3T- FeMEM, and RRAM)
5 Introduction IBM, TED 2013 CEA-LETI, NEWCAS 2011 Problems : Large device area, power consumption, circuit complexity etc..
6 Introduction Pennsylvania Univ., IEDM 2014 Carnegie Mellon Univ., VLSI 2015 VO 2 Insulator-Metal-Transition temperature ~ 67 C : Not practical for device application
7 Current [A] Current [A] Mo/PCMO synapse device 10-5 Mo/PCMO 10-3 V ReRAM > 0V V ReRAM < 0V Mo MoO x Mo MoO x Cycles 1st 100th I -0.5V 10-7 O 2- PCMO O 2- B. E. O 2- PCMO O 2- B. E Voltage [V] Active area [ μm 2 ] <RESET> <SET> Current level Active area Field-induce oxygen migration & redox reaction at the interface : Control thickness of interface oxide and device resistivity
8 Mo/PCMO synapse device Mo MoO x PCMO LRS ~2.3nm 4nm Mo MoO x PCMO HRS ~4.2nm 4nm 11k-bit array Well fabricated without mixing (Mo/PCMO) Direct evidence of redox reaction at the interface
![Current [A] Current [A] Current [A] Current [A] Mo/PCMO synapse device DC property AC property 1.2μ 0.9μ 0.6μ 0.3μ 0.0μ 0 1 2 3 Set Voltage [V] 1st 2nd 3rd 4th 5th -3-2 -1 0 Voltage [V] Reset 0.0μ 0.1μ 0.](/docs-images/72/66788758/images/9-3.jpg "2μ 0.3μ 0.4μ 0.5μ 10n 8n 6n 4n 2n 0 Potentiation V bias (1ms) = -2.5V -3V -3.5V -4V V read = -0.5V 0 200 400 600 800 1000 # of pulses Depression V bias (1ms) = 1V 1.5V 2V 2.")
9 Current [A] Current [A] Current [A] Current [A] Mo/PCMO synapse device DC property AC property 1.2μ 0.9μ 0.6μ 0.3μ 0.0μ Set Voltage [V] 1st 2nd 3rd 4th 5th Voltage [V] Reset 0.0μ 0.1μ 0.2μ 0.3μ 0.4μ 0.5μ 10n 8n 6n 4n 2n 0 Potentiation V bias (1ms) = -2.5V -3V -3.5V -4V V read = -0.5V # of pulses Depression V bias (1ms) = 1V 1.5V 2V 2.5V n 20n 15n 10n 5n Potentiation (-V) : Increase conductance : Strengthen synaptic weight Depression (+V) : Decrease conductance : Weaken synaptic weight
10 I out [ua] Current [A] I out [ma] NbO 2 neuron device 6m 4m Voltage 800us 1.5V NbO 2 AC I-V 2m Time R on R off (~1.9kΩ) (~15kΩ) Voltage [V] V in V in Input Output Synapse Neuron Super-threshold input V=1.6V Sub-threshold input V=0.9V Time [us] NbO 2 based oscillation characteristics with synapse device Above critical threshold voltage Oscillation behavior
11 Pattern recalling system Packaging Noisy input V 1 V 42 Standard Pattern ~ ~ ~ ~ I 1 Upper threshold I 42 Lower threshold Output SEM image Operation of Hopfield network on 11k-bit array Neuromorphic application using 11k-bit array Mo/PCMO synapse device and NbO 2 IMT oscillator neuron devices
12 Pattern recalling system Synapse weight mapping : Binary and Analog synapse based Hopfield neural network Analog synapse shows much better pattern recognition accuracy
13 Summary Mo/PCMO analog synapse device - Field-induced oxygen migration for switching of Mo/PCMO device - Fabrication of large scale synapse array device on 8-inch wafer - Evaluating synapse characteristics for an artificial synapse Hardware implmenetation of neuromorphic application - NbO 2 oscillator as an artificial neuron - Integrating Mo/PCMO synapse array and NbO 2 neuron - Improved pattern recalling accuracy using analog synapse
14 Thank you for your attention! This research was supported by the Pioneer Research Center Program through the National Research Foundation of Korea funded by the Ministry of Science, ICT & Future Planning ( )
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