P2010A. PIN CONFIGURATION

Transcription

1 Low Frquny MI Rdution IC sription Th is a sltal sprad sptrum frquny modulator dsignd spifially for PC priphral and mddd ontrollr markts. Th rdus ltromagnti intrfrn (MI) at th lok sour whih provids systm wid rdution of MI of all lok dpndnt signals. Th allows signifiant systm ost savings y rduing th numr of iruit oard layrs and shilding that ar traditionally rquird to pass MI rgulations. Th uss th most ffiint and optimizd modulation profil approvd y th FCC and is implmntd in a propritary all digital mthod. Th modulats th output of a singl PLL in ordr to sprad th andwidth of a synthsizd lok and, mor importantly, drass th pak amplituds of its harmonis. This rsults in signifiantly lowr systm MI ompard to th typial narrow and signal produd y osillators and most frquny gnrators. Lowring MI y inrasing a signal s andwidth is alld sprad sptrum lok gnration. ppliations Th is targtd towards th mddd ontrollr markt and PC priphral markts inluding sannrs, fasimil, MFP s, printrs, P, I, and GPS dvis. Faturs FCC pprovd Mthod of MI ttnuation Provids up to 20 db of MI Supprssion Gnrats a Low MI Sprad Sptrum Clok of th Input Frquny Optimizd for 10 MHz to 35 MHz Input Frquny Rang Intrnal Loop Filtr Minimizs xtrnal Componnts and Board Spa 4 Sltal Sprad Rangs SSON Control Pin for Sprad Sptrum nal and isal Options Low Cyl to Cyl Jittr Wid Oprating Rang (3 V to 5 V) 16 m Output rivs TTL or CMOS Compatil Outputs Low Powr CMOS sign vailal in 8 pin SOIC and TSSOP Pakags Ths ar P Fr vis SOIC 8 S SUFFIX CS 751B XIN / CLK XOUT FS0 VSS PIN CONFIGURTION 1 (Top Viw) TSSOP 8 T SUFFIX CS 948L SR0 ModOUT SSON ORRING INFORMTION S dtaild ordring and shipping information in th pakag dimnsions stion on pag 7 of this data sht. Smiondutor Componnts Industris, LLC, 2011 ugust, 2011 Rv. 2 1 Puliation Ordr Numr: /

2 FS0 SR1 SSON Modulation PLL XIN XOUT Crystal Osillator Frquny ividr Fdak ividr Phas ttor Loop Filtr VCO Output ividr ModOUT Tal 1. BSOLUT MXIMUM RTINGS VSS Figur 1. Blok iagram Symol Paramtr Rating Unit V, V IN Voltag on any pin with rspt to Ground 0.5 to +7 V T STG Storag tmpratur 65 to +125 C T Oprating tmpratur 40 to +85 C T s Max. Soldring Tmpratur (10 s) 260 C T J Juntion Tmpratur 150 C T V Stati isharg Voltag (s pr JC ST B) 2 KV Strsss xding Maximum Ratings may damag th dvi. Maximum Ratings ar strss ratings only. Funtional opration aov th Rommndd Oprating Conditions is not implid. xtndd xposur to strsss aov th Rommndd Oprating Conditions may afft dvi rliaility. Tal 2. C LCTRICL CHRCTRISTICS Symol Paramtr Min Typ Max Unit V IL Input Low Voltag GN 0.8 V V IH Input High Voltag V I IL Input Low Currnt (pull up rsistor on inputs SR0, FS0) 35 I IH Input High Currnt (pull down rsistor on input SSON) 35 I XOL XOUT Output Low Currnt (@ 0.4 V, = 3.3 V) 3 m I XOH XOUT Output High Currnt (@ 2.5 V, = 3.3 V) 3 m V OL Output Low Voltag ( = 3.3 V, I OL = 20 m) 0.4 V V OH Output High Voltag ( = 3.3 V, I OH = 20 m) 2.5 V I Stati Supply Currnt 0.6 m I CC ynami Supply Currnt (3.3 V and 15 pf loading) m Oprating Voltag V t ON Powr Up Tim (First lokd lok yl aftr powr up) 0.18 ms Z OUT Clok Output Impdan 50 2

3 Tal 3. C LCTRICL CHRCTRISTICS Symol Paramtr Min Typ Max Unit f IN Input Frquny MHz t LH (Not 1) Output ris tim (masurd at 0.8 V to 2.0 V) ns t HL (Not 1) Output fall tim (masurd at 2.0 V to 0.8 V) ns t JC Jittr (Cyl to yl) 360 ps t Output duty yl % 1. t LH and t HL ar masurd into a apaitiv load of 15 pf. Tal 4. PIN SCRIPTION Pin# Pin Nam Typ sription 1 XIN / CLK I Connt to rystal or xtrnally gnratd lok signal. 2 XOUT I Connt to rystal. No onnt if xtrnally gnratd lok signal is usd. 3 FS0 I igital logi input usd to slt Input Frquny Rang (s Tal 5). This pin has an intrnal pull up rsistor. 4 VSS P Ground Conntion. Connt to systm ground. 5 SSON I igital logi input usd to nal Sprad Sptrum funtion (tiv Low). Sprad Sptrum funtion nal whn low. This pin has an intrnal pull low rsistor. 6 ModOUT O Sprad Sptrum Clok Output. 7 SR0 I igital logi input usd to slt Sprading Rang (s Tal 5). This pin has an intrnal pull up rsistor. 8 P Connt to +3.3 V or +5.0 V. Tal 5. SPR RNG SLCTION FS0 SR0 Sprading Rang Input Frquny Modulation Rat 1 0 ±1.50% 10 MHz to 20 MHz (Fin/10)*20.83 KHz 1 1 ±2.50% 10 MHz to 20 MHz (Fin/10)*20.83 KHz 0 0 ±1.25% 20 MHz to 35 MHz (Fin/10)*20.83 KHz 0 1 ±2.00% 20 MHz to 35 MHz (Fin/10)*20.83 KHz 3

4 Sprad Sptrum Sltion Tal 5 illustrats th possil sprad sptrum options. Th optimal stting should minimiz systm MI to th fullst without affting systm prforman. Th sprading is dsrid as a prntag dviation of th ntr frquny. (Not: Th ntr frquny is th frquny of th xtrnal rfrn input on XIN / CLK, Pin 1). xampl of a Typial Printr or Sannr ppliation that Oprats on a Clok Frquny of 16 MHz: sprading sltion of FS0=1 and SR0=1 provids a prntag dviation of ±2.50%* (s Tal 5) of Cntr Frquny. This rsults in th frquny on ModOUT ing swpt from MHz to MHz at a modulation rat of KHz (s Tal 5). This partiular xampl (s Figur 2 low) givn hr is a ommon MI rdution mthod for sannr, printr or mddd appliations and has alrady n adoptd y most of th lading manufaturrs. NOT: Sprading rang sltion varis from diffrnt systm manufaturrs and thir dsigns. 16 MHz Crystal Input 1 XIN / CLK 8 2 XOUT SR F 3 FS0 ModOUT 6 4 VSS SSON 5 Conntd to CLK input pin of th systm. Figur 2. ppliation Shmati for Flat Bd Sannr 4

5 PCKG IMNSIONS TSSOP8, 4.4x3 CS 948L 01 ISSU O SYMBOL MIN NOM MX BSC L 1.00 RF L1 θ º 8º TOP VIW 2 1 SI VIW 1 L1 N VIW L Nots: (1) ll dimnsions ar in millimtrs. ngls in dgrs. (2) Complis with JC MO

6 PCKG IMNSIONS SOIC 8, 150 mils CS 751B 01 ISSU O SYMBOL MIN NOM MX BSC h PIN # 1 INTIFICTION L θ 0º 8º TOP VIW h 1 θ L SI VIW N VIW Nots: (1) ll dimnsions ar in millimtrs. ngls in dgrs. (2) Complis with JC MS

7 Tal 6. ORRING INFORMTION Part Numr Marking Pakag Typ Tmpratur F 08ST F 8 Pin SOIC, Tu, P Fr Commrial F 08SR F 8 Pin SOIC, Tap and Rl, P Fr Commrial G 08ST G 8 Pin SOIC, Tu, Grn Commrial G 08SR G 8 Pin SOIC, Tap and Rl, Grn Commrial I2010F 08ST I2010F 8 Pin SOIC, Tu, P Fr Industrial I2010F 08SR I2010F 8 Pin SOIC, Tap and Rl, P Fr Industrial I2010G 08ST I2010G 8 Pin SOIC, Tu, Grn Industrial I2010G 08SR I2010G 8 Pin SOIC, Tap and Rl, Grn Industrial F 08TT F 8 Pin TSSOP, Tu, P Fr Commrial F 08TR F 8 Pin TSSOP, Tap and Rl, P Fr Commrial G 08TT G 8 Pin TSSOP, Tu, Grn Commrial G 08TR G 8 Pin TSSOP, Tap and Rl, Grn Commrial I2010F 08TT I2010F 8 Pin TSSOP, Tu, P Fr Industrial I2010F 08TR I2010F 8 Pin TSSOP, Tap and Rl, P Fr Industrial I2010G 08TT I2010G 8 Pin TSSOP, Tu, Grn Industrial I2010G 08TR I2010G 8 Pin TSSOP, Tap and Rl, Grn Industrial ON Smiondutor and ar rgistrd tradmarks of Smiondutor Componnts Industris, LLC (SCILLC). SCILLC rsrvs th right to mak hangs without furthr noti to any produts hrin. SCILLC maks no warranty, rprsntation or guarant rgarding th suitaility of its produts for any partiular purpos, nor dos SCILLC assum any liaility arising out of th appliation or us of any produt or iruit, and spifially dislaims any and all liaility, inluding without limitation spial, onsquntial or inidntal damags. Typial paramtrs whih may providd in SCILLC data shts and/or spifiations an and do vary in diffrnt appliations and atual prforman may vary ovr tim. ll oprating paramtrs, inluding Typials must validatd for ah ustomr appliation y ustomr s thnial xprts. SCILLC dos not onvy any lins undr its patnt rights nor th rights of othrs. SCILLC produts ar not dsignd, intndd, or authorizd for us as omponnts in systms intndd for surgial implant into th ody, or othr appliations intndd to support or sustain lif, or for any othr appliation in whih th failur of th SCILLC produt ould rat a situation whr prsonal injury or dath may our. Should Buyr purhas or us SCILLC produts for any suh unintndd or unauthorizd appliation, Buyr shall indmnify and hold SCILLC and its offirs, mploys, susidiaris, affiliats, and distriutors harmlss against all laims, osts, damags, and xpnss, and rasonal attorny fs arising out of, dirtly or indirtly, any laim of prsonal injury or dath assoiatd with suh unintndd or unauthorizd us, vn if suh laim allgs that SCILLC was nglignt rgarding th dsign or manufatur of th part. SCILLC is an qual Opportunity/ffirmativ tion mployr. This litratur is sujt to all applial opyright laws and is not for rsal in any mannr. PUBLICTION ORRING INFORMTION LITRTUR FULFILLMNT: Litratur istriution Cntr for ON Smiondutor P.O. Box 5163, nvr, Colorado US Phon: or Toll Fr US/Canada Fax: or Toll Fr US/Canada mail: ordrlit@onsmi.om N. mrian Thnial Support: Toll Fr US/Canada urop, Middl ast and fria Thnial Support: Phon: Japan Customr Fous Cntr Phon: ON Smiondutor Wsit: Ordr Litratur: For additional information, plas ontat your loal Sals Rprsntativ /