PINNING - SOT82 PIN CONFIGURATION SYMBOL
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1 GENERAL DESCRIPTION QUICK REFERENCE DATA Glass passivated, sensitive gate SYMBOL PARAMETER MAX. MAX. MAX. UNIT thyristors in a plastic envelope, intended for use in general purpose BT8- R 5R 6R switching and phase control V DRM, Repetitive peak off-state 5 6 V applications. These devices are V RRM voltages intended to be interfaced directly to I T(AV) Average on-state current A microcontrollers, logic integrated I T(RMS) RMS on-state current A circuits and other low power gate I TSM Non-repetitive peak on-state A trigger circuits. current PINNING - SOT8 PIN CONFIGURATION SYMBOL PIN DESCRIPTION cathode anode a k gate tab anode g LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC ). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT -R -5R -6R V DRM, V RRM Repetitive peak off-state voltages V I T(AV) Average on-state current half sine wave; T mb C -.5 A I T(RMS) RMS on-state current all conduction angles - A I TSM Non-repetitive peak half sine wave; T j = 5 C prior on-state current to surge; with reapplied V DRM() t = ms - 5 A I t I t for fusing t = 8. ms t = ms A A s di T /dt Repetitive rate of rise of I TM = A; I G = 5 ma; - 5 A/µs on-state current after triggering di G /dt = 5 ma/µs I GM Peak gate current - A V GM Peak gate voltage - 5 V V RGM Peak reverse gate voltage - 5 V P GM Peak gate power - 5 W P G(AV) Average gate power over any ms period -.5 W T stg Storage temperature - 5 C T j Operating junction - 5 C temperature Although not recommended, off-state voltages up to 8V may be applied without damage, but the thyristor may switch to the on-state. The rate of rise of current should not exceed 5 A/µs. February 996 Rev.
2 THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT R th j-mb Thermal resistance K/W junction to mounting base R th j-a Thermal resistance in free air K/W junction to ambient STATIC CHARACTERISTICS T j = 5 C unless otherwise stated SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT I GT Gate trigger current V D = V; I T =. A - 5 µa I L Latching current V D = V; I GT =. A -.7 ma I H Holding current V D = V; I GT =. A -. 6 ma V T On-state voltage I T = 5 A -..8 V V GT Gate trigger voltage V D = V; I T =. A -..5 V V D = V DRM() ; I T =. A; T j = 5 C.5. - V I D, I R Off-state leakage current V D = V DRM() ; V R = V RRM() ; T j = 5 C -..5 ma DYNAMIC CHARACTERISTICS T j = 5 C unless otherwise stated SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT dv D /dt Critical rate of rise of V DM = 67% V DRM() ; T j = 5 C; V/µs off-state voltage exponential waveform; R GK = Ω t gt Gate controlled turn-on I TM = A; V D = V DRM() ; I G = 5 ma; - - µs time di G /dt =. A/µs t q Circuit commutated V D = 67% V DRM() ; T j = 5 C; I TM = 8 A; - - µs turn-off time V R = V; di TM /dt = A/µs; dv D /dt = V/µs; R GK = kω February 996 Rev.
3 Ptot / W 6 5 conduction angle degrees form factor a BT Tmb() / C.5 a =.57 5 ITSM / A 5 BT8 I I TSM T T time Tj initial = 5 C IF(AV) / A Fig.. Maximum on-state dissipation, P tot, versus average on-state current, I T(AV), where a = form factor = I T(RMS) / I T(AV). Number of half cycles at 5Hz Fig.. Maximum permissible non-repetitive peak on-state current I TSM, versus number of cycles, for sinusoidal currents, f = 5 Hz. ITSM / A BT8 IT(RMS) / A BT5 di /dt limit T 8 6 IT ITSM T time Tj initial = 5 C us us ms ms T / s Fig.. Maximum permissible non-repetitive peak on-state current I TSM, versus pulse width t p, for sinusoidal currents, t p ms... surge duration / s Fig.5. Maximum permissible repetitive rms on-state current I T(RMS), versus surge duration, for sinusoidal currents, f = 5 Hz; T mb C. IT(RMS) / A 5 BT8.6 VGT(Tj) VGT(5 C) BT5 C Tmb / C Fig.. Maximum permissible rms current I T(RMS), versus mounting base temperature T mb Fig.6. Normalised gate trigger voltage V GT (T j )/ V GT (5 C), versus junction temperature T j. February 996 Rev.
4 .5 IGT(Tj) IGT(5 C) BT8 IT / A Tj = 5 C Tj = 5 C Vo =.6 V Rs =.99 ohms 8 BT8 typ Fig.7. Normalised gate trigger current I GT (T j )/ I GT (5 C), versus junction temperature T j VT / V Fig.. Typical and imum on-state characteristic. IL(Tj) IL(5 C) BT5 Zth j-mb (K/W) BT P D t p Fig.8. Normalised latching current I L (T j )/ I L (5 C), versus junction temperature T j.. us.ms ms ms.s s s tp / s Fig.. Transient thermal impedance Z th j-mb, versus pulse width t p. t IH(Tj) IH(5 C) BT5 dvd/dt (V/us).5 RGK = ohms Fig.9. Normalised holding current I H (T j )/ I H (5 C), versus junction temperature T j. 5 5 Fig.. Typical, critical rate of rise of off-state voltage, dv D /dt versus junction temperature T j. February 996 Rev.
5 MECHANICAL DATA Dimensions in mm Net Mass:.8 g mounting base ) min.58 ) Lead dimensions within this zone uncontrolled Notes. Refer to mounting instructions for SOT8 envelopes.. Epoxy meets UL9 V at /8". Fig.. SOT8; pin connected to mounting base. February Rev.
6 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC ). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 996 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. February Rev.
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