2N Product profile. 2. Pinning information. N-channel TrenchMOS FET. 1.1 General description. 1.2 Features. 1.
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1 Rev April 25 Product data sheet 1. Product profile 1.1 General description N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. 1.2 Features Logic level threshold compatible Surface-mounted package Very fast switching TrenchMOS technology 1.3 Applications Logic level translator High speed line driver 1.4 Quick reference data V DS 6 V R DSon 5 Ω I D 3 ma P tot =.83 W 2. Pinning information Table 1: Pinning Pin Description Simplified outline Symbol 1 gate (G) 2 source (S) 3 3 drain (D) 1 2 SOT23 D G mbb76 S
2 3. Ordering information Table 2: Ordering information Type number Package Name Description Version TO-236AB plastic surface mounted package; 3 leads SOT23 4. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 6134). Symbol Parameter Conditions Min Max Unit V DS drain-source voltage (DC) 25 C T j 15 C - 6 V V DGR drain-gate voltage (DC) 25 C T j 15 C; R GS =2kΩ - 6 V V GS gate-source voltage (DC) - ±3 V V GSM peak gate-source voltage t p 5 µs; pulsed; duty cycle = 25 % - ±4 V I D drain current (DC) T sp =25 C; V GS =1V;Figure 2 and 3-3 ma T sp = 1 C; V GS =1V;Figure 2-19 ma I DM peak drain current T sp =25 C; pulsed; t p 1 µs; Figure A P tot total power dissipation T sp =25 C; Figure W T stg storage temperature C T j junction temperature C Source-drain diode I S source (diode forward) current (DC) T sp =25 C - 3 ma I SM peak source (diode forward) current T sp =25 C; pulsed; t p 1 µs A Product data sheet Rev April 25 2 of 12
3 12 3aa aa25 P der (%) I der (%) T sp ( C) T sp ( C) P der P tot I D = % I P der = % I tot ( 25 C ) D25 ( C ) Fig 1. Normalized total power dissipation as a function of solder point temperature Fig 2. Normalized continuous drain current as a function of solder point temperature 1 I D (A) T sp = 25 C 3aa3 1 Limit R DSon = V DS / I D t p = 1 µs 1 µs 1-1 DC 1 ms 1 ms 1 ms V DS (V) Fig 3. T sp =25 C; I DM is single pulse Safe operating area; continuous and peak drain currents as a function of drain-source voltage Product data sheet Rev April 25 3 of 12
4 5. Thermal characteristics Table 4: Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit R th(j-sp) thermal resistance from junction to solder point Figure K/W R th(j-a) thermal resistance from junction to ambient mounted on a printed-circuit board; minimum footprint; vertical in still air K/W 1 3 3aa1 Z th(j-sp) K/W 1 2 δ = single pulse P t p δ = T t p (s) t p T t Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration Product data sheet Rev April 25 4 of 12
5 6. Characteristics Table 5: Characteristics T j =25 C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Static characteristics V (BR)DSS drain-source breakdown voltage I D =1µA; V GS =V T j =25 C V T j = 55 C V V GS(th) gate-source threshold voltage I D = 1 ma; V DS =V GS ; Figure 9 and 1 T j =25 C V T j = 15 C V T j = 55 C V I DSS drain-source leakage current V DS =48V; V GS =V T j =25 C µa T j = 15 C µa I GSS gate-source leakage current V GS = ±15 V; V DS = V na R DSon drain-source on-state resistance V GS =1V; I D = 5 ma; Figure 6 and 8 T j =25 C Ω T j = 15 C Ω V GS = 4.5 V; I D = 75 ma; Figure 6 and Ω Dynamic characteristics g fs forward transconductance V DS =1V; I D = 2 ma; Figure ms C iss input capacitance V GS =V; V DS = 1 V; f = 1 MHz; pf C oss output capacitance Figure pf C rss reverse transfer capacitance pf t on turn-on delay time V DD =5V; R L = 25 Ω; V GS =1V; ns t off turn-off delay time R G =5Ω; R GS =5Ω ns Source-drain diode V SD source-drain (diode forward) voltage I S = 3 ma; V GS =V;Figure V t rr reverse recovery time I S = 3 ma; di S /dt = 1 A/µs; ns Q r recovered charge V GS =V nc Product data sheet Rev April 25 5 of 12
6 .8 I D (A).6 T j = 25 C V GS (V) = 3aa4 1 1 R DSon (Ω) aa5 T j = 25 C V GS (V) = V DS (V) I D (A) T j =25 C T j =25 C Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values Fig 6. Drain-source on-state resistance as a function of drain current; typical values.8 3aa aa28 I D (A) a C T j = 25 C V GS (V) T j ( C) T j =25 C and 15 C; V DS >I D R DSon R a = DSon R DSon ( 25 C ) Fig 7. Transfer characteristics: drain current as a function of gate-source voltage; typical values Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature Product data sheet Rev April 25 6 of 12
7 2.4 3aa aa37 V GS(th) (V) 1.8 typ I D (A) min typ min T j ( C) V GS (V) Fig 9. I D = 1 ma; V DS =V GS T j =25 C; V DS =5V Gate-source threshold voltage as a function of junction temperature Fig 1. Sub-threshold drain current as a function of gate-source voltage.4 3aa aa9 g fs (S).3 T j = 25 C 15 C C (pf) C iss.2 1 C oss.1 C rss I D (A) V DS (V) 1 2 T j =25 C and 15 C; V DS >I D R DSon Fig 11. Forward transconductance as a function of drain current; typical values V GS = V; f = 1 MHz Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values Product data sheet Rev April 25 7 of 12
8 1 I S (A).8 V GS = V 3aa C T j = 25 C V SD (V) T j =25 C and 15 C; V GS =V Fig 13. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values Product data sheet Rev April 25 8 of 12
9 7. Package outline Plastic surface mounted package; 3 leads SOT23 D B E A X H E v M A 3 Q A A1 1 2 c e1 bp w M B Lp e detail X 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A 1 max. 1.1 mm.1.9 b p c D E e e 1 H E L p Q v w OUTLINE VERSION SOT23 REFERENCES IEC JEDEC JEITA TO-236AB EUROPEAN PROJECTION ISSUE DATE Fig 14. Package outline SOT23 Product data sheet Rev April 25 9 of 12
10 8. Revision history Table 6: Revision history Document ID Release date Data sheet status Change notice Doc. number Supersedes _ Product data sheet Modifications: The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. Table 5 Characteristics Addition of upper limit for V GS(th) Product specification HZG _2 Modifications: Converted from VDMOS to TrenchMOS technology. _ Product - - _1 specification _ Product specification Product data sheet Rev April 25 1 of 12
11 9. Data sheet status Level Data sheet status [1] Product status [2] [3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 1. Definitions Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 6134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 11. Disclaimers customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status Production ), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 12. Trademarks TrenchMOS is a trademark of Koninklijke Philips Electronics N.V. Life support These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors 13. Contact information For additional information, please visit: For sales office addresses, send an to: sales.addresses@ Product data sheet Rev April of 12
12 14. Contents 1 Product profile General description Features Applications Quick reference data Pinning information Ordering information Limiting values Thermal characteristics Characteristics Package outline Revision history Data sheet status Definitions Disclaimers Trademarks Contact information Koninklijke Philips Electronics N.V. 25 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 26 April 25 Document number: Published in The Netherlands
2N Product profile. 2. Pinning information. N-channel TrenchMOS FET. 1.1 General description. 1.2 Features. 1.
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