EE240B Discussion 9. Eric Chang. Berkeley Wireless Research Center UC Berkeley
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1 EE240B Discussion 9 Eric Chang Berkeley Wireless Research Center UC Berkeley
2 Announcement Project phase 1 due tomorrow Note: for inverter-based TIA, do not neglect Cgd Miller effect effectively adds it to the input capacitance The feedthrough zero can be safely ignored since it s at very high frequency (~gm/cgd)
3 Comparator Choice CML Latch + High speed; generally faster than StrongArm type comparators + Design equations well understood and generally more accurate - Power intensive - analog output - Large hysteresis StrongArm-Type Latch + Digital output + ~Zero hysteresis when properly designed + More power efficient - Slower than CML - Only general sizing guidelines
4 How to design comparator? Comparator use positive feedback to amplify small input signals This means it is not LTI, and small signal model eventually breaks i.e. nothing you learn in this class applies exactly So what should we do? Use small signal regime to guide sizing/bias decisions But ultimately validate circuit through simulations
5 Common Comparator Issues Hysteresis Input-referred noise Offset Kickback often just impact the previous block, not the comparator itself
6 Hysteresis StrongArm latch waveforms Input needs to be large enough to flip previous bit Delay dependent on Vin Acceptable delay depends on the following digital flip-flop
7 Overdrive Recovery Test Used to measure hysteresis Quantifies hysteresis with minimum input amplitude Also get intrinsic offset (usually indicates layout quality). 1. Apply large negative input (~! "" /$) for ~4 cycles Cleans up initial conditions 2. Transition to a small positive input % &'. Sweep % &' until output flips Can use combination of sweep + binary search 3. Repeat this procedure for high-to-low transition to find % &( 4. intrinsic offset = (% &' + % &( )/$, Minimum input amplitude = (% &' % &( )/$
8 Comparator Noise? As with all circuits, comparator also has noise CML noise analysis quite straight-forward StrongArm on the other hand transient noise comes to the rescue Magically injects noise during transient run Specify randomization seed to make simulation repeatable But how to calculate inputreferred noise?
9 Noise (Standard Approach) 1. Set input to constant value! ". 2. Run long transient with ~1000 cycles. 3. Find percentage of 1 s in output. 4. Sweep! ", plot percentages, then fit CDF curve to get #(! % ) Assumes outputs of each cycle are independent (but is it?)
10 Noise (My Approach) Instead of DC input, alternate input between! "#$%& and! '&(' for even/odd cycles Only counts statistics on odd cycle outputs Basically, use! "#$%& to initialize the comparator To save time, use only a few data points (2-3) to fit the CDF Other noise sources usually dominates anyways
11 Comparator Offset (Standard) Industry generally run Monte Carlo simulation Randomly vary each transistor Run transient simulation with slow input ramp Also slower clock to reduce hysteresis Find input value at the output transition point SLOOOOOOW.. Offset only matters when you want reliable circuit reliable circuit = more sigmas = more Monte Carlo runs
12 Comparator Offset (Elad) Manually compute n-sigma offsets of each transistors Insert offset voltage sources with worst case polarity Simulate to find effective input-referred offset Pessimistic, but fast Also, pessimistic may be a good thing
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