ACNV4506 Intelligent Power Module and Gate Drive Interface Optocouplers. Features. Specifications. Applications
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1 ACNV0 Intelligent Power Module and Gate Drive Interface Optocouplers Data Sheet Description The ACNV0 device contains a GaAsP LED optically coupled to an integrated high gain photo detector. Minimized propagation delay difference between devices makes these optocouplers excellent solutions for improving inverter efficiency through reduced switching dead time. Specifications and performance plots are given for typical IPM applications. Functional Diagram N.C. ANODE CATHODE N.C. N.C. Note: A 0. µf bypass capacitor must be connected between pins and 0. Truth Table LED ON OFF 0kΩ V O LOW HIGH 0 V CC V L V O Ground N.C. Features Performance Specified for Common IPM Applications Over Industrial Temperature Range. Short Maximum Propagation Delays Minimized Pulse Width Distortion (PWD) Very High Common Mode Rejection (CMR) High CTR. Available in Widebody DIP0 and GulWing packages with.0 mm creepage and clearance. Safety Approval (pending): UL Recognized with 00 V rms for minute per UL. CSA Approved. IEC/EN/DIN EN 0-- Approved with V IORM = V peak. Specifications Wide operating temperature range: 0 C to 0 C. Typical propagation delay = 00 ns, = 0 ns Typical Pulse Width Distortion (PWD) = 0 ns. 0 kv/µs minimum common mode rejection (CMR) at V CM = 00 V. CTR = 0%(typ) at I F = 0mA Applications IPM Isolation Isolated IGBT/MOSFET Gate Drive AC and Brushless DC Motor Drives Industrial Inverters CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
2 Ordering Information ACNV0 is pending UL recognition with 00Vrms for minute per UL. Part number Option RoHS Compliant Package Surface Mount Gull Wing Tape &Reel UL 00Vrms/ Minute rating IEC/EN/DIN EN 0-- Quantity ACNV0-000E 00 mil X X per tube -00E DIP-0 X X X X per tube -00E X X X X X 00 per reel To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example : ACNV0-00E to order product of 00mil DIP-0 Widebody with Gull Wing Surface Mount package in Tape and Reel packaging with both UL 00Vrms/min and IEC/EN/DIN EN0-- Safety Approval in RoHS compliant. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
3 Package Outline Drawings ACNV0 Widebody 00Mils DIP0 Package,.0 mm clearance [. ± 0.] 0. ± 0.00 [.0 ± 0.] 0. ± 0.00 [.0] 0.0 TYP [0.] 0.00 MIN [.] 0. [.0 ± 0.] 0. ± 0.00 [.0 ± 0.] 0. ± 0.00 [.] 0.0 [.0] 0. [.0] 0. [.] 0.0 [.0] 0. [. ± 0.] 0.00 ± 0.00 [.] 0.0 TYP [0. ± 0.0] 0.0 ± 0.00 TYP [0. ] Dimensions in Inches [Millimeters] ACNV0 Widebody 00Mils GulWing Tape & Reel Package,.0 mm clearance [. ± 0.] 0.0 ± 0.00 LAND PATTERN RECOMMENDATION [.0 ± 0.] 0.0 ± 0.00 [.0 ± 0.] 0. ± 0.00 [. ± 0.] 0. ± 0.00 [. ± 0.] 0.00 ± 0.00 [. ± 0.] 0.00 ± 0.00 [.0] 0.0 TYP [.0 ± 0.] 0. ± 0.00 [.0 ± 0.] 0. ± 0.00 [. ± 0.] 0.00 ± 0.00 [.] 0.0 MAX [0. ± 0.] 0.00 ± 0.00 [.00 ± 0.] 0.0 ± 0.00 [0. ] 0.00 NOM Dimension in Inches [Millimeter]
4 Solder Reflow Profile Recommended reflow condition as per JEDEC Standard, J-STD-00 (latest revision). Non-Halide Flux should be used. Regulatory Information The ACNV0 is pending approval from the following organizations: IEC IEC/EN/DIN EN 0--:00 UL Approval under UL, component recognition program up to V ISO = 00 V RMS. File E. CSA Approval under CSA Component Acceptance Notice #, File CA. Table. IEC/EN/DIN EN 0-- Insulation Characteristics* (ACNV0) Description Symbol Characteristic Unit Climatic Classification (IEC Part I) /0/ Maximum Working Insulation Voltage V IORM V peak Input to Output Test Voltage, Method b* V PR V peak V IORM x.=v PR, 00% Production Test with t m = sec, Partial discharge < pc Input to Output Test Voltage, Method a* V IORM x.=vpr, Type and Sample Test, t m =0 sec, Partial discharge < pc V PR V peak Highest Allowable Overvoltage (Transient Overvoltage t ini = 0 sec) V IOTM 000 V peak Safety-limiting values maximum values allowed in the event of a failure (also see Figure ). Case Temperature Input Current Output Power T S I S, INPUT P S, OUTPUT Insulation Resistance at T S, V IO = 00 V R S >0 Ω * Refer to the optocoupler section of the Isolation and Control Components Designer s Catalog, under Product Safety Regulations section, (IEC/EN/DIN EN 0--) for a detailed description of Method a and Method b partial discharge test profiles. 00 C ma W
5 Table. Insulation and Safety Related Specifications Parameter Symbol ACNV0 Units Conditions Minimum External Air Gap (External Clearance) Minimum External Tracking (External Creepage) Minimum Internal Plastic Gap (Internal Clearance) Minimum Internal Tracking (Internal Creepage) Tracking Resistance (Comparative Tracking Index) L(0).0 mm Measured from input terminals to output terminals, shortest distance through air. L(0).0 mm Measured from input terminals to output terminals, shortest distance path along body. mm Through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. NA mm Measured from input terminals to output terminals, along internal cavity. CTI > V DIN IEC /VDE 00 Part Isolation Group IIIa Material Group (DIN VDE 00, /, Table ) Table. Absolute Maximum Ratings Parameter Symbol Min. Max. Units Note Storage Temperature T storage - C Operating Temperature T A -0 0 C Average Input Current I F(avg) ma Peak Input Current (0% duty cycle, < ms pulse width) Peak Transient Input Current (< μs pulse width, 00 pps) I F(peak) 0 ma I F(tran).0 A Reverse Input Voltage (Pin -) V R V Average Output Current (Pin ) I O(avg) ma Output Voltage (Pin -) V O Supply Voltage (Pin 0-) V CC Output Power Dissipation P O 00 mw Total Power Dissipation P T mw Infrared and Vapor Phase Reflow Temperature See Reflow Thermal Profile. Table. Recommended Operating Conditions Parameter Symbol Min. Max. Units Note Power Supply Voltage V CC. 0 V Output Voltage V O 0 0 V Input Current (ON) I F(on) 0 0 ma Input Voltage (OFF) V F(off) - 0. V Operating Temperature T A -0 0 C
6 Table. Electrical Specifications Over recommended operating conditions unless otherwise specified: T A = -0 C to +0 C, V CC = +. V to 0 V, I F(on) = 0 ma to 0 ma, V F(off) = - V to 0. V Parameter Symbol Min. Typ.* Max. Units Test Conditions Fig. Note Current Transfer Ratio CTR 0 % I F = 0 ma, V O = 0. V Low Level Output Current I OL..0 ma I F = 0 ma, V O = 0. V, Low Level Output Voltage V OL V I O =. ma Input Threshold Current I TH.0.0 ma V O = 0. V, I O = 0. ma High Level Output Current I OH 0 μa V F = 0. V High Level Supply Current I CCH 0.. ma V F = 0. V, V O = Open Low Level Supply Current I CCL 0.. ma I F = 0 ma, V O = Open Input Forward Voltage V F.. V I F = 0 ma Temperature Coefficient of Forward Voltage ΔV F /ΔT A -. mv/ C I F = 0 ma Input Reverse Breakdown Voltage BV R V I R = 0 μa Input Capacitance C IN 0 pf f = MHz, V F = 0 V * All typical values at C, VCC = V. Table. Switching Specifications (RL = 0 kω) Over recommended operating conditions unless otherwise specified. T A = -0 C to +0 C, V CC = +. V to 0 V, I F(on) = 0 ma to 0 ma, V F(off) = - V to 0. V Parameter Symbol Min. Typ.* Max. Units Test Conditions Fig. Note Propagation Delay Time to ns C L = 00 pf I F(on) = 0 ma,,,, Low Output Level 0 ns C L = 0 pf V F(off) = 0. V, - V CC =.0 V, Propagation Delay Time to ns C L = 00 pf V THLH =.0 V, High Output Level 00 ns C L = 0 pf V THHL =. V Pulse Width Distortion PWD 0 0 ns C L = 00 pf Propagation Delay Difference Between Any Parts Output High Level Common Mode Transient immunity Output Low Level Common Mode Transient immunity * All typical values at C, VCC = V ns 0 CM H 0 kv/μs I F = 0 ma, V O >.0 V CM L 0 kv/μs I F = 0 ma, V O <.0 V V CC =.0 V, C L = 00 pf, V CM = 00 V P-P, T A = C
7 Table. Switching Specifications (RL = Internal Pull-up) Over recommended operating conditions unless otherwise specified. T A = -0 C to +0 C, V CC = +. V to 0 V, I F(on) = 0 ma to 0 ma, V F(off) = - V to 0. V Parameter Symbol Min. Typ.* Max. Units Test Conditions Fig. Note Propagation Delay Time to Low Output Level ns I F(on) = 0 ma, V F(off) = 0. V,, Propagation Delay Time to High Output Level 00 0 ns V CC =.0 V, V THLH =.0 V, V THHL =. V Pulse Width Distortion PWD 00 ns Propagation Delay Difference Between Any Parts Output High Level Common Mode Transient immunity Output Low Level Common Mode Transient immunity * All typical values at C, VCC = V ns 0 CM H 0 kv/μs I F = 0 ma, V O >.0 V CM L 0 kv/μs I F = 0 ma, V O <.0 V V CC =.0 V, C L = 00 pf, V CM = 00 V P-P, T A = C Table. Package Characteristics Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note Input-Output Momentary Withstand Voltage V ISO 00 V rms RH < 0%, t = min, T A = C, Input-Output Resistance R I-O 0 Ω V I-O = 00 Vdc Input-Output Capacitance C I-O 0. pf Freq= MHz Notes:. Derate linearly above 0 C free-air temperature at a rate of 0. ma/ C.. Derate linearly above 0 C free-air temperature at a rate of. ma/ C.. Derate linearly above 0 C free-air temperature at a rate of.0 mw/ C.. Derate linearly above 0 C free-air temperature at a rate of. mw/ C.. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current (I O ) to the forward LED input current (I F ) times 00.. Device considered a two-terminal device: Pins - shorted together and Pins -0 shorted together.. In accordance with UL, each optocoupler is proof tested by applying an insulation test voltage 00 V RMS for minute (leakage detection current limit, I I-O μa).. Pulse: f = 0 khz, Duty Cycle = 0%.. Use of a 0. μf bypass capacitor connected between pins and 0 can improve performance by filtering power supply line noise. 0. The difference between and between any two parts under the same test condition. (See IPM Dead Time and Propagation Delay Specifications section.). Common mode transient immunity in a Logic High level is the maximum tolerable dv CM /dt of the common mode pulse, V CM, to assure that the output will remain in a Logic High state (i.e., V O >.0 V).. Common mode transient immunity in a Logic Low level is the maximum tolerable dv CM /dt of the common mode pulse, V CM, to assure that the output will remain in a Logic Low state (i.e., V O <.0 V).. Pulse Width Distortion (PWD) is defined as - for any given device.
8 IO - OUTPUT CURRENT - ma 0 C -0 C 0 C V O = 0. V I F - FORWARD LED CURRENT - ma Figure. Typical Transfer Characteristics NORMALIZED OUTPUT CURRENT I F = 0 ma V O = 0. V T A TEMPERATURE C Figure. Normalized Output Current vs. Temperature IOH - HIGH LEVEL OUTPUT CURRENT - µa V F = 0. V V CC = V O =. V OR 0 V 0 V. V T A TEMPERATURE C Figure. High Level Output Current vs. Temperature IF - INPUT FORWARD CURRENT-mA V F + I F T A = C.... V F - INPUT FORWARD VOLTAGE - V Figure. Input Current vs. Forward Voltage 0 I F(ON) = 0 ma 0kΩ 0.µF + - Π V OUT + - C L * * TOTAL LOAD CAPACITANCE V CC = I f V O V THHL t f 0% 0% 0% 0% t r V THLH Figure. Propagation Delay Test Circuit
9 CAPACITANCE B V FF + - A I F + - 0kΩ V CM = 00V Π 0 0.µF V OUT + V - CC = 00 pf * * 00 pf TOTAL CAPACITANCE V CM OV t V O SWITCH AT A: I F = 0 ma V O SWITCH AT B: I F = 0 ma δv δt = V CM t V CC V OL Figure. CMR Test Circuit and Waveforms tp - PROPAGATION DELAY - ns I F = 0 ma V CC = V C L = 00 pf R L = 0 kω (EXTERNAL) tp - PROPAGATION DELAY - ns I F = 0 ma V CC = V C L = 00 pf R L = 0 kω (INTERNAL) T A - TEMPERATURE - C T A - TEMPERATURE - C Figure. Propagation Delay with External 0 kω RL vs. Temperature Figure. Propagation Delay with Internal 0 kω RL vs. Temperature tp - PROPAGATION DELAY - ns I F = 0 ma V CC = V C L = 00 pf T A = C tp - PROPAGATION DELAY - ns I F = 0 ma V CC = V R L = 0 kω T A = C R L LOAD RESISTANCE kω Figure. Propagation Delay vs. Load Resistance C L - LOAD CAPACITANCE - pf Figure 0. Propagation Delay vs. Load Capacitance
10 tp - PROPAGATION DELAY - ns I F = 0 ma C L = 00 pf R L = 0 kω T A = C 0 00 tp - PROPAGATION DELAY - ns V CC = V C L = 00 pf R L = 0 kω T A = C V CC - SUPPLY VOLTAGE - V Figure. Propagation Delay vs. Supply Voltage I F - FORWARD LED CURRENT - ma Figure. Propagation Delay vs. Input Current OUTPUT POWER - PS, INPUT CURRENT - IS P S (mw) I S (ma) T S - CASE TEMPERATURE - C Figure. Dependence of Safety Limiting Values on Temperatures (Thermal Derating Curves) 0
11 Applications Information LED Drive Circuit Considerations For Ultra High CMR Performance Without a detector shield, the dominant cause of optocoupler CMR failure is capacitive coupling from the input side of the optocoupler, through the package, to the detector IC as shown in Figure. The ACNV0 improve CMR performance by using a detector IC with an optically transparent Faraday shield, which diverts the capacitively coupled current away from the sensitive IC circuitry. However, this shield does not eliminate the capacitive coupling between the LED and the optocoupler output pin and output ground as shown in Figure. This capacitive coupling causes perturbations in the LED current during common mode transients and becomes the major source of CMR failures for a shielded optocoupler. The main design objective of a high CMR LED drive circuit becomes keeping the LED in the proper state (on or off) during common mode transients. For example, the recommended application circuit (Figure ), can achieve 0 kv/µs CMR while minimizing component complexity. Note that a CMOS gate is recommended in Figure to keep the LED off when the gate is in the high state. Another cause of CMR failure for a shielded optocoupler is direct coupling to the optocoupler output pins through C LEDO in Figure. Many factors influence the effect and magnitude of the direct coupling including: the position of the LED current setting resistor and the value of the capacitor at the optocoupler output (C L ). CMR With The LED On (CMR L ) A high CMR LED drive circuit must keep the LED on during common mode transients. This is achieved by overdriving the LED current beyond the input threshold so that it is not pulled below the threshold during a transient. The recommended minimum LED current of 0 ma provides adequate margin over the maximum I TH of.0 ma (see Figure ) to achieve 0 kv/µs CMR. The placement of the LED current setting resistor effects the ability of the drive circuit to keep the LED on during transients and interacts with the direct coupling to the optocoupler output. For example, the LED resistor in Figure is connected to the anode. Figure shows the AC equivalent circuit for Figure during common mode transients. During a +dv CM /dt in Figure, the current available at the LED anode (I total ) is limited by the series resistor. The LED current (I F ) is reduced from its DC value by an amount equal to the current that flows through C LEDP and C LEDO. The situation is made worse because the current through C LEDO has the effect of trying to pull the output high (toward a CMR failure) at the same time the LED current is being reduced. For this reason, the recommended LED drive circuit (Figure ) places the current setting resistor in series with the LED cathode. Figure + V CMOS 0Ω Figure. Recommended LED Drive Circuit C LEDP C LEDN 0kΩ 0.µF *00 pf TOTAL CAPACITANCE Figure. Optocoupler Input to Output Capacitance Model for Unshielded Optocouplers C LEDP C LEDN 0kΩ 0kΩ C LED0 C L * V OUT Figure. Optocoupler Input to Output Capacitance Model for Shielded Optocouplers + V CMOS 0Ω 0kΩ 0 0.µF *00 pf TOTAL CAPACITANCE Figure. LED Drive Circuit with Resistor Connected to LED Anode (Not Recommended) C L * V OUT + - V CC = V + - V CC = V
12 is the AC equivalent circuit for Figure during common mode transients. In this case, the LED current is not reduced during a +dv CM /dt transient because the current flowing through the package capacitance is supplied by the power supply. During a -dv CM /dt transient, however, the LED current is reduced by the amount of current flowing through C LEDN. But, better CMR performance is achieved since the current flowing in C LEDO during a negative transient acts to keep the output low. CMR With The LED Off (CMR H ) A high CMR LED drive circuit must keep the LED off (V F V F(OFF) ) during common mode transients. For example, during a +dv CM /dt transient in Figure, the current flowing through C LEDN is supplied by the parallel combination of the LED and series resistor. As long as the voltage developed across the resistor is less than V F(OFF) the LED will remain off and no common mode failure will occur. Even if the LED momentarily turns on, the 00 pf capacitor from pins - will keep the output from dipping below the threshold. The recommended LED drive circuit (Figure ) provides about 0 V of margin between the lowest optocoupler output voltage and a V IPM threshold during a 0 kv/µs transient with V CM = 00 V. Additional margin can be obtained by adding a diode in parallel with the resistor, as shown by the dashed line connection in Figure, to clamp the voltage across the LED below V F(OFF). Since the open collector drive circuit, shown in Figure 0, cannot keep the LED off during a +dv CM /dt transient, it is not desirable for applications requiring ultra high CMR H performance. Figure is the AC equivalent circuit for Figure 0 during common mode transients. Essentially all the current flowing through C LEDN during a +dv CM /dt transient must be supplied by the LED. CMR H failures can occur at dv/dt rates where the current through the LED and C LEDN exceeds the input threshold. Figure is an alternative drive circuit which does achieve ultra high CMR performance by shunting the LED in the off state. Figure. AC Equivalent Circuit for Figure during Common Mode Transients + V 00Ω + - V R ** C LEDP C LEDN I * C LEDN * THE ARROWS INDICATE THE DIRECTION OF CURRENT FLOW FOR +dv CM /dt TRANSIENTS. ** OPTIONAL CLAMPING DIODE FOR IMPROVED CMH PERFORMANCE. V R < V F (OFF) DURING +dv CM /dt. + - V CM 0kΩ 0 C LED0 V OUT Figure 0. Not Recommended Open Collector LED Drive Circuit Q Q 00Ω C LEDP C LEDN I C LEDN * 0kΩ 0kΩ C LED0 0 0 V OUT 0kΩ 00 pf 0kΩ 00 pf V CM I TOTAL * 00Ω I F I CLEDP C LEDP C LEDN 0 0kΩ C LED0 V OUT 00 pf + - Figure. AC Equivalent Circuit for Figure 0 during Common Mode Transients + V * THE ARROWS INDICATE THE DIRECTION OF CURRENT FLOW FOR +dv CM /dt TRANSIENTS. 0kΩ 0 * THE ARROWS INDICATE THE DIRECTION OF CURRENT FLOW DURING +dv CM /dt + - V CM Figure. AC Equivalent Circuit for Figure during Common Mode Transients Figure. Recommended LED Drive Circuit for Ultra High CMR
13 IPM Dead Time and Propagation Delay Specifications The ACNV0 includes a Propagation Delay Difference specification intended to help designers minimize dead time in their power inverter designs. Dead time is the time period during which both the high and low side power transistors (Q and Q in Figure ) are off. Any overlap in Q and Q conduction will result in large currents flowing through the power devices between the high and low voltage motor rails. To minimize dead time the designer must consider the propagation delay characteristics of the optocoupler as well as the characteristics of the IPM IGBT gate drive circuit. Considering only the delay characteristics of the optocoupler (the characteristics of the IPM IGBT gate drive circuit can be analyzed in the same way) it is important to know the minimum and maximum turn on ( ) and turn-off ( ) propagation delay specifications, preferably over the desired operating temperature range. The limiting case of zero dead time occurs when the input to Q turns off at the same time that the input to Q turns on. This case determines the minimum delay between LED turn-off and LED turn-on, which is related to the worst case optocoupler propagation delay waveforms, as shown in Figure. A minimum dead time of zero is achieved in Figure when the signal to turn on LED is delayed by ( max - min) from the LED turn off. Note that the propagation delays used to calculate PDD are taken at equal temperatures since the optocouplers under consideration are typically mounted in close proximity to each other. (Specifically, previous equation are not the same as the max and min, over the full operating temperature range, specified in the data sheet.) This delay is the maximum value for the propagation delay difference specification which is specified at 0 ns for the ACNV0 over an operating temperature range of -0 C to 0 C. Delaying the LED signal by the maximum propagation delay difference ensures that the minimum dead time is zero, but it does not tell a designer what the maximum dead time will be. The maximum dead time occurs in the highly unlikely case where one optocoupler with the fastest and another with the slowest are in the same inverter leg. The maximum dead time in this case becomes the sum of the spread in the and propagation delays as shown in Figure. The maximum dead time is also equivalent to the difference between the maximum and minimum propagation delay difference specifications. The maximum dead time (due to the optocouplers) for the ACNV0 are 00 ns (= 0 ns - (-0 ns)) over an operating temperature range of -0 C to 0 C. IPM I LED + V 0Ω CMOS 0kΩ 0 V CC 0.µF V OUT Q +HV I LED + V 0Ω CMOS 0kΩ 0 V CC 0.µF V OUT ACNV0 ACNV0 ACNV0 ACNV0 ACNV0 Q -HV M Figure. Typical Application Circuit
14 I LED I LED V OUT V OUT Q ON Q OFF Q OFF Q ON V OUT V OUT Q ON Q OFF Q OFF Q ON I LED I LED MAX. MIN. MIN. PDD* MAX. = ( - ) MAX. = MAX. - MIN. *PDD = PROPAGATION DELAY DIFFERENCE Note: The propagation delays used to calculate PDD are taken at equal temperatures. Figure. Minimum LED Skew for Zero Dead Time MAX. PDD* MAX. MIN. MAX. MAX. DEAD TIME MAXIMUM DEAD TIME (DUE TO OPTOCOUPLER) = ( MAX. - MIN. ) + ( MAX. - MIN. ) = ( MAX. - MIN. ) - ( MIN. - MAX. ) = PDD* MAX. - PDD* MIN. *PDD = PROPAGATION DELAY DIFFERENCE Note: The propagation delays used to calculate the maximum Dead time are taken at equal temperatures. Figure. Waveforms for Deadtime Calculation For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright 00-0 Avago Technologies. All rights reserved. AV0-EN - August, 0
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