Agilent HCPL-3100/HCPL-3101 Power MOSFET/IGBT Gate Drive Optocouplers
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1 Agilent HCPL/HCPL Power MOSFET/IGBT Gate Drive Optocouplers Data Sheet Description The HCPL/ consists of an LED* optically coupled to an integrated circuit with a power output stage. These optocouplers are suited for driving power MOSFETs and IGBTs used in motor control inverter applications. The high operating voltage range of the output stage provides the voltage drives required by gate controlled devices. The voltage and current supplied by these optocouplers allow for direct interfacing to the power device without the need for an intermediate amplifier stage. Functional Diagram HCPL The HCPL switches a pf load in µs and the HCPL, using a higher speed LED, switches a pf load in. µs. With a CMR rating of kv/µs typical these optocouplers readily reject transients found in inverter applications. The LED controls the state of the output stage. Transistor Q in the output stage is on with the LED off, allowing the gate of the power device to be held low. Turning on the LED turns off transistor Q and switches on transistor Q in the output stage which provides current and voltage to drive the gate of the power device. HCPL Features High output current I O and I O (. A Peak,. A continuous) kv/µs minimum Common Mode Rejection (CMR) at V CM = V Wide operating range ( to volts) High speed µs typical propagation delay (HCPL). µs typical propagation delay (HCPL) Recognized under UL for dielectric withstand proof test voltages of vac, minute Applications Isolated MOSFET/IGBT gate drive AC and DC motor drives General purpose industrial inverters Uninterruptable power supply VCC VCC Q Q VO VO Q Q VO VO TRUTH TABLE LED ON OFF OUTPUT HIGH LEVEL LOW LEVEL Q ON OFF Q OFF ON THE USE OF A. µf BYPASS CAPACITOR CONNECTED BETWEEN PINS AND IS RECOMMENDED. ALSO CURRENT LIMITING RESISTOR IS RECOMMENDED (SEE FIGURE, AND NOTE AND NOTE ). *HCPL LED contains Silicondoped GaAs and HCPL LED contains AlGaAs. CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
2 Schematic HCPL I CC HCPL I CC Q Q I O I O V O V O Q Q I O I O V O V O THE USE OF A. µf BYPASS CAPACITOR CONNECTED BETWEEN PINS AND IS RECOMMENDED. ALSO CURRENT LIMITING RESISTOR IS RECOMMENDED (SEE FIGURE, AND NOTE AND NOTE ). Ordering Information Specify Part Number followed by Option Number (if desired). Example: HCPLxXXX E Leadfree. = Standard DIP Package, per tube. = Gull Wing Surface Mount Option, per tube. = Tape and Reel Packaging Option, per reel. Outline Drawing. (.). (.).9 (.). (.9) TYPE NUMBER DATE CODE A XXXX YYWW. (.). (.). (.).9 (.). (.). (.) HCPL HCPL. (.) TYP. 9. (.). (.). (.). (.) Q VCC VO Q VCC VO Q Q.9 (.).9 (.). (.). (.) VO VO.9 (.9).9 (.). (.). (.)
3 Demonstrated ESD Performance Human Body Model: MILSTD Method.: Class Machine Model: EIAJ IC 9 (9.. Version ), Test Method, Condition C: V Regulatory Information The HCPL/ has been approved by the following organization: UL Recognized under UL, Component Recognition Program, File E. Insulation and Safety Related Specifications Parameter Symbol Value Units Conditions Min. External Air Gap L(IO). mm Shortest distance measured through air, between two (External Clearance) conductive leads, input to output Min. External Tracking L(IO). mm Shortest distance path measured along outside surface Path (External of optocoupler body between input and output leads Creepage) Min. Internal Plastic. mm Through insulation distance conductor to conductor Gap (Internal inside the optocoupler cavity Clearance) Absolute Maximum Ratings Parameter Symbol Device Min. Max. Unit Conditions Fig. Note Storage Temperature T S C Operating Temperature T A HCPL C HCPL Input Continuous HCPL ma Current HCPL ma Reverse V R HCPL V T A = C Voltage HCPL Supply Voltage V Output Continuous I O. A Current Peak Current. A Pulse Width <. µs, Duty cycle = % Voltage V O V Output Continuous I O. A Current Peak Current. A Pulse Width <. µs, Duty cycle = % Output Power Dissipation P O mw Total Power Dissipation P T mw Lead Solder Temperature C for s,. mm below seating plane
4 Recommended Operating Conditions Parameter Symbol Device Min. Max. Units Power Supply Voltage V Input Current (ON) HCPL ma HCPL ma Operating Temperature T A C Recommended Protection for Output Transistors During switching transitions, the output transistors Q and Q of the HCPL/ can conduct large amounts of current. Figure describes a recommended circuit design showing a current limiting resistor R which is necessary in order to prevent damage to the output transistors Q and Q. (See Note.) A bypass capacitor C is also recommended to reduce power supply noise. V HCPL/ CONTROL INPUT TTL OR LSTTL TOTEM POLE OUTPUT GATE R Q Q R C V V IGBT (OR )t (MOSFET) HVDC PHASE AC HVDC R = Ω R = Ω (HCPL) Ω (HCPL) BYPASS CAPACITOR C =. µf Figure. Recommended output transistor protection and typical application circuit.
5 Electrical Specifications Over recommended temperature (T A = C to C, HCPL; T A = C to C, HCPL) unless otherwise specified. Parameter Sym. Device Min. Typ. Max. Units Test Conditions Fig. Note Input Forward V F HCPL.. V = ma T A = C Voltage..9 V =. ma HCPL.. V = ma.. V =. ma Input Reverse I R HCPL µa V R = V T A = C Current HCPL V F = V Input Capacitance C IN HCPL pf V F = V, f = khz, T A = C HCPL pf V F = V, f = MHz, T A = C Output Low V OL HCPL.. V = ma = V,,, Level I O =. A, Voltage HCPL = ma = V Leakage I OL µa = V O = V, V O = V Current = ma, T A = C Output High V OH HCPL V = ma = V,, 9, Level V O = V, Voltage HCPL = ma I O =. A Low V OL.. V = V O = V, I O =. A,,, Level = ma Voltage Leakage I OL HCPL µa = ma = V, Current V O = V, HCPL = ma T A = C Supply High I CCH HCPL.. ma V O = V, Current Level = V, = ma HCPL.. ma V O = V = V, = ma Low I CCL.. ma V O = V, Level = V, = ma Low to High LH HCPL... ma T A = C,,, Threshold Input.. ma = V O = V HCPL... ma T A = C.. ma = V O = V
6 Switching Specifications (T A = C) Parameter Sym. Device Min. Typ. Max. Units Test Conditions Fig. Note Propagation t PLH HCPL µs = ma = V, 9,, Delay Time to V O = V,, High Output HCPL.. µs = ma R G = Ω,, Level C G = pf Propagation t PHL HCPL µs = ma Delay Time to Low Output HCPL.. µs = ma Level Rise Time t r HCPL.. µs = ma HCPL = ma Fall Time t f HCPL.. µs = ma HCPL = ma Output High CM H HCPL kv/µs = ma V CM = V Level Common (peak), Mode Transient HCPL = ma = V Immunity V O = V V H = V L Output Low CM L kv/µs = ma =. V Level Common Mode Transient Immunity Packaging Characteristics Parameter Sym. Min. Typ. Max. Units Test Conditions Fig. Note InputOutput Momentary V ISO V rms RH = % to %, Withstand Voltage* t = min, T A = C Resistance (InputOutput) R IO x Ω V IO = V, T A = C RH = % to % Capacitance (InputOutput) C IO. pf f = MHz *The InputOutput Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an inputoutput continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN Insulation Characteristics Table (if applicable), your equipment level safety specification, or Agilent Application Note, Optocoupler InputOutput Endurance Voltage. Notes:. Derate absolute maximum ratings with ambient temperatures as shown in Figures and.. A bypass capacitor of. µf or more is needed near the device between and when measuring output and transfer characteristics.. LH represents the forward current when the output goes from low to high.. Device considered a two terminal device; pins are shorted together and pins are shorted together.. For devices with minimum V ISO specified at V rms, in accordance with UL, each optocoupler is prooftested by applying an insulation test voltage V rms for one second (leakage current detection limit, I IO µa).. The t PLH and t PHL propagation delays are measured from the % level of the input pulse to the % level of the output pulse.. R limits the Q and Q peak currents. For more applications and circuit design information see Application Note Power Transistor Gate/Base Drive Optocouplers.
7 HCPL HCPL Q Q V O I O V OL Q Q V O V OH I O V O V O Figure. Test circuit for low level output voltage V OL. Figure. Test circuit for high level output voltage V OH. HCPL HCPL Q V OL I O Q Q V O Q V O I OL V O V O Figure. Test circuit for low level output voltage V OL. Figure. Test circuit for leakage current I OL. HCPL HCPL I CC Q I OL Q Q V O Q V O V O V O Figure. Test circuit for leakage current I OL. Figure. Test circuit for I CCH and I CCL. HCPL SWEEP Q V O Q V O V O Figure. Test circuit for threshold input current LH.
8 HCPL HCPL t r= t f=. µs V IN PULSE WIDTH µs DUTY RATIO % Q V O C G A SW B Q V O Q V O R G Q V O V O V O V CM % V CM V IN WAVE FORM V CM t PLH t PLH V OUT WAVE FORM 9% % % CM H, VO SW AT A, = ma, HCPL SW AT A, = ma, HCPL V OH V OH t r t f CM L, VO SW AT B, I = ma F V OL V OL Figure 9. Test circuit for t PLH, t PHL, t r, and t f. Figure. Test circuit for CM H and CM L. FORWARD CURRENT (ma) FORWARD CURRENT (ma) POWER DISSIPATION P O, P tot (mw) P O P tot Figure. LED forward current vs. ambient temperature, HCPL. Figure. LED forward current vs. ambient temperature, HCPL. Figure. Maximum power dissipation vs. ambient temperature, HCPL.
9 POWER DISSIPATION P O, P tot (mw) P O P tot FORWARD CURRENT (ma) T A = C C C C C C FORWARD CURRENT (ma) T A = C C C C C C FORWARD VOLTAGE V F (V) FORWARD VOLTAGE V F (V) Figure. Maximum power dissipation vs. ambient temperature, HCPL. Figure. Typical forward current vs. forward voltage, HCPL. Figure. Typical forward current vs. forward voltage, HCPL. RELATIVE INPUT THRESHOLD CURRENT (%) 9 VALUE OF = V ASSUME T A = C SUPPLY VOLTAGE (V) RELATIVE INPUT THRESHOLD CURRENT (%) T A = C 9 LH = % at = V SUPPLY VOLTAGE (V) RELATIVE INPUT THRESHOLD CURRENT (%) = V LH = % at T A = C Figure. Normalized low to high threshold input current vs. supply voltage, HCPL. Figure. Normalized low to high threshold input current vs. supply voltage, HCPL. Figure 9. Normalized low to high threshold input current vs. ambient temperature, HCPL. RELATIVE INPUT THRESHOLD CURRENT (%) = V 9 LH = % at T A = C O LOW LEVEL OUTPUT VOLTAGE V OL (V).. T A = C = V = V = ma.... O LOW LEVEL OUTPUT VOLTAGE V OL (V).. T A = C = V = V = ma.... O OUTPUT CURRENT I O (A) O OUTPUT CURRENT I O (A) Figure. Normalized low to high threshold input current vs. ambient temperature, HCPL. Figure. Typical low level output voltage vs. output current, HCPL. Figure. Typical low level output voltage vs. output current, HCPL. 9
10 O LOW LEVEL OUTPUT VOLTAGE V OL (V) = V = V = ma I O =. A O LOW LEVEL OUTPUT VOLTAGE V OL (V) = V = V = ma I O =. A O HIGH LEVEL OUTPUT VOLTAGE V OH (V) T A = C = ma SUPPLY VOLTAGE (V) Figure. Typical low level output voltage vs. ambient temperature, HCPL. Figure. Typical low level output voltage vs. ambient temperature, HCPL. Figure. Typical high level output voltage vs. supply voltage, HCPL. O HIGH LEVEL OUTPUT VOLTAGE V OH (V) T A = C = ma O HIGH LEVEL OUTPUT VOLTAGE V OH (V) I O NEARLY = A I O =. A = V = ma O HIGH LEVEL OUTPUT VOLTAGE V OH (V) I O = NEARLY A I O =. A = V = ma SUPPLY VOLTAGE (V) Figure. Typical high level output voltage vs. supply voltage, HCPL. Figure. Typical high level output voltage vs. ambient temperature, HCPL. Figure. Typical high level output voltage vs. ambient temperature, HCPL. O LOW LEVEL OUTPUT VOLTAGE V OL (V).. T A = C = V O = V = ma.... O LOW LEVEL OUTPUT VOLTAGE V OL (V).. T A = C = V O = V = ma.... O LOW LEVEL OUTPUT VOLTAGE V OL (V) = V = ma I O =. A O OUTPUT CURRENT I O (A) O OUTPUT CURRENT I O (A) Figure 9. Typical low level output voltage vs. output current, HCPL. Figure. Typical low level output voltage vs. output current, HCPL. Figure. Typical low level output voltage vs. ambient temperature, HCPL.
11 O LOW LEVEL OUTPUT VOLTAGE V OL (V) = V = ma I O =. A HIGH LEVEL SUPPLY CURRENT I CCH (ma) T A = C = ma HIGH LEVEL SUPPLY CURRENT I CCH (ma) T A = C = ma SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) Figure. Typical low level output voltage vs. ambient temperature, HCPL. Figure. Typical high level supply current vs. supply voltage, HCPL. Figure. Typical high level supply current vs. supply voltage, HCPL.... LOW LEVEL SUPPLY CURRENT I CCL (ma)..... T A = C = ma LOW LEVEL SUPPLY CURRENT I CCL (ma)..... T A = C = ma HIGH LEVEL SUPPLY CURRENT I CCH (ma)..... = V = ma SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) Figure. Typical low level supply current vs. supply voltage, HCPL. Figure. Typical low level supply current vs. supply voltage, HCPL. Figure. Typical high level supply current vs. ambient temperature, HCPL. HIGH LEVEL SUPPLY CURRENT I CCH (ma) = V = ma LOW LEVEL SUPPLY CURRENT I CCL (ma) = V = ma LOW LEVEL SUPPLY CURRENT I CCL (ma) = V = ma Figure. Typical high level supply current vs. ambient temperature, HCPL. Figure 9. Typical low level supply current vs. ambient temperature, HCPL. Figure. Typical low level supply current vs. ambient temperature, HCPL.
12 PROPAGATION DELAY TIME t PHL, t PLH (µs)..... t PHL t PLH T A = C = V O = V R G = W C G = pf C C C C C PROPAGATION DELAY TIME t PHL, t PLH (µs)..... t PHL t PLH C T A = C = V O = V R G = W C G = pf C C C C PROPAGATION DELAY TIME t PHL, t PLH (µs)..... t PHL t PLH = V O = V R G = W C G = pf = ma FORWARD CURRENT (ma) FORWARD CURRENT (ma) Figure. Typical propagation delay time vs. forward current, HCPL. Figure. Typical propagation delay time vs. forward current, HCPL. Figure. Typical propagation delay time vs. ambient temperature, HCPL. PROPAGATION DELAY TIME t PHL, t PLH (µs)..... = V O = V R G = W C G = pf = ma t PLH t PHL Figure. Typical propagation delay time vs. ambient temperature, HCPL.
13 For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: () or (9) Europe: 9 () 9 China: Hong Kong: () 9 India, Australia, New Zealand: () 99 Japan: ( ) (Domestic/International), or (Domestic Only) Korea: () 99 Singapore, Malaysia, Vietnam, Thailand, Philippines, Indonesia: () Taiwan: () Data subject to change. Copyright Agilent Technologies, Inc. Obsoletes 99EN April, 9999EN
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