PHOTOMASK N E W S TAKE A LOOK INSIDE: INDUSTRY BRIEFS For new developments in technology see page 9. CALENDAR For a list of meetings see page 10

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1 PHOTOMASK BACUS The international technical group of SPIE dedicated to the advancement of photomask technology. NOVEMBER 2008 VOLUME 24, ISSUE 11 Wafer Plane Inspection Evaluated for Photomask Production Emily Gallagher, Karen Badger, and Mark Lawliss, IBM Corporation, 1000 River Street, Essex Junction, VT Yutaka Kodera, Toppan Photomask, Inc., 1000 River Street, Essex Junction, VT Jaione Tirapu Azpiroz, IBM Corporation, 2070 Route 52, Hopewell Junction, NY Song Pang, Hongqin Zhang, Eugenia Eugenieva, Chris Clifford, Arosha Goonesekera, and Yibin Tian, KLA-Tencor Corporation, 160 Rio Robles, San Jose, CA 95134, USA ABSTRACT Wafer Plane Inspection (WPI) is a novel approach to inspection, developed to enable high inspectability on fragmented mask features at the optimal defect sensitivity. It builds on well-established high resolution inspection capabilities to complement existing manufacturing methods. The production of defect-free photomasks is practical today only because of informed decisions on the impact of defects identified. The defect size, location and its measured printing impact can dictate that a mask is perfectly good for lithographic purposes. This inspection - verification - repair loop is timeconsuming and is predicated on the fact that detectable photomask defects do not always resolve or matter on wafer. This paper will introduce and evaluate an alternative approach that moves the mask inspection to the wafer plane. WPI uses a high NA inspection of the mask to construct a physical mask model. This mask model is used to create the mask image in the wafer plane. Finally, a threshold model is applied to enhance sensitivity to printing defects. WPI essentially eliminates the non-printing inspection stops and relaxes some of the pattern restrictions currently placed on incoming photomask designs. This paper outlines the WPI technology and explores its application to patterns and substrates representative of 32nm designs. The implications of deploying Wafer Plane Inspection will be discussed. 1. Introduction It is the role of photomask manufacturers to make the best possible masks at the lowest possible cost. Certain defects play a large role in mask quality since they can create repeating defects on wafers when Continues on page 3. TAKE A LOOK INSIDE: INDUSTRY BRIEFS For new developments in technology see page 9 CALENDAR For a list of meetings see page 10 Figure 1. Flowchart of Wafer Plane Inspection and the three steps: imaging of the mask, recovery of the mask pattern under test, simulation of the aerial image and the application of a threshold to obtain the test wafer image. The corresponding reference wafer image is obtained through a similar flow shown on the lower row. Defects are detected by comparing the reference and test wafer images.

2 Editorial Help Wanted: Improved Mask Materials BACUS News is published monthly by SPIE for BACUS, the international technical group of SPIE dedicated to the advancement of photomask technology. Circulation Tom Faure, Mask Process Development Engineering In reflecting on this year s Photomask conference and the panel discussion, it is clear that the pace of progress in 4x optical mask materials development needs to be accelerated. The 22 nm logic node is clearly the most challenging that mask makers have faced to date. On the semiconductor lithography side, there is no relief for the mask maker in the form of improved optical steppers with higher numerical aperture. We are all parked at the same NA=1.35 that is currently in use at 32 nm node. In addition, none of the alternative lithography strategies such as EUVL, NIL, or e-beam direct write will be ready for 22 nm manufacturing. The pressure is squarely on the 4x optical mask maker to deliver masks that enable a 22 nm lithography solution. A key part of enabling an optical lithography solution at 22 nm requires that the mask maker support extremely aggressive OPC feature sizes on the reticle. An IBM OPC/RET engineering manager recently told me, OPC features on the order of 50% of the nominal half pitch of the technology node are needed. This implies that feature sizes on the order of 40 nm (4x) on the mask will be needed for 22 nm node critical level masks, and the situation will only get tougher at the 16 nm node. Furthermore, some computational lithography approaches for extending optical lithography require primary images on the mask that surpass the requirements listed in the current ITRS road map. Consequently, a significant improvement in minimum feature size capability on photomasks is needed. The materials properties and film thicknesses of the photomask blank as well as the e-beam resist material used for patterning the blank have a huge influence on the ultimate minimum feature size that can be achieved on the photomask. In order to achieve manufacturing worthy nm feature size capability on photomasks significant improvements in mask materials is needed. Development of improved e-beam resist materials capable of nm resolution with reasonable sensitivity appears to be one of the most critical needs and was highlighted during the BACUS panel discussion by Nuflare. It is no coincidence that 1x masks for nanoimprint lithography are being built using non-car resists such as ZEP 520 in order to achieve the nm feature sizes needed. Unfortunately use of the currently available non-car resists is not an option for 4X masks due to prohibitively long e-beam write times (estimate 1 week per mask) using current e-beam tooling. In addition, simply thinning the current chemically amplified e-beam resists such as FEP-171 does not result in improved resolution performance. As Nuflare highlighted, development of new and improved e-beam resist materials with acceptable sensitivity, high resolution, reasonable line edge roughness, and acceptable dry etch resistance for 4x optical mask making is needed. Historically the pace of resist materials development for mask making has been extremely slow: PBS resist in the 1970 s and 1980 s, ZEP resist in the mid-1990 s for 180 nm node, FEP 171 resist in early 2000 for 130 nm node. Due to the small size of the e-beam resist market, there are very few companies (I m aware of two) that are willing to invest any resource in developing new e-beam resists. Mask blanks development has also been an area of very slow progress historically. Chrome has been in use for binary masks for decades. Mitsubishi patented the idea of using metal silicide films such as molybdenum silicide as an alternative to chrome for binary masks in the 1980 s. Mask blanks suppliers such as Shin Etsu and Hoya only started offering molybdenum silicide binary mask blanks in 2007 and 2008 respectively. To their credit, Shin Etsu and Hoya have recently started picking up the pace of improving the mask making materials properties of their mask blanks but further progress is needed. The new binary mask blanks based on moly silicide material are a huge step in the right direction, but there are no comparable mask blank alternatives for those companies that wish to stick with attenuated PSM for their 22 nm lithography solution. For mask blanks, the development of thinner mask film stacks that are much more dry etch friendly and that enable use of thin e-beam imaging resists is crucial in order to improve the minimum mask feature size to nm. It is both an exciting and challenging time to be in the mask business. Now more than ever the semiconductor industry is relying on mask makers to enable a lithography solution at 22 nm node. Failure to develop new and improved materials that give mask makers the tools necessary to deliver extremely high resolution 4x optical masks will put the 22 nm lithography node in jeopardy. Managing Editor/Graphics Linda DeLano Advertising Teresa Roles-Meier BACUS Technical Group Manager Pat Wight 2008 BACUS Steering Committee President Brian J. Grenon, Grenon Consulting Vice-President John Whittey, Vistec Semiconductor Systems, Inc. Secretary Warren Montgomery, CNSE/SEMATECH 2009 SPIE Photomask Chairs Larry S. Zurbrick, Agilent Technologies, Inc. Warren Montgomery, CNSE/SEMATECH International Chair Wilhelm Maurer, Infineon Technologies AG (Germany) Education Chair Wolfgang Staud, B2W Consulting Newsletter Editors Artur Balasinski, Cypress Semiconductor Corp. Warren Montgomery, CNSE/SEMATECH Sponsorships Teresa Roles-Meier, SPIE Members at Large Frank E. Abboud, Intel Corp. Michael D. Archuletta, RAVE LLC Uwe Behringer, UBC Microelectronics (Germany) Peter D. Buck, Toppan Photomasks, Inc. Ute Buttgereit, Carl Zeiss SMS GmbH (Germany) Thomas Faure, IBM Corp. Gregory K. Hearn, SCIOPT Enterprises Gregg A. Inderhees, KLA-Tencor Corp. Bryan S. Kasprowicz, Photronics, Inc. Kurt Kimmel, Advanced Mask Technology Ctr. GmbH & Co. KG (Germany) Paul Leuhrmann, ASML (Netherlands) Robert (Bob) Naber, Cadence Design Systems, Inc. Emmanuel Rausa, Oerlikon USA Inc. Douglas J. Resnick, Molecular Imprints, Inc. J. Tracy Weed, Synopsys, Inc. Banqui Wu, Applied Materials, Inc. P.O. Box 10, Bellingham, WA USA Tel: or Fax: SPIE.org customerservice@spie.org 2008 All rights reserved.

3 Volume 24, Issue 11 Page 3 Continued from cover. Figure 2. The left map is a WPI aerial image view of a 50nm line, 120nm pitch pattern. The cut line is shown at y=0. The corresponding intensity as a function of X is plotted at the right. Since the wafer anchor CD is 40nm, the threshold must be Figure 3. WPI and FDTD simulated CD is compared to resist CD in this bar chart on different anchor features. A single threshold resist was used in the WPI and FDTD models and demonstrated reasonable matching to the wafer. they are deployed in wafer fabs. Defects generally impact the cost of photomasks since defects reduce overall production yields and drive the need for an expensive suite of equipment to detect, analyze and repair them. The implications of this pressure on inspection requirements fall into two general categories: the inspection equipment itself and the process defects. The inspection equipment must ensure the quality of out-going masks without limiting the lithographic approach. Preferably, this is done with a high throughput. The process defects must be minimized by identifying and addressing process tool and material issues quickly. This is true whether the defects print or not. High sensitivity reticle inspection is required to accomplish this. At the same time, some mask defects do not print when imaged on wafer. These types of defects must be differentiated from defects that do print on wafer. While this has historically been handled with a verification step - either AIMSTM[1] or on wafer - it is better to sort the wafer impact at the inspection step itself. Wafer Plane Inspection (WPI) is an inspection mode offered by KLA-Tencor. WPI offers the possibility of eliminating mask restrictions imposed on OPC solutions by inspection tool limitations. Historically minimum design restrictions were required to avoid nuisance inspection stops and/or loss of sensitivity to defects. However, WPI must be evaluated to ensure that real defects on the wafer plane are identified, that the process flow runs smoothly, and that masks and designs are inspected to full specification. KLA-Tencor and IBM established an evaluation plan to test and evaluate the WPI inspection system. The model accuracy was tested relative to industry standard models and the inspection results were compared to reticle plane inspection results. This paper discusses some results that have emerged from that effort. 2. Simulation 2.1 Wafer Plane Inspection The mask industry relies heavily on high resolution reticle inspection: transmitted and/or reflected images of the mask are collected and compared to reference images. The reference can be another die on the mask or it can be the design database, altered to match the predicted image of the mask as observed by the high resolutions inspection optics. As the name implies, Wafer Plane Inspection moves the comparison plane to the wafer level. 2 This is accomplished in three basic steps as illustrated in Figure 1. The first step is to collect the high resolution images of the mask and reconstruct a physical model of the mask pattern under test, including any pattern defects that may be present. There is no need to be actinic at this point since the mask pattern recovery process depends on high resolution images, not specific wavelength of capture. This is called mask pattern recovery. The second step uses a lithographic simulation based on Hopkins equation to generate an aerial image of the recovered mask in the resist film. Simulations are intrinsic to modern lithography and Continues on page 4.

4 Page 4 Volume 24, Issue 11 Continued from page 3. Figure 4. The left is a 3D view of the reconstructed mask model. Aerial image simulation results are shown for FDTD (top right) and WPI (bottom right). All three images have cut lines indicating the location of subsequent intensity vs. position analysis. The smoothness of the FDTD images was achieved by over-sampling to eliminate pixel limitations of the aerial image. the WPI algorithm results have been compared to results from widelyused simulators to gain confidence in this fast engine. The final step applies a resist threshold to the aerial image to enhance detection and separate printable from non-printable defects. All of the WPI components have been used to generate manufacturing solutions either in photomask manufacturing or in OPC modeling. What is new is the marriage of traditional inspection and lithographic simulation and the level of communication required to apply WPI in manufacturing. First, mask material properties must be known because they are used during the mask recovery process; these are saved in a file during the initial setup for a mask substrate type. Next, the detailed illumination conditions including wavelength, polarization, NA, and aperture are needed for the aerial image simulation. Finally, an anchor feature must be identified on the mask and the corresponding wafer CD in resist supplied to establish a threshold. 2.2 Illumination Conditions The widespread use of AIMS TM analysis in mask manufacturing has familiarized the mask maker with litho conditions. NA, apertures, polarization and wavelength are required inputs for analysis. For WPI, the inclusion of this information has been improved by accepting the actual illumination source file itself. This is a two-dimensional map of not only the aperture, but also of any imperfections in the source that change the intensity. This information is also required for OPC generation and verification so that reusing it in this context is not creating extra work. The WPI technology accepts complex illumination and polarization profiles to be input as source files to the model so that details of the advanced lithography exposure conditions and optical character are captured without any hardware modifications. 2.3 Simulators With any new capability, confirmation relative to accepted standards is needed. Obtaining wafer confirmation can be reassuring, but is not required to answer all questions. For this paper, we compared simulated results to the WPI results. This could be done without requiring masks to be built or wafers to be printed. This approach increased our cycles of learning tremendously. There were two reference simulators used. Prolith2D is a standard Kirchhoff model of the mask used to form an Aerial image. It accounts for the magnitude and phase of the mask material transmission, but does not include 3D edge effects. Figure 5. WPI and FDTD aerial image intensity plots. With edge compensation, WPI matches 3D FDTD to within 1nm. Prolith3D uses Finite Difference Time Domain (FDTD) model. 3 FDTD is a standard rigorous electromagnetic solver that steps through time, updating the electric and magnetic field values at every point in space. It is considered the most accurate result in this study. Finally, WPI is also a simulator, and while designed specifically for application to mask inspection, it can be run off-line for verification purposes. WPI simulation capability has been evaluated rigorously to compare with Prolith2D and FDTD in this paper. 2.4 Resist Model Anchor features are another requirement of OPC. Critical design features are identified and measured in wafer resist to generate and verify the OPC models. Like illumination conditions, these are already stored with information about any model in use in manufacturing so that obtaining this piece of information is not creating new work. However, a strong relationship and good communication between the wafer fab and the mask manufacturer will be required to link OPC generation and mask fabrication so that the appropriate wafer

5 Volume 24, Issue 11 Page 5 Figure 6. Aerial image difference map showing a clear defect detected using WPI without and with edge compensation. Figure 7. Plots of normalized aerial image intensity as a function of position show the detection capabilities of WPI on clear (left) and opaque (right) defects. inputs are deployed. An example of threshold selection is detailed in Figure 2. The aerial image of a 50nm line/120nm pitch pattern is shown at left with a cut line indicated. The dimensions are wafer scale. The wafer anchor image indicated that the CD should be 40nm on wafer. Normalized intensity of the pattern along the cut-line is plotted as a function of position, and the threshold intensity yielding this wafer CD is found to be When OPC models are calibrated, a large number of structures are measured. Duplicating the OPC modeling effort would add complexity, increase the volume of calibration data, and increase the computational resource required. It is important to remember that mask inspection does not require the edge placement accuracy of an OPC model; the goal for mask inspection is sufficient accuracy to be sensitive to defects. The single threshold approach has enormous speed and manufacturability advantages, but it must also demonstrate the ability provide sufficient accuracy to detect defects. To explore this further, a single anchor feature was used to define the threshold, but other features were selected spanning a range of CD and pitches. FDTD and WPI simulations were run to generate aerial images and were analyzed with the single threshold to obtain wafer resist CDs. These are plotted in Figure 3. The FDTD and WPI simulations match extremely well, within 0.6nm. Both simulated results can deviate from wafer measurements by as much as 4nm, but this value is consistent with constant-threshold models used in the industry. Accuracy on the order of 5-8nm mean squared root CD error is typical and sufficient to detect even small deviations on image contours. More complex anchoring schemes 4 could be deployed to improve accuracy, but the information in section 2.5 suggests that this is not needed. 2.5 Defect Sensitivity The goal of this effort is to compare WPI to accepted FDTD models to evaluate sensitivity. The mask model was extracted from the GDS layout and periodic boundary conditions were assumed in x and y. The appropriate 193nm lithographic conditions were applied using a source map to describe the aperture. There was no need to carry this evaluation to the wafer plane, so comparisons are done in the aerial image plane. The general analysis approach is to compare WPI and FDTD results along the same cut line as shown in Figure 4. However, it is important to consider the mask itself. When light passes through a 3D clear feature, interactions with the sidewalls make the effective clear area smaller. This effect is captured in the FDTD model, but is not inherent to WPI unless an edge bias is applied. This bias compensates for the absorptive nature of finite sidewalls and is used to make clear features larger and opaque ones smaller. 5 With edge compensation, WPI matches 3D FDTD simulations to within 1nm as is illustrated in Figure 5. This matching is good but does not yet address sensitivity. The case of a very small clear defect in the location circled in Figure 4 is a good illustration. WPI and FDTD results were compared with and without the defect. The edge movement as a result of the defect is approximately the same: 5.3nm for FDTD and 5.8nm for WPI. The larger CD change for WPI indicates that sensitivity is maintained with WPI. This case is a good test case because of the small defect size. In general, edge effects are a bigger problem for small features and defects because the constant edge effect (EMF bias) is a larger fraction of the total feature size. For some masks, a single edge bias cannot be applied, so it is important to consider whether edge compensation is needed in order to Continues on page 6.

6 Page 6 Volume 24, Issue 11 N E W S Continued from page 5. Figure 8. A WPI die-to-database inspection defect review illustrating that a 12nm extension defect at the mask plane results in an 8nm CD error in the wafer plane. Figure 9. A Reticle Plane Inspection result (left) is compared to WPI (right) on an intentionally damaged mask. In the same inspection area, WPI identified 121 defects from a total of 2060 as critical. find defects with WPI. Aerial image difference maps of a clear defect are good qualitative metrics. Since the edge effects block light, the impact of the clear defect should be reduced with edge compensation. This result was modeled with WPI (Figure 6) and is an accurate representation of EMF edge effects on wafer. The opposite effect is found on opaque defects. Edge compensation increases sensitivity to opaque defects. Again, this is a realistic modeling of defect printability at the wafer plane. A review of the effect of defects without edge compensation is shown in Figure 7. For both clear and opaque defects, there are small printability differences when the edge compensation is added. While edge compensation would yield more accurate predictions, the WPI model without edge compensation is clearly sensitive to both clear and opaque defects. We have shown extension type defects as an example, but the same effects would be present in CD, pinhole and other pattern defects. 3. Inspection results and use case 3.1 Example of WPI Inspection Mask manufacturers have two goals from the mask inspection. The first is to find all the defects that could cause a printing impact on wafer. The second, more subtle, goal is to identify potential tool or process concerns, but not to overwhelm the inspection result with these non-printing detections. Using both WPI and Reticle Plane Inspection (RPI) concurrently will achieve both goals. WPI die-todatabase inspections have demonstrated good sensitivity, low nuisance and low false defect detection rates on a range of test masks. Two WPI die-to-database inspection examples are included here to highlight the value of WPI inspection. The first example shows a very small defect captured by WPI inspection. The review snapshot in Fig. 8 shows that the line extension defect of 12nm at the mask plane results in an 8nm CD error at wafer plane. Given the small magnitude of the mask plane deviation, particularly in transmission, this defect

7 Volume 24, Issue 11 Page 7 Figure 10. WPI and RPI results on a gate level mask. Broken sub resolution assists are identified in the conventional inspection, the mask plane and the WPI aerial plane. Only the wafer resist plane identifies the lack of printability. Figure 11. WPI and RPI results on a contact level mask. An opaque defect on quartz was identified with RPI, at the mask plane and in the WPI aerial plane. Only the resist plane captures the lack of printability. would require considerable post-inspection analysis in the absence of WPI capability. The second example is the more global plate inspection comparison between Reticle Plane Inspection (RPI) and WPI on the same mask shown in Fig 9. The mask was intentionally contaminated with thousands of surface pits. Most of these pit defects do not print. This defect type does not grow and would not degrade the mask performance when exposed on wafer. RPI captures on all the pit defects to provide process feedback, while WPI highlights only the printing defects. 3.2 Examples of WPI Filtering Simulation results like the ones shown in Section 2 illustrate that WPI is capable of detecting defects. However, the usecase is important. Since the defective mask itself is reconstructed at the initial step of modeling, what advantage does WPI provide? The answer is best provided by reviewing two WPI die-to-database inspection examples. The first example is a gate level inspection shown in Figure 10. The design included sub-resolution assist features (SRAFs). Clear defects were identified on the SRAFs in RPI reflection mode, RPI transmission mode, reconstructed mask plane, and WPI aerial image mode. When the WPI resist threshold is applied, the defect does not show because the entire shape is below the printing threshold. The feature is behaving as it was designed to and is anticipated. In practice, these clear defects could be analyzed with AIMS TM and passed. A simpler approach would be to screen them at inspection reducing the total number of inspection stops to review and the burden on AIMS TM. A second example is shown in Figure 11. In this case, the defect is a small opaque feature on quartz. Again, the opaque defects were identified in RPI reflection mode, RPI transmission mode, reconstructed mask plane, and WPI aerial image mode. Only the WPI resist threshold is able to filter this defect because its signal is below the printing threshold. 3.3 AIMS TM Correlation The appeal of an inspection filter is strong, but the relationship between defects and their printability must be verified before ignoring defects. There cannot be any risk to the mask user. To validate the WPI predictions, defects that were below the WPI printing threshold Continues on page 8.

8 Page 8 Volume 24, Issue 11 Continued from page 7. Figure 12. WPI die-to-database change in CD is correlated to AIMS TM change in CD on two production masks. Both line (diamonds) and contact (squares) shapes were included in the analysis. at wafer plane were verified to be non-printing with AIMS TM. Further validation is also required for those defects that are above the WPI printing threshold at wafer plane. Good correlations between WPI and AIMS TM have been shown before. 6 The general approach is to determine the change in wafer CD measured by WPI, and compare the result to AIMS TM measurement. Good correlation between AIMS TM and WPI delta CD has been established. Two examples are shown in Figure 12. It should be emphasized that there will always be a unique use case for AIMS TM in mask manufacturing as a small sample analysis tool. The WPI inspection mode is suited to area analysis, not to the site verification required for individual defect analysis. WPI will not replace AIMS TM, however, the close agreement between WPI and AIMS TM implies that an improved manufacturing flow will be possible. 4. Conclusions This paper describes the multi-layered testing of WPI capability for use in mask inspection. First, the accuracy of the WPI model in the wafer plane was investigated by comparing WPI results to full EMF models used in FDTD. Next, the need for EMF bias for adequate accuracy was explored. While accuracy is definitely improved with the edge compensation, it is not required for defect detection. Having demonstrated capability of the WPI model, the full WPI use-case was applied on masks. Two examples of the filtering power of WPI were given. Correlation to AIMS TM suggests that the filtering is consistent with current defect analysis methods. It is worth mentioning that AIMS TM will still be an essential part of the mask manufacturing line since post repair analysis is not well-suited to full plate mask inspection system. While additional quantification of sensitivity is pending, WPI is a promising option for the future. 5. Acknowledgments The authors would like to thank the KLA-Tencor RAPID WPI engineering and application teams for their development of the WPI technology and the IBM manufacturing and engineering teams for mask processing and AIMS work. 6. References [1] AIMS TM, a trademark of Carl Zeiss. [2] C. Hess, M. Wihl, R.-f. Shi, Y. Xiong, and S. Pang, A Novel Approach: High Resolution Inspection with Wafer Plane Defect Detection, Proc. SPIE 7028 (2008). [3] A. Taflove and S. C. Hagness, [Computational electrodynamics: the finite-difference time-domain method], Artech House, Boston, 3rd edition (2005). [4] N. Cobb, A. Zakhor, and E. Miloslavsky, Mathematical and CAD framework for proximity correction, Proc. SPIE 2726 (1996). [5] J. Tirapu Azpiroz, A. E. Rosenbluth, K. Lai, C. Fonseca, and D. Yang, Critical impact of EMF effects on RET and OPC performance for 45nm and beyond, J. Vac. Sci. Technol. B25 (1), 164 (2007). [6] R. Nagpal, F. Ghadiali, J. Kim, T. Huang, and S. Pang, Wafer plane inspection for advanced reticle defects, Proc. SPIE 7028, (2008).

9 Volume 24, Issue 11 Page 9 Sponsorship Opportunities Sign up now for the best sponsorship opportunities for Photomask 2009, Lithography Asia - Taiwan 2008, and Advanced Lithography Contact: Teresa Roles-Meier Tel: teresar@spie.org Advertise in the BACUS News! The BACUS Newsletter is the premier publication serving the photomask industry. For information on how to advertise, contact: Teresa Roles-Meier Tel: teresar@spie.org BACUS Corporate Members Aprio Technologies, Inc. ASML US, Inc. Brion Technologies, Inc. Coherent, Inc. Corning Inc. Gudeng Precision Industrial Co., Ltd. Hamatech USA Inc. Inko Industrial Corp. JEOL USA Inc. KLA-Tencor Corp. Lasertec USA Inc. Micronic Laser Systems AB RSoft Design Group, Inc. Synopsys, Inc. Toppan Photomasks, Inc. To receive announcements for these meetings, send an message to patw@spie.org; in the body of the message include the words subscribe info-bacus. Industry Briefs Key Challenges Remain for EUV Lithography Before Volume Production Adoption at the 22nm Half-Pitch At the seventh EUVL Symposium, organized by SEMATECH, key challenges remain for EUV lithography before volume production adoption at the 22nm half-pitch, according to attendees and an assessment from the research consortium. A fully integrated laser produced plasma (LPP) source collector module with effective mitigation of tin deposition and ion erosion was demonstrated at the symposium with 3 to 4 W at intermediate focus (IF). Long-term source operation with 100 W at the IF and 5 megajoule per day will be required for production. SEMATECH noted that on the ASML EUV alpha tool, power of discharge produced plasma (DPP) sources had now reached 500W. The ability to produce and maintain defect-free masks continues to improve, according to SEMATECH, however the industry will require more sensitive defect inspection tools for mask substrates and blanks. In part a commercial EUV aerial imaging tool will be required for patterned mask defect review. Concern was also raised over EUV metrology infrastructure as a whole. Photoresist sensitivity and Line Edge Roughness (LER) are still proving problematic. However, SEMATECH work has shown that 20 nm resolution images and 30 nm 1:1 contact hole images have been achieved. SEMATECH remains positive at this time that EUV Lithography will be ready for pilot line insertion in the timeframe. Read more about Toppan s EUV masks. ASML Presents Faster ArF Scanner, Says EUV on Track for 2010 By Laura Peters, Semiconductor International ASML said it is on schedule for 2010 delivery of its first EUV production system. At a research review meeting in Veldhoven, ASML introduced a new positioning measurement system to improve overlay control by 50% to <2 nm for a Twinscan immersion system. At a research review meeting in Veldhoven, Netherlands, ASML introduced a Twinscan immersion system that offers significant improvements in performance and productivity relative to previous scanners. Through a combination of faster stage technology and much lighter materials, the company said throughputs of >200 wph are possible. As device makers begin to require new double patterning techniques for 3X nm device patterning, the specification for overlay accuracy has become more than twice as tight as it is for single-exposure processing. The Twinscan NXT uses a new positioning measurement system to improve overlay control by 50% to <2 nm. In going from single exposure to double exposure, CD uniformity must be halved. Overlay specifications for 193 nm immersion single exposure, double exposure and EUV lithography. Necessary improvements in CD uniformity for single exposure, double exposure and EUV As with previous systems, the scanner uses one stage for alignment and construction of the focus map while the second wafer is being exposed on the second chuck. The measurement and exposure methods both had to be improved to deliver overall throughput improvements. The swap time between the two wafers was ~3 sec on previous platforms. With the new swapping method, the NXT reduces this time drastically. In addition, using higher rates of acceleration, wafer stepping times are reduced, improving productivity overall by 30%. Acceleration rates on the system are 88 m/sec2 at the reticle level, but this is scaled at the wafer level due to the 4X image reduction. An ASML spokesman said that at the 32 and 22 nm nodes, subtle phenomena such as global deformation of the wafer now need to be compensated for. The installed base of Twinscan systems is almost 900 tools. At the research meeting, ASML executives also provided an update on the status of the company s EUV technology, which has been in evaluation at IMEC (Leuven, Belgium) and Albany NanoTech (Albany, N.Y.). They said the company is on schedule for 2010 first production system delivery. Interestingly, many of the advances on the NXT immersion scanner stage were developed for EUV as well. The most important, necessary developments for EUV by 2010 include ramping up of the source power to ~100 W to allow throughputs in the 100 wph regime. Current throughput is ~4 wph as reported by IMEC. Technology advances for keeping the EUV reticles clean when they are not in the vacuum environment of the scanner must also be developed. Finally, photoresists for EUV are critical, but in the past several months materials suppliers have apparently made significant advancements.

10 Join the premier professional organization for mask makers and mask users! About the BACUS Group Founded in 1980 by a group of chrome blank users wanting a single voice to interact with suppliers, BACUS has grown to become the largest and most widely known forum for the exchange of technical information of interest to photomask and reticle makers. BACUS joined SPIE in January of 1991 to expand the exchange of information with mask makers around the world. The group sponsors an informative monthly meeting and newsletter, BACUS News. The BACUS annual Photomask Technology Symposium covers photomask technology, photomask processes, lithography, materials and resists, phase shift masks, inspection and repair, metrology, and quality and manufacturing management. Individual Membership Benefits include: Subscription to BACUS News (monthly) Quarterly technical meetings in the Bay Area Reduced registration rates at BACUS Photomask Technology annual meeting Eligibility to hold office on BACUS Steering Committee spie.org/bacushome Corporate Membership Benefits include: One Voting Member in the SPIE General Membership Subscription to BACUS News (monthly) One online SPIE Journal Subscription Exhibit Space discount of 8% at either the Photomask or Advanced Lithography Symposium Listed as a Corporate Member in the BACUS Monthly Newsletter spie.org/bacushome C a l e n d a r 2008 SPIE Lithography Asia - Taiwan 4-6 November Taipei, Taiwan SPIE Advanced Lithography February San Jose, California, USA spie.org/al Abstracts now being accepted Photomask Japan 8-10 April Hotel Pacifico Yokohama Yokohama, Japan You are invited to submit events of interest for this calendar. Please send to lindad@spie.org; alternatively, or fax to SPIE. SPIE is an international society advancing light-based technologies. International Headquarters P.O. Box 10, Bellingham, WA USA Tel: or Fax: customerservice@spie.org SPIE.org Shipping Address th St., Bellingham, WA USA 2 Alexandra Gate, Ffordd Pengam, Cardiff, CF24 2SA, UK Tel: Fax: spieeurope@spieeurope.org