THe overall performance and the cost of the heating

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1 Journl of Eletril Engineering Spe etor Modultion For Three Phse ndution Dieletri Heting Y B Shukl nd S K Joshi Deprtment of Eletril Engineering The M.S.University of Brod dodr, ndi, e-mil : yshukl@yhoo.om, skjoshi@ieee.org Astrt Modultion tehniques hve een widely used in indution heting, indution melting nd motor drives pplitions. This is due to severl dvntges suh s reltively smll size of power eletronis swithes like MOSFET, GBT, et., low losses, nd low ost. n this pper design nd implementtion of -phse pulse width modultion for three phse indution dieletri heting hs een desried. The system hs een used to ontrol temperture using symmetril spe vetor modultion. This pper presents the effet on temperture of frequeny. The mthemtil model hs een developed nd simultion on Mtl. ndex Terms ndution Dieletri Heting(DH), Spe etor modultion(sm), Three phse inverter. NTRODUCTON THe overll performne nd the ost of the heting system will e one of the importnt issues to e onsidered during the design proess for the next genertion of ndution Dieletri Heting (DH) pplitions. The power onversion iruit (Three phse Pulse Width Modultion (PWM) inverter) of DH pplitions must hieve high effiieny, low hrmoni distortion, high reliility nd low eletromgneti interferene (EM) noise. Three phse PWM inverter re eoming more nd more populr in present dy indution heting system.[7], [9], []. Sinusoidl Pulse Width Modultion (SPWM) hs een used to ontrol the three phse inverter output voltge. To mintins good performne of the drive the opertion hs een restrited etween to 78 % of the vlue tht would e rehed y squre wve opertion. [],[7],[7]. The vrious modultion strtegies hve een developed [],[4],[5],[9],[],[],[],[],[7],[],[9],[], nd nlyzed. The spe vetor modultion (SM) [],[8] hs een offers signifint flexiility to optimize swithing wveforms nd it hs een well suited for digitl implementtion. For the DH pplition, full utiliztion of the DC us voltge is extremely importnt to hieve the mximum temperture under ll onditions. The urrent ripple in three phse pulse width modultion inverter under stedy stte opertion n e minimized using SM ompred to ny other PWM methods for voltge ontrol mode. A symmetril spe vetor modultion pttern hs een proposed, to redue Totl Hrmoni Distortion (THD) without inresing the swithing losses. The design nd implementtions -phse PWM inverter for -phse DH to ontrol temperture using spe vetor modultion(sm) hs een desried.. PRNCPLE OF SPACE ECTOR PWM The iruit model of typil three-phse voltge soure PWM inverter is shown in Figure. S to S 6 re the six power swithes tht shpe the output voltge, whih re ontrolled y the swithing vriles,,, nd,. When n upper MOSFET is swithed on, i.e., when, or is, the orresponding lower MOSFET is swithed off, i.e., the orresponding, or is. Therefore, the on nd off sttes of the upper MOSFET S, S nd S 5 n e used to determine the output voltge [5]. + DC S S S Fig.. S 4 6 S 5 Phse PWM inverter iruit for DH S The reltionship etween the swithing vrile vetor [,, ] t nd the line-to-line voltge vetor [,, ] t is given y eq. in the following: DC () Also, the reltionship etween the swithing vrile vetor [,, ] t nd the phse voltge vetor [ n, n, n ] t n e expressed elow. n n DC n () As illustrted in Figure, there re eight possile omintions of on nd off ptterns for the three upper power swithes. The on nd off sttes of the lower power devies re opposite to the upper one nd so re esily determined one the sttes of the upper power MOSFET s re determined. Aording to eq. nd, the eight swithing vetors, output line to neutrl voltge (phse voltge), nd output line-to-line voltges in terms of DC-link d, re given in Tle nd

2 Journl of Eletril Engineering TABLE SWTCHNG ECTORS, PHASE OLTAGES AND OUTPUT LNE TO LNE OLTAGE oltge Swithing etor Line to line voltge etor etors () OFF OFF OFF ON ON ON Zero () ON OFF OFF OFF ON ON DC - DC Ative () ON ON OFF OFF OFF ON DC - DC Ative () OFF ON OFF ON OFF ON - DC DC Ative 4 () OFF ON ON ON OFF OFF - DC DC Ative 5 () OFF OFF ON ON ON OFF - DC DC Ative 6 () ON OFF ON OFF ON OFF DC - DC Ative 7 () ON ON ON OFF OFF OFF Zero Figure shows the eight inverter voltge vetors [9] ( to 7 ). [,,] [,,] [,,] [,,] Fig. 4. frme. () ref T () 4 α () 7 T d xis ( /,) q xis ( /,/ ) (/,/ ) () () () ( /, / ) 5 6 () (/,) () (/, / ) The reltionship of referene frme nd sttionry dq referene 4 [,,] 5 [,,] 6 [,,] 7 [,,] Fig.. Eight inverter voltge vetors Zero (Spe) oltge Sttes Spe etor Modultion (SM) refers to speil swithing sequene of the upper three power MOSFETs of threephse inverter. The soure voltge hs een utilized most effiiently y the spe vetor modultion (SM) ompred to sinusoidl pulse width modultion [9] s shown in Figure. 4 Fig Trnsitions etween different swithing sttes. q / DC SPWM / DC / DC Sine PWM Fig.. Lous omprison of mximum liner ontrol voltge in sine PWM nd SPWM. n the vetor spe, ording to the equivlene priniple, the following operting rules re otined: 4, 5, 6 7, () n one smpling intervl, the output voltge vetor t n e written s d t t + t t 7 7 (4) where t, t,...t 7 re the turn-on time of the vetors,,... 7 ; t, t,...t 7 >, 7 i t i ; is the smpling time. Aording to eq. nd 4,there re infinite wys of deomposition of into,,..., 6. However, in order to redue the numer of swithing tions nd mke full use of tive turn-on time for spe vetors, the vetor is ommonly split into the two nerest djent voltge vetors nd zero vetors nd 7 in n ritrry setor. For exmple, in setor, in one smpling intervl, vetor n e expressed s T + T + T + T 7 7 (5) where T T T + T 7, T nd T 7. Let the length of e m DC,where m is modultion index, then m sin π T sin( π α) T sinα (6)

3 Journl of Eletril Engineering Thus, TABLE SPACE ECTOR MODULATON ALGORTHM Setor Setor ( ωt π ) ( π ωt π ) T Tm os(ωt + π 6 ) T π Tm os(ωt + 6 ) T Tm os(ωt + π ) T Tm os(ωt + 7π 6 ) T + T 7 T T T T + T 7 T T T Setor Setor ( π ωt π) (π ωt 4π ) T Tm os(ωt + π ) T 4 Tm os(ωt + 7π 6 ) T 4 Tm os(ωt + 5π 6 ) T 5 Tm os(ωt + π ) T + T 7 T T T 4 T + T 7 T T 4 T 5 Setor Setor ( 4π ωt 5π ) ( 5π ωt π) T 5 Tm os(ωt + 5π 6 ) T 6 Tm os(ωt + π ) T 6 Tm os(ωt + π 6 ) T Tm os(ωt + π 6 ) T + T 7 T T 5 T 6 T + T 7 T T 6 T T msin( π ωt) mos( π 6 + ωt) T msinωt mos( π + ωt) T + T 7 T T (7) where nπ ωt α nπ + π/. The length nd ngle hve een determine y tive nd zero (spe) vetors. Where,,..., 6 re lled s tive vetors, nd, 7 re lled zero (spe) vetors. The deomposition of voltge in different setors hs een presented in Tle. Equtions 5 nd 6 hve een ommonly used for formultion of the spe vetor modultion. t hs een shown tht the turn on times T i (i,..., 6) for tive vetors re identil in different spe vetor modultion[7],[],[9],[]. The different distriution of T nd T 7 for zero vetors yields different spe vetor modultion. There re not seprte modultion signls in eh of the three spe vetor modultion tehnique [6]. nsted, voltge vetor is proessed s whole []. For spe vetor modultion, the oundry ondition for setor is: From eq. 6 to 8; T + T, T T 7 (8) m sin π sin( π α) (9) The oundry of the liner modultion rnge is the hexgon [6], [8] s shown in Figure. The liner modultion rnge is loted within the hexgon. f the voltge vetor exeeds the hexgon, s lulted from eq. 7,then T + T > nd it is unrelizle. Thus, for the over modultion region spe vetor modultion is outside the hexgon. n six step mode, the swithing sequene is [6]. Furthermore, it should e point out tht the trjetory of voltge vetor should e irulr while mintining sinusoidl output line-to-line voltges. From Figure 4,it hs een seen tht for liner modultion rnge, the length of vetor m DC should e ( /) DC, the trjetory of eomes the insried irle of the hexgon nd the mximum mplitude of sinusoidl line-to-line voltges is the soure voltge DC. Moreover, for spe vetor modultion, there is degree of freedom in the hoie of zero vetors in one swithing yle, i.e., whether nd 7 or oth. For ontinuous spe vetor shemes, in the liner modultion rnge, oth nd 7 re used in one yle, tht is, T 7 nd T. For disontinuous spe vetor shemes, in the liner modultion rnge, only or only 7 is used in one yle, tht is T 7 nd T.. DESGNNG STEP FOR SM GENERATON To implement the spe vetor modultion, the voltge equtions in the referene frme n e trnsformed into the sttionry dq referene frme [9] s shown in Figure 6. Fig. 6. q q xis α d ref,d xis oltge Spe etor nd its omponents in (d,q) From Figure 6, the reltion etween these two referene frmes is elow f dq K s f () / / where, K s / /, / / / f dq [f d, f q, f ] T, f [f, f, f ] T, nd f denotes either voltge or urrent vrile. As desried in Figure 6, this trnsformtion is equivlent to n orthogonl projetion of [,, ] t onto the twodimensionl perpendiulr to the vetor [,, ] t (the equivlent d q plne) in three-dimensionl oordinte system. As result, six non-zero vetors nd two zero vetors re possile. Six nonzero vetors ( - 6 ) shpe the xis of hexgonl s shown in Figure 4, nd feed eletri power to the lod. The ngle etween ny djent two non-zero vetors is 6 degrees. Menwhile, two zero vetors ( nd 7 ) re t the origin nd pply zero voltge to the lod. The eight vetors re lled the si spe vetors nd re denoted y,,,, 4, 5, 6 nd 7. The sme trnsformtion n e pplied to the desired output voltge

4 Journl of Eletril Engineering to get the desired referene voltge vetor ref in the d q plne. The ojetive of spe vetor modultion tehnique is to pproximte the referene voltge vetor ref using the eight swithing ptterns. Therefore, spe vetor modultion n e implemented y the following steps: Step. Determine d, q, ref, nd ngle (α). Step. Determine time durtion T, T, T. Step. Determine the swithing time of eh MOSFET (S to S 6 ). A. Determine d, q, ref, nd ngle (α) From Figure 6, the d, q, ref, nd ngle (α) n e determine s follows: d n n os6 n... os6 () n n n q + n os n... os n n [ ] d [ ] n q n n ref d + q α tn ( d q where f fundmentl frequeny B. Determine time durtion T, T, T ) ωt πft, From Figure 7, the swithing time durtion n e lulted s follows: Swithing time durtion t setor where, f s nd ref Swithing time durtion t ny setor DC )) Ts ref ( ( π T sin DC α + n π Ts ref ( sin n ) DC π α Ts ref ( sin n ) DC πosα osn πsinα ( ( Ts ref T sin α n )) π DC Ts ref DC ( osα sin n T T T π + sinα os n ) π where, n through 6 (tht is, Setor to ) (n ) π α nπ Fig. 7. α T T s T Referene vetor s omintion of djent vetors t setor C. Determine the swithing time of eh MOSFET (S to S 6 ) T Ts T o/ T T T o/ T o/ T T T o/ ref T Ts T T+T ref dt dt + dt + T ref (T + T ) ref where, > α > 6 o [ ] os(α) T sin(α) DC + T DC sin(π/ α) T sin(π/) sin(α) T sin(π/) T (T + T ), [ ] Ts T +T dt [ os(π/) sin(π/) ] S S S 5 S 4 S 6 S 7 Fig. 8. Atul gting signl pttern of the spe vetor PWM(in the se of the setor - Bsed on Figure 8, the swithing time t eh setor hs een summrized in Tle, nd it will e uilt in Simulink model to implement SM. 7. SMULATON RESULTS Simultion results were performed using simulink lok s shown in Figure 9. The DC us DC is equl to 5, 4

5 4 5 7 Zero oltge Sttes 6 Journl of Eletril Engineering TABLE SWTCHNG TME CALCULATON AT EACH SECTOR Setor Upper Swithes Lower Swithes (S, S, S 5 ) (S 4, S 6, S ) S T + T + T 7 S 4 T S T + T 7 S 6 T + T S 5 T 7 S T + T + T S T + T 7 S 4 T + T S T + T + T 7 S 6 T S 5 T 7 S T + T + T S T 7 S 4 T + T 4 + T S T + T 4 + T 7 S 6 T S 5 T 4 + T 7 S T + T T 7 T o/ T T o/ Fig.. Simultion results of inverter output urrents (i ia, i ib, i ic ) is onneted to the input of the inverter. For the liner operting rnge the ref must not exeeds the oundry of the hexgon. Therefore the mximum mplitude of the desired ref is lulted s ( ) ( ) ref mx DC 6 DC () Smple iruit prmeters re given in Tle. Simultion Fig.. Simultion results of lod voltges ( LAB, LBC, LCA ) Freq* olts* Temp* DC Three Phse oltge Genertor Low pss filter Fig. 9. dq d q Spe etor Setor SM genertor Rmp Generter Swithing Time Clultor Thet spe vetor genertor hs een shown in Figure 9 Three phse PWM inverter output line to line voltge, output urrent, phse to phse dq trnsformtion voltges nd phse to phse dq trnsformtion urrents re shown in Figure,,, respetively. Simultion summries nd results re given in Tle, respetively. A spetrl nlysis of ll wveforms is performed nd ll hrmonis re presented in Tle. These results shows tht eptle performnes n e otined t ll testing frequenies sine the totl hrmoni distortion (THD) did never reh %. At high swithing frequeny the PWM onverter generte voltge hving n mplitude lose to the desired vlue. Gte Logi Pulses. CONCLUSONS Spe vetor modultion only requires on referene spe vetor to generte three phse sine wves. The mplitude nd frequeny of lod voltge n e vried y ontrolling the referene spe vetor. Furthermore, this lgorithm is flexile nd suitle for dvned vetor ontrol. The strtegy of the swithing minimizes the distortion of lod urrent s well s loss due to minimize numer of ommuttions in the inverter. Simultion of Spe etor Modultion (SM) tehnique hs een done using MATLAB. This im on the one hnd to prove the effetiveness of the SM in the ontriution in the swithing power losses redution. SM is mong one of the est solution to hieve good voltge trnsfer nd redue hrmoni distortion in the output of three phse inverter for DH. t lso provide exellent output performne optimized TABLE CRCUT PARAMETERS Prmeter Utility DC L m f sw lue /5Hz 5 volt 69.mH Khz TABLE SMULATON RESULTS Fig.. Simultion results of inverter output line to line voltges ( iab, ibc, ica ) Swithing Set Finl Frequeny Lod Freq. Temp. Temp. in olt urrent in Hz in C in C in Hz in Amp

6 Journl of Eletril Engineering TABLE SMULATONS SUMMARES Set Finl Frequeny Temp. in C Temp. in C in olt in Hz TABLE SPECTRAL ANALYSS Fig.. Simultion results of lod phse urrents (i LA, i LB, i LC ) Hrmoni for different h Swithing frequenies khz khz 5 khz khz Fig. 4. Simultion wveforms. () nverter output line to line voltge ( iab ) () nverter output urrent (i ia ) () Lod line to line voltge ( LAB ) (d) Lod phse urrent (i LA ) effiieny nd high reliility ompred to similr three phse inverter with onventionl pulse width modultions. REFERENCES [] n der Broek, Skudelny, H.C., Stnke, G., Anlysis nd Reliztion of Pulse Width Modultor Bsed on oltge Spe etors, Conferene Re. Annul Meeting EEE-AS, Denver/USA, pp.44-5, 986. [] H. n der Broek, H. Skudelny, nd G. Stnke, Anlysis nd reliztion of pulse width modultor sed on voltge spe vetors, in Pro. EEE nd. Appl. Conf., pp.44-5,986. [] H.W. n der Broek, H.C. Skudelny, nd G.. Stnke, Anlysis nd reliztion of pulse width modultor sed on voltge spe vetors, EEE Trns. nd. Applit., ol.4, pp.4? 5, Jn./Fe [4] D.Csdei,G.Grndi,G.Serr nd A Tni, Spe vetor ontrol of mtrix onverters with unity input power ftor nd sinusoidl input/output wveforms, Europen power eletronis ssotion,99. [5] T.G.Helter,A spe vetor sed retifier regultor for AC/DC/AC onverter, EEE Trns. on Power Ele.,ol.8, No., pp.-6, 99. [6] J. Holtz, Pulse width modultion for eletronis power onversion, Proeedings EEE, ol.8, pp.94-4, Aug-994. [7] Z. Yu, A. Mohmmed, nd. Pnhi, A review of three pwm tehniques, in Pro. Amer. Control Conf.,pp. 57? 6, 997. [8] D. W. Chung, J. S. Kim, nd S. K. Sul, Unified voltge modultion tehnique for rel time three phse power onversion, EEE trnstions industril pplition, ol.4, pp.74-8, Mr./April-998. [9] Do-Hyun Jng, nd Duk-Yong Yoon, Spe-vetor PWM tehniques for two phse inverter fed two phse indution motor, EEE Conf., 999. [] Peter s, Artifiil?ntelligene sed eletril mhines nd drives, Oxford university, 999. [] J. Klim, Anlytil model for the time nd frequeny domin nlysis of spe-vetor PWM inverter fed indution motor sed on the Lple trnsform of spe-vetors, in Pro. Power Conversion Conf., Osk, Jpn, pp. 4? 9,. [] G. Nrynn nd.t. Rngnthn, Extension of opertion of spe vetor PWM strtegies with low swithing frequenies using different overmodultion lgorithms, EEE Trns. Power Eletron., ol.7, pp , Sept.-. [] Mondl, S.K., Bose, B.K., Oleshuk,., Pinto, J.O.P, Spe vetor pulse width modultion of three-level inverter extending opertion into overmodultion region, EEE Trnstions on Power Eletronis ol.8, ssue, pp.64? 6, Mrh-. [4] Kelly, J.W. Strngs, E.G. Miller, J.M. Multiphse Spe etor pulse width modultion, EEE Trns. on Energy Conservtions, ol.8, No., pp.54-64, June-. [5] Do-Hyun Jng, nd Duk-Yong Yoon, Spe-vetor PWM tehniques for two phse inverter fed two phse indution motor, EEE Trns. On industry pplitions, ol.9, No., pp , Mr./Apr.-. [6] M.A. Jr, Ashwin M. Khmd Kone, nd Zhng Ynfeng, Spevetor modultion in two phse indution motor drive for onstnt power opertion, EEE Trns. on ndustril Eletronis, ol.5, No.5, pp.8-88, Ot.-4. [7] S Beher, S P Ds nd S R Dordl, A New SM Tehnique for Softswithed d- Converter, E () Journl EL, ol.85, Mrh-5. [8] L. Frnquelo, M. Prts, R. Portillo, J. Glvn, M. Perles, J. Crrso, E. Diez, nd J. Jimenez, Three-dimensionl spe-vetor modultion lgorithm for four-leg multilevel onverters using oordintes, EEE Trns. nd. Eletron., ol.5, No., pp , Apr.-6 [9] A.ql, Anlysis of spe vetor pulse width modultion for five phse voltge soure inverter,e ()journl-el, ol.89 ssue, pp.8-5, Sep.-8. [] Bosquets Monge. S, Bordonu. J., Roert. J, A virtul vetor pulse width modultion for four level diode lmped DC-AC onverter, Power Eletronis, EEE Trnstion, ol., pp , July- 8. [] Nil A. Ahmed, Three phse high frequeny AC onversion iruit with dul mode PWM/PDM ontrol strtegy for high power H pplition, Pro. of world demy of siene, Engineering nd Tehnology ol.5, Nov.-8. [] R.Arumozhiyl nd K.Bskrn, Spe vetor pulse width modultion sed speed ontrol of indution motor using fuzzzy P ontroller, nterntionl Journl of Computer nd Eletril Engineering, ol., No., pp , April-9. 6