Capacitor Voltage Control in a Cascaded Multilevel Inverter as a Static Var Generator

Transcription

1 Capaitor Voltage Control in a Casaded Multilevel Inverter as a Stati Var Generator M. Li,J.N.Chiasson,L.M.Tolbert The University of Tennessee, ECE Department, Knoxville, USA Abstrat The widespread use of nonlinear loads and power eletronis onverters has inreased the generation of nonsinusoidal and nonperiodi urrents and voltages in power systems. Reative power ompensation or ontrol is an important part of a power system to minimize power transmission losses. Givenamodulationindex,theswithtimesanbehosento ahieve the fundamental while eliminating speifi harmonis. However, the resulting total harmoni distortion (THD) depends on the modulation index (see [][]). This work onsiders the ontrol of the DC apaitor voltage in suh a way that one an operate at the modulation index whih results in the minimum THD. This paper presents the development of speifi ontrol algorithms for a asaded multilevel inverter to be used for stati var ompensation. Index Terms Multilevel Inverter, Stati Var Generator (SVG), Casade inverter. Previous work in [][] has shown the swithing angles in the multilevel inverter are found so as to produe the required fundamental voltage while at the same time not generate higher order harmonis. However, for level multilevel inverter, if modulation index is out of the range.8 through.5, there exists no set of swithing angles suh that the fundamental an be ontrolled while at the same time ompletely eliminating the 5th and 7th order harmonis. In this work, a ontrol strategy is presented to vary the level of the DC apaitor voltage so that use of the stairase swithing sheme (with its inherent low swithing losses). I. INTRODUCTION Multilevel inverters have gained muh attention in reent years as an effetive solution for various high power and high voltage appliations. A multilevel inverter is a power eletroni devie built to produe a waveforms from small voltage steps by utilizing isolated soures or a bank of series apaitors. The multilevel inverter is ideal for onneting distributed energy soures (solar ells, fuel ells, the retified output of wind turbines) to an existing three phase power grid []. Multilevel inverter strutures have been developed to overome shortomings in solidstate devie ratings so that they an be applied to highvoltage, high power eletrial systems. As pointed out in [][4][5], the advantage of the asaded multilevel inverter inludes: () its ative devies swith at (or nearly) the fundamental frequeny drastially reduing the swithing losses, () it eliminates the need for a transformer to provide the requisite voltage levels, () pakaging is muh easier beause of the simpliity of struture and lower omponent ount, and (4) as there are no transformers, it an respond muh faster. It is widely aknowledged that a major onern in any power system is power quality, and espeially to have low harmoni ontent. This is beause of the effets harmonis have on the energy effiieny of the power system as well as the detrimental effet they have on the reliability of the equipment onneted to it. Beause the multilevel inverter is swithing at the fundamental frequeny, its generated harmonis are muh lower in frequeny than higharrier frequeny based PWM systems. As a result, a major onern in designing a stati var ompensator based on the multilevel inverter is to ensure that its total harmoni distortion is within allowable standards. II. CASCADED HBRIDGES A asaded multilevel inverter is made up from a series of Hbridge (singlephase full bridge) inverters, eah with their own isolated bus. This multilevel inverter an generate almost sinusoidal waveform voltage from several separate soures (SDCSs), whih may be obtained from solar ells, fuel ells, batteries, ultraapaitors, et. Figure shows a singlephase struture of an Mlevel Hbridges multilevel asaded inverter. Eah level an generate three different voltage outputs, and by onneting the soures to the a output side by different ombinations of the four swithes. The output voltage of an Mlevel inverter is the sum of all of the individual inverter outputs. It is lear from Figure thattohaveanmlevel asaded multilevel inverter we need M Hbridge units in eah phase. An example phase voltage waveform for a 7level asaded multilevel inverter with three soures and three full bridges is shown in Figure. The output phase voltage is given by v an v a v a v a. As Figure illustrates, eah of the Hbridge s ative devies swithes only at the fundamental frequeny, and eah Hbridge unit generates a quasisquare waveform by phaseshifting its positive and negative phase legs swithing timings. Further, eah swithing devie always onduts for 8 o (or / yle) regardless of the pulse width of the quasisquare wave so that this swithing method results in equalizing the urrent stress in eah ative devie.

2 V a V a C a whih are omputed offline to minimize harmonis for eah modulation index m. is the phase angle of the soure voltage. α is phaseshift angle of the output voltage. Here the modulation index m is defined by m s, () V max V a C a where V is the magnitude referene of the inverter output voltage. Using the tehniques in [][6], q V va vb v. () V max is the maximum obtainable magnitude of voltage when all the swithing phase angles are zero: n V a ( M ) / C a ( M ) / Fig.. Singlephase struture of a mlevel Hbridges multilevel asaded inverter. Fig.. i π / v π v v π π v an π v an π / Output waveform of a 7level asade multilevel inverter. π III. SVG SYSTEM CONFIGURATION AND OPERATION Figure shows the system onfiguration and ontrol blok diagram of a Stati Var Generator (SVG) using a asaded multilevel inverter, where L is the inverter interfae indutane, v s represents the soure voltage, I (or q ) is the reative urrent (or reative power) referene, and V is the link voltage referene (see [6]). The swithing pattern table shown in Figure generates the swithing gate signals by given modulation index and phase angles through a lookup table. The lookup table is made from the swithing angles r 4 V max π s, () where s is the number of soures. Figure 4 shows the equivalent iruit of the SVG system (see [6]). A leading reative urrent (apaitive urrent) is drawn from the line when the amplitude of the output voltage V C is larger than the soure voltage s amplitude whih means vars are generated. A lagging reative urrent (indutive urrent) is drawn from the line when the amplitude of the output voltage V C is smaller than the soure voltage s amplitude whih means vars are absorbed. Sine phase urrent i a is leading or lagging the phase voltage v an by 9 o as shown in Figure, the average harge on eah apaitor will be zero whih means there is no net real power exhange between the multilevel inverter and the utility line. To ompensate the swithing devie loss and apaitor loss, the multilevel inverter should be ontrolled so that some real power is delivered to the apaitor. In priniple, eah apaitor voltage an be ontrolled to be exatly the desired voltage, V. Calulation of reative power Fig.. V sa V sb Is Load I L L I V s I V Calulation of modulation Q Index and m Phase V s Detetor α PI Casaded Multilevel Inverter Swithing Pattern Table C C C( M )/ /(M)/ SVG system onfiguration using the asaded multilevel inverter. V i

3 Fig. 4. Vs L i Equivalent iruit of the SVG system. R V IV. DYNAMIC MODELS OF SVG SYSTEM Following [6] the soure voltage v s, output voltage of the multilevel inverter v, and SVG system urrent i an be representedintheαβframe using the abαβ transformation C r / / / / matrix, then by using the synhronous referene frame transformation os sin T (5) sin os v s an be represented by dqoordinate expressions. Thus the equivalent iruit of the SVG system an be represented by d Id L dt I q and ωl Iq I d v s Vsd V sq Id R I q Vs (4) Vsd V d V sq V q (6), (7) where V s is the rms value of the linetoline voltage, and is the phase angle. The instantaneous ative power P flowing into the SVG, and instantaneous reative power Q drawn by the SVG an be represented by P V s I d and Q V s I q, (8) where I d and I q are the ative urrent and reative urrent of SVG respetively. Based on equation (6), in order for the SVG system to generate the desired the ative urrent and reative urrent, the modulation index should be given by the following V d q Vsd ωl Iq d L dt I d RI d V sq ωl Id d L dt I q RIq q V Vd q and m (9) r. () 4 π V. CONTROL SCHEME OF SVGS A asaded multilevel inverter is used as a stati var generator to minimize the nonative power/urrent, whih is shown in Figure. In this work, an RL load is used. The desired reative urrent to be injeted by SVG is obtained by Q V sph I sph sin ( V I ) () I d and I q Q Vsph () where V sph and I sph are the rms value of the phasetophase voltage and urrent of voltage soure. V and I are the phase angles of V sph and I sph separately. The modulation index m is obtained by equation (9) and (). For eah m, swithing angles are omputed offline to eliminate the 5 th and 7 th harmonis (see [][]) and are plotted in Figure 5. Figure 6 shows the THD out to the 49 th harmoni. However, one may note that outside the range m.8 through m.5 and some intervals between m.4 and m.5, there exists no set of swithing angles suh that the fundamental an be ontrolled while at the same time ompletely eliminating the 5 th and 7 th order harmonis. So for modulation indies outside this interval, other swithing shemes an be used, however, they will typially result in a larger THD. A ontrol method is proposed here so that m is operated lose to the value that gives the minimum THD. By equation (), it an be seen that in order to generate the desired output voltage (or desired reative power) with smallest THD, hanging the link voltage of eah level an also fore the modulation index to be in the range.8 through.4 where a solution exists that eliminates the lower order harmonis. In other words, one would not regulate the apaitor voltage to a onstant value, but rather they would be hanged aording to the steadystate operating onditions. Given the Q (or I ), modulation index m is omputed by equations (9) and (). Ifm is in the range.8 through.4, then V. () If m is out of the range.8.4, fix m., then V r r. (4) 4 π m 4 π. A PI ontroller is used to ontrol eah apaitor voltage equal to V. The ontrol priniple an be explained with the aid of Figure 7. In Figure 7, v s is the soure voltage, i is the urrent flowing into the inverter, and v is the multilevel inverter output voltage. v is ontrolled so that it lags or leads v s by α, then the total real power P i flowing between the multilevel inverter and the utility line is P i V sv sin α (5) X L where X L is the impedane of interfae indutor. If v lags v s by α, and P i flows into the multilevel inverter, and the apaitor is harged. If v lags v s by α, and P i flows from the multilevel inverter to the utility line, the apaitor is

4 4 disharged. By ontrolling the harging and disharging of the apaitor voltage, and the apaitor voltage is kept equal to v. Swithing angles (Degree) m inverter is the same. To keep the voltage balaned between the apaitors of eah inverter, the rotated swithing sheme using fundamental frequeny swithing is used, where the swithing patterns are rotated every yle. Figure 8 shows the ontrol logi sheme of rotating the swithing patterns (see [7]). By rotation of the swithing patterns, all apaitors are equally harged and disharged, as well as eah of the swithing devies having the same swithing and urrent stresses. V V V π / π π / π π / π / π π Fig. 5. Swithing angles vs modulation index m for soures multilevel inverter. V π / π π / π Fig. 8. Rotated swithing pattern. Fig. 6. Fig. 7. THD vs modulation index m for soures multilevel inverter. v s v π / π π / π i α Control priniple for the apaitor voltage of multilevel inverter. The swithing angles are omputed in the work [][] assuming the apaitor voltage of eah soure of multilevel VI. SIMULATION RESULTS A mathematial model of a 7level asaded multilevel inverter is built using Matlab/Simulink. A SVG system and the ontrol system is modeled. In this work an RL load is used, soure voltage (rms value of the linetoline voltage) V s 4 V, DC link voltage (initial apaitor voltage) 7V, interfae indutane L C mh, total a resistane R. Ω, and fundamental frequeny f 6Hz. Figure 9 shows the simulation results. By equation () and (), the reative power Q or equivalently the reative urrent I needed to be injeted into the utility system is omputed. This gives Q 5.8 var or desired reative urrent Id, Iq.7 A. In Figure 9, the multilevel inverter is onneted to the utility line at t T.667 S. It an be seen that the voltage and urrent soures are out of phase before the multilevel inverter is onneted. The modulation index m is omputed aording to (), resultsinm.. Sine m is in the range.8 through.4, 7V will suffie. APIontrollerisusedtokeepeahapaitorvoltageat7 V. The PI gain is hosen as K p K I.. From Figure 9, it an be seen after or yles, the soure voltage v s and the i s are in phase. Figures and show the simulation results when the load is hanged. The total reative power Q 6.8 var or desired reative urrent I d,i q.95 A is needed for injetion into the utility line. In Figure, the multilevel inverter is

5 5 onneted to the utility line at t T.667 S. It an be seen that the voltage and urrent soures are out of phase before the multilevel inverter is onneted. The modulation index m is again obtained using (),givingm.49. Sine m is not in the range.8 through.4, thenfix m. and V 85.5 V (by equation (4)). A PI ontroller is again used to hange eah apaitor voltage equal to V, where the PI gain is hosen as K p K I.. From Figures and, after seonds, the soure voltage v s and the soure urrent i s are in phase. 4 VII. CONCLUSIONS A asaded multilevel inverter has been presented for stati var ompensation/generation appliation. This paper has introdued a ontrol strategy to vary the level of the DC apaitor voltage so that use of the stairase swithing sheme (with its inherent low THD) an be appliable for a wider range of modulation indies. The simulation results orresponded well with the predited results t ses t ses Fig.. Soure voltage (saled.) v s and soure urrent i s. REFERENCES [] J. Chiasson, L. M. Tolbert, K. MKenzie, and Z. Du, A unified approah to solving the harmoni elimination equations in multilevel onverters, IEEE Transations on Power Eletronis, vol. 9, pp , Marh 4. [] J. Chiasson, L. M. Tolbert, K. MKenzie, and Z. Du, Control of a multilevel onverter using resultant theory, IEEE Transations on Control System Tehnology, vol., pp , May. [] F. Z. Peng, J. S. Lai, J. W. MKeever, and J. VanCoevering, A multilevel voltagesoure inverter with separate soures for stati var generation, IEEE Transations on Industry Appliations, vol., pp. 8, September/Otober 996. [4] D. E. SotoSanhez and T. C. Green, Voltage balane and ontrol in a multilevel unified power flow ontroller, IEEE Transations on Power Delivery, vol. 6, pp. 7 78, Ot.. [5] L. M. Tolbert and F. Z. Peng, Multilevel onverters as a utility interfae for renewable energy systems, in IEEE Power Engineering Soiety Summer Meeting, pp. 7 74, July. Seattle, WA. [6] F. Z. Peng and J. S. Lai, Dynami performane and ontrol of a stati var generator using asade multilevel inverters, IEEE Transations on Industry Appliations, vol., pp , May 997. [7] L. M. Tolbert, F. Z. Peng, T. Cunnyngham, and J. Chiasson, Charge balane ontrol shemes for asade multilevel onverter in hybrid eletri vehiles, IEEE Transations on Industrial Eletronis, vol. 49, pp , Otober. Fig. 9. Soure voltage (saled.) v s and soure urrent i s t ses Fig.. Soure voltage (saled.) v s and soure urrent i s.