GAPPED ALTERNATE PHASED OPPOSITE DISPOSITION- PULSE WIDTH MODULATION CONTROL FOR MULTILEVEL INVERTERS

Transcription

1 VOL. 9, NO. 4, APRIL 014 ISSN Asian Researh Publishing Network (ARPN). All rights reserved. GAPPED ALTERNATE PHASED OPPOSITE DISPOSITION- PULSE WIDTH MODULATION CONTROL FOR MULTILEVEL INVERTERS Olusola A. Komolafe and Olufemi I. Olayiwola Department of Eletroni and Eletrial Engineering, Obafemi Awolowo University, Ile-Ife, Nigeria ABSTRACT This paper presents a omparative analysis of the harmonis generated in the output waveforms of 3-phase H- bridge asaded multi-level inverter topology using Sinusoidal Pulse Width Modulation (SPWM) tehniques. The Alternate Phased Opposite Disposition- Pulse Width Modulation (APOD-PWM) is one of the best SPWM shemes in ahieving redution in the Total Harmoni Distortion (), whih is the major parameter often used to assess the suitability of an inverter. However, due to the losely set arrier arrangement, the APOD-PWM produes high espeially at ithing frequenies above 1-kHz. In this paper, a Gapped APOD-PWM is proposed. The ithing sequene is similar to the APOD-PWM tehnique, but it has smaller ithing angle. This redues the ithing overlap at boundary positions and hene the. The tehnique was simulated using the MATLAB-SIMULINK toolbox. The output urrent and voltage signals were evaluated and the was omputed using SIMULINK-FFT tool. Results show that the proposed tehnique is able to further redue at all ithing frequenies. Keywords: alternate phased opposite disposition - pulse width modulation, matlab/simulink, GAPOD-PWM, H-bridge,. 1. INTRODUCTION Multi-level inverter topologies have reently attrated more attention due to its high voltage apability, redued ommon mode voltages, near sinusoidal outputs, lower ithing stress [1] and lower rate of hange of voltage with time. Previously, square- and modified square-wave output voltage wave-form inverters were predominant. However, the generated by these inverters before filtering is usually above 65%. When the output waveforms from these inverters are not well filtered, the harmonis often results to heat in the system, whih leads to lower effiieny and eventual failure of the system []. Multilevel inverters are able to redue harmonis by produing stepped waveform whih redues the voltage stress and therefore. There are various multi-level inverter topologies, whih have been extensively disussed in literature, suh as the diode lamped asade (DCC), flying apaitor asade (FCC), H-bridge asade [3, 4] and their hybrid topologies [5, 6]. The DCC and FCC are alternate topologies and utilize lamping diodes or apaitors, whih makes them more omplex to design [7]. The H- bridge asaded topology has modular layout struture and utilizes lesser number of omponents when ompare with the DCC and FCC. They however require more DC soures depending on the number of bridges in the asade design. In order to effetively redue the harmoni distortion that is losely assoiated with ith-mode power supply using multilevel inverter topologies, various modulation tehniques have been proposed. One of the ommonly used multilevel inverter ontrol method is the Sinusoidal Pulse Wave Modulation tehnique. It requires multiple-arriers (usually triangular arriers) whih are usually modulated by a sine wave. The arrier signals an be arranged in different modes to ahieve voltage harmonis redution. The four basi arrier arrangements are disussed by Y. S. Mohammed et al., [8]. The number of arriers used depends on the number of line-voltage levels to be produed. To produe n- voltage levels, (n-1) arriers are required. These arriers are then modulated by a sinusoidal wave at the required line frequeny. A omparison of the Sinusoidal Pulse Width Modulation multi-arrier tehniques for multilevel inverters shows that the effetiveness of eah tehnique is dependent on the modulation tehnique, ithing frequeny, and modulation index [9]. Contrary to the operational norm of inverters at low indies (linear range) as disussed by A. M. Gole [10], it has been shown that higher voltages and redued harmonis an still be obtained at slightly higher modulation indies above m a =1 [11]. J. R. Uthayakumar et al., [1] proposed Carrier Overlap PWM (COPWM) and Varying Frequeny PWM (VFPWM) at modulating frequeny index (m f ) of 40. These tehniques are based on the ontrol freedom degrees for asymmetrial H-bridge topology. Govindaraju et al., [13] also proposed a variation of hybrid phase disposition PWM tehnique and the assoiated ithing losses involved in his tehnique. He was able to redue the at frequeny modulation index of 1, to about 5% in 5-level H-bridge topology. S. A. Bashi et al., [14] also used APOD-PWM tehnique to redue the for 5-level H-asade inverter to about 17% at ithing frequeny of 300Hz and amplitude modulation index m a = 1. The arrangement of the arrier signals in the APOD-PWM tehnique is suh that, modulation at boundary points by the modulating signal reates multiple ithing signals, whih deliver additional harmonis at the boundary points. In this paper a Gapped APOD-PWM is proposed whih is able to further redue the observed harmonis by reduing the ithing ourrenes at the 560

2 VOL. 9, NO. 4, APRIL 014 ISSN Asian Researh Publishing Network (ARPN). All rights reserved. boundary points. The GAPOD-PWM tehnique redues harmonis of the output-phase voltages signifiantly at various ithing frequenies. Results for symmetrial H- bridge topology at ithing frequeny range between 300Hz - 45 khz and modulation index m a =1 is presented. The for 5-level and 7-level H-bridge asade are presented and ompared in this paper.. DESIGN AND OPERATION OF THE H-BRIDGE CASCADE MULTILEVEL INVERTER The three-phase H-bridge asade inverter is shown in Figure-1. The basi arhiteture is extensively disussed by M. K. Vijaya and K. K. C. Deekshit [15]. The ithing devie of hoie is the Insulated Gate Bipolar-Juntion Transistor (IGBT). This is beause of its high power apability and high ithing frequeny harateristis. The symmetrial H-bridge asade inverter topology delivers stairase output voltage using several levels of DC voltages on eah bridge. If n is the number of required voltage levels, then the number of voltage soures n 1 (asades) is given by. Inrease in the number of asaded levels redues the voltage stress at the ithes, so that output waveforms tend to be sinusoidal waveforms with redued harmoni distortion. C S1 S Vd S4 S3 S5 S6 Vd S8 S7 Figure-1. Three Phase 5-level H-bridge asade. The signals to the ithes of the H-bridge are modulated using the APOD and GAPOD-PWM tehnique. These modulation tehniques involve the natural sampling of several arrier signals typially triangular waveforms whih are arranged in vertial/horizontal shifts as defined by the modulation tehnique used and required number of voltage levels to be produed. All the arriers often have the same frequeny and amplitude exept in varying frequeny-pwm proposed by J. R. Uthayakumar et al., [1]. a) H-Bridge signals modulation using alternate phased-opposite disposition - pulse width modulation tehnique The APOD-PWM is a simple modulation tehnique whih is ahievable without the omplex mathematial equations required when using Simple Harmoni Elimination-PWM or Spae Vetor-PWM. The most important onsiderations are the modulator - arrier arrangement and logi ombination for the omparation of signals. In order to obtain a 5-level voltage output inverter, the arrier signals disposition is eletronially measured from the origin (0 volts per division) as shown in Figure-1. Eah arrier has amplitude of 1volts per division, suh that, when n arriers are used, the peak to peak arrier amplitude n V ± =. This implies that, at m a =1, the peak to peak amplitude of the modulating signal n V m ± =. The arrier signals phased arrangement is suh, that they are out of phase to eah other. The ithing angle whih is measured in degrees ( ) and ithing sequene are thus obtained as a result of the signals omparison/modulation logi. The ithing point ours at intersetion points of both the modulating and arrier signal and it determines the turn on/off of the ithes. Where, f is the modulating frequeny and t is the ithing time at the intersetion. The modulating and arrier signals arrangement for the APOD-PWM tehnique is as shown in Figure-. (1) 561

3 VOL. 9, NO. 4, APRIL 014 ISSN Asian Researh Publishing Network (ARPN). All rights reserved. b) H-Bridge signals modulation using gapped alternate phased-opposite disposition-pulse width modulation (GAPOD-PWM) tehnique The proposed GAPOD-PWM tehnique is a variation of the APOD-PWM tehnique in that, the phased arrangement of the arrier signals are maintained. However, additional redution in the voltage stress is obtained by inreasing the degree of freedom of the arrier disposition. The amplitude of the arrier signals is retained at 1 volt per division, while the disposition is measured from desired voltage level. In this paper, the arrier disposition is measured from 1volt per division as shown in Figure-. Also, the 1 volt per division measurement is maintained between eah arrier. This implies that to obtain n-level voltage output, where n-1 arriers are required, the peak to peak arrier amplitude V = ± n and peak to peak amplitude of the modulating signal m a =1. Amplitude in volts (v) Carrier signal Amplitude(volts) ithing point V m = ± n, when time(s) t/ t Modulating signal Figure-. APOD-PWM arrier arrangement. ithing point Carrier signal t/ Modulating signal time(s) Figure-3. Gapped APOD-PWM arrier arrangement. It is observed that sine the value of V m for GAPOD-PWM is higher than that of APOD-PWM; the t pulses produed upon omparison of GAPOD-PWM signals turns on at an earlier time i.e., has smaller ithing angle than when ompared to that of APOD- PWM. The ithing sequene and ithing angle are also obtained as a result of the signals omparison/modulation logi. The signals arrangement for GAPOD-PWM tehnique is shown in Figure-3. ) Basi inverter equations and losses The design of an inverter is done using various indies. These indies are obtained from the various the parameters that ontribute to the effiieny of the inverter. The ithing frequeny is estimated using frequeny modulation index m f whih is given by: f m f = () f m Where, f m is the modulating frequeny and f is the arrier wave frequeny. While the amplitude modulation index is expressed as: Vm ma = (3) V ( n 1) Where, V m is the peak to peak value of the modulating wave and V is the amplitude of the arrier signal. The is measured as the ratio of all the harmonis in a ithing system to the fundamental unit. n A i = = (4) A Where, A i is the i th voltage/urrent harmoni value. Pulse width modulated systems are usually haraterized with power and harmoni losses whih result from the ithing and ondution losses of the ithes/transistors/thyristors that are used [15, 16]. The losses in the modulation tehniques ause the average redution in phase-phase voltages at eah ithing frequenies. An estimate of the power loses (P loss ) in inverter systems an be evaluated as the sum of the ithing loss (P ) and ondution loss (P ond ) [17]. P loss = P + P ond (5) Where P = E f (6) E is ithing energy and f is ithing frequeny. Therefore, higher ithing frequenies, result in higher power losses and also, lower urrent harmonis. 56

4 VOL. 9, NO. 4, APRIL 014 ISSN Asian Researh Publishing Network (ARPN). All rights reserved. The losses in the tehniques used are estimated using the power loss equations below: P V I ond = I V D (7) e = VTO + RCE (8) e I = [ R VTO + RCE ( T T )] thjc RCE 4 jmax R thjc VTO RCE The ithing loss P an be similarly evaluated as: P Where 1 = π ( Eon + Eoff ) f t p D = is the duty yle, t p is the pulse length T (9) (10) V e is the olletor-emitter voltage, I the ontinuous olletor urrent, VTO, RCE, E on, E off are interpolated voltages and resistane parameters from datasheet R thjc = the IGBT juntion-ase thermal resistane V e (sat) = the olletor-emitter saturation voltage, and T j, T = juntion and ase temperature of the ith Figure-4 shows how a single phase of the inverter s three phases is modulated. Other phases are ithed by the same triggering sequene whose sine waves are out of phase by In MATLAB-SIMULINK, the arrier wave soures are set aording to the frequeny and amplitude disposition to be used. The amplitude disposition used for eah triangular arrier period in the modulation tehniques is defined with referene to Figures and 3, as below: Swithes Table-1. Carrier disposition. Modulation tehnique GAPOD-PWM (Volts) APOD-PWM (Volts) S1 and S4 [,1,] [1,0,1] S and S3 [-,-1,-] [-1,0,-1] S5 and S8 [3,4,3] [1,,1] S6 and S7 [-3,-4,-3] [-1,-,-1] The arrier and modulating signals ompared as in Figure-4 above produes modulated signals shown in Figure-5. As shown in Figure-5, the inverted form of signals that is supplied to ithes S1, S, S5 and S6 is supplied to ithes S4, S3, S8 and S7, respetively. These signals turn the IGBTs on and off in a sequene, shown by the ithing matrix in Table-. 3. SIMULATION CIRCUITS AND WAVEFORMS The MATLAB/SIMULINK model for 5-level H- bridge asaded multilevel inverter is shown in Figure-1. The signals modulation logi used to turn the ithes of eah phase on the bridge on/off with either the APOD- PWM or Gapped APOD-PWM arrier arrangement is shown in Figure-4. Figure-5. Pulses from modulated signals. Figure-4. Modulation logi for eah phase. Table-. H-Casade ithing matrix. Swithes Voltage level S1 S S3 S4 S5 S6 S7 S8 V d V d V d V d

5 VOL. 9, NO. 4, APRIL 014 ISSN Asian Researh Publishing Network (ARPN). All rights reserved. Figure-6 shows how the stepped voltage waveform determined by the ithing matrix of Table- in 5-level H-asaded bridge inverter is obtained with a DC supply voltage V d of 13-V. volts(v) Vd Vd 0 time(s) -Vd -Vd Figure-7. 5-level line voltage wave-form. Figure Level Stepped waveform produed using GAPOD-PWM. 4. RESULTS The terminals of the asaded H-bridge topology are star onneted to a three-phase series load. The nominal phase-phase output voltage is 400-V, nominal frequeny is 50Hz, ative power is kw and indutive reative power is 500Var. Figures 7 and 8 shows the obtained line-neutral and line-line voltage waveforms for both APOD-PWM and GAPOD-PWM respetively for m f =6. It is observed that the resultant line-to-line voltage has seven levels and therefore more sinusoidal as ompared with the lineneutral waveform. This implies a redution in the phase harmonis as ompared with the line-neutral voltages. Figure-8. Voltage wave-form for 7-level H-bridge asade. The voltage and urrent s measured at different ithing frequenies are also shown in Tables 3-6 below. m a =1 Table-3. 5-level APOD-PWM. 300 Hz 1.kHz 15kHz 0.5kHz 45kHz V ab (V) I a (A)

6 VOL. 9, NO. 4, APRIL 014 ISSN Asian Researh Publishing Network (ARPN). All rights reserved. m a =1 Table-4. 5-level GAPOD-PWM. 300 Hz 1.kHz 15kHz 0.5kHz 45kHz V ab (V) I a (A) m a =1 Table-5. 7-level APOD-PWM. 300 Hz 1.kHz 15kHz 0.5kHz 45kHz V ab (V) I a (A) m a =1 Table-6. 7-level GAPOD-PWM. 300 Hz 1.kHz 15kHz 0.5kHz 45kHz V ab (V) I a (A) It is observed that at linear modulation range ma =1, the output voltage is given by: Vd 3 V ab b a Where d ( n 1) V = V = V < ( n 1) (11) Figure-9. 5-level omparison for both tehniques. V d is input voltage and n is number of line-neutral voltage levels. GAPOD-PWM yields redued voltage harmonis while APOD-PWM yields slightly preferable urrent harmonis. Also, that voltage harmonis tend to inrease with inreasing ithing frequeny. This an be attributed to the rapid ithing that take plae at boundary points within the modulating system. When the arrier and modulating signals are ompared for both the APOD-PWM and GAPOD-PWM, it is observed that the GAPOD-PWM has shorter boundary omparation period and therefore redues the harmonis at this boundary points. However, the ondution period (duty yle) is slightly inreased and therefore, more ondution loss is observed. Infineon SK06N60 (600V, 6A) [18] igbt is used to estimate the power loss using the two tehniques. All parameters used with the exeption of duty yle and V d are derived from the datasheet (T and T j are taken as 100 o C) (Infineon Tehnologies, 013). Total power loss P loss per ith using both modulation tehniques for the 5- level H-bridge asade is shown in the table below: Figure level omparison for both tehniques. 565

7 VOL. 9, NO. 4, APRIL 014 ISSN Asian Researh Publishing Network (ARPN). All rights reserved. Table-7. Total power loss omparison. Upper bridge ith loss (W) Lower bridge ith loss (W) Swithing frequeny GAPOD-PWM APOD-PWM GAPOD-WM APOD-PWM 300Hz kHz kHz kHz kHz Figure-11. Upper bridge power loss omparison. Figure-1. Comparison of lower bridge power loss. There is therefore need for higher input V d to produe the same phase output AC voltage. 5. CONCLUSIONS The results presented above shows redution in voltage and urrent both at all ithing frequenies and when the number of asade is inreased for both modulation tehniques. Also, Gapped APOD-PWM tends to yield more voltage redution at lower frequenies. APOD-PWM generally yields better urrent at all frequenies than Gapped APOD-PWM. Therefore, Gapped APOD-PWM an be very effetive for voltage-fed systems that do not neessarily require high ithing frequenies suh as inverters and voltage-fed indution drives. APOD-PWM on the other hand is more effetive for urrent fed systems and drives. 566

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