ThreePhase NPC Inverter Using ThreePhase Coupled Inductor


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1 ThreePhse NPC Inverter Using ThreePhse Coupled Inductor Romeu Husmnn 1, Rodrigo d Silv 2 nd Ivo Brbi 2 1 Deprtment of Electricl nd Telecommuniction Engineering, University of Blumenu FURB Blumenu SC Brzil, 2 Federl University of Snt Ctrin UFSC, Power Electronics Institute INEP Florinopolis SC Brzil, Abstrct A new NPC threephse inverter with threephse coupled inductor is presented in this pper. Initilly the power stge digrm is shown nd discussed. Their min chrcteristics re described nd the more relevnt wveforms, generted by simultion, re shown. Next, the employed modultion nd converter opertion re discussed nd some relevnt figures re presented. After tht, the presence of the threephse coupled inductor to provide significnt reduction in hrmonic distortion is discussed. Finlly, experimentl results obtined from the implemented prototype re presented nd briefly discussed. I. INTRODUCTION Severl used techniques exist to increse the processed power in the sttic converters; mong them it is possible to mention prllelism, interleving, multilevel converters nd inductive coupling cells. The use of coupled inductors pplied in prllel connections of conventionl inverters is presented in [1]. In this topology the legs re connected in prllel lwys in pirs to obtin current division in the semiconductors. Beyond reducing the current stresses, the converter lso provides reduction of the hrmonic content in the output voltge. The use of multilevel coupled inductors in singlephse boost rectifiers is presented in [2]. A comprtive study between coupled inductors nd the interleving technique is presented. Topologies with 3, 4 nd 5 levels re shown nd the dvntge of the converter with 4 levels is pointed out. The fourlevel coupled inductor hs 3 identicl coils nd therefore it is possible the use of the threephse commercil mgnetic core. Another solution for high power sttic converters is the use of voltge/current multilevel converters. As chrcteristics they present reduction of the voltge/current stress on the switches nd multilevel output voltge/current nd these cn be obtined by three techniques: the series/prllel switches ssocition, the ssocition of multilevel commuttion cells nd the converters ssocition [3]. The concept of threestte commuttion cells is presented in [4], nd it is bsed on the twostte commuttion cell shown in [5]. The min chrcteristics of the threestte cell re the division of the current who flows through the switches nd the frequency multipliction of the lod voltge. These chrcteristics llow improvement of the losses distribution nd volume reduction of the output filter. The fourstte commuttion cell is shown in [6] nd [7] nd consists of three switches, three diodes nd threephse Y connected trnsformer. The commuttion cell is formed with the substitution of the 2 sttes cell, shown in [5], for 3, 4 or n sttes cell, mintining the other elements of the converter. The ppliction of commuttion cells is treted in [1], [2], [4], [6] nd [7]. The use of the foursttes switching cell in single phse inverter is first presented in [6] nd lter in [2]. In this structure the frequency t the output filter is triple the switching frequency nd the switches current is blnced nd equl to 1/3 of the output current. Applying the four sttes commuttion cells in multilevel converters it is possible to dd the dvntges of both. The most ttrctive chrcteristics of multilevel converters re the multilevel output voltge with low hrmonic distortion, the input current drined with low distortion nd the low common mode voltge [3]. Amongst the multilevel converters presented in the literture the threelevel NPC is one of the most rgued. It is composed of four switches connected in series nd two diodes. Ech switch is submitted to the hlf of the dc link voltge [8], [9]. Modultion techniques re presented in [3]. These techniques provide the common mode voltge elimintion in converters with odd level numbers, nd this llows the reduction of the electromgnetic interference. The use of coupled inductors in NPC inverters is known, the novelty is the use of the four sttes commuttion cell ssocite to the PWM strtegy in the NPC converter. II. TOPOLOGY PRESENTATION The threephse threelevel NPC inverter with coupled inductor is presented in Fig. 1. The mentioned converter hs 18 diodes, 36 controllble switches nd their respective freewheeling diodes tht, for the ske of simplifiction, re represented by bidirectionl switches. Switches S11 to S112 constitute the phse, switches S21 to S212 constitute the phse b nd switches S31 to S312 constitute the set of ctive switches of phse c. Ech set of switches tht constitutes one of the threephse leg is connected to the lod through symmetric threephsed coupled inductor. The high frequency component on the lod voltges is three times the switching frequency; this results in reduction of the size nd the cost of the output filter /9/$ IEEE 913
2 S11 S15 S19 D11 D13 D15 S12 S16 S S21 S25 D21 D23 S22 S26 S29 D25 S21 S31 D31 S32 S35 D33 S36 S39 D35 S31 between the point nd the middle point of the power sources hs 7 levels, thus chnge of 3 to 7 levels in the V voltge is obtined. In Fig. 3() nd Fig. 3(b) the simultion results of the V voltge nd the common mode voltge re shown, respectively. S13 D12 S17 D14 S111 D16 S23 D22 S27 D24 S211 D26 S33 D32 S37 D34 S311 D36 S14 S18 S112 S24 S28 S212 S34 S38 S312 V 1 V 2 V3 V V b b c V n V n n Fig. 1. Power stge of the threephse converter. Another chrcteristic of this structure is the incresing of the lod voltge levels, thus contributing to reduce the common mode voltge when compred with stndrd structures. Moreover, in motor drives without output filter, significnt voltge steps reduction occurs in the motor windings, minimizing problems with isoltion, iron losses, torque ripple nd bering currents. The use of the threephse coupled inductor llows the division of the lod phse current through the switches, in blnced wy so tht the current in ech rm of the converter is equl to 1/3 of the lod current in one phse, reducing the current vlues for the switches. The threephse converter ws simulted with modultion index equl to.9, switching frequency of 9 khz nd symmetricl tringulr crriers shifted by 12. The simultion results re presented in Fig. 2, Fig. 3 nd Fig. 4. From the results of simultion shown in Fig. 2, it is possible to verify tht the line lod voltge hs 13 levels; this fvors the hrmonic content reduction nd minimizes the size of the output filter. Fig. 2. Lod line voltge Vb in Fig. 1. The voltges V 1, V 2 nd V 3 in Fig. 1 hve two components: one of them is zerosequence voltge in the low frequency; the other voltge forms blnced threephse system which opertes t switching frequency. This brings bout null impednce of the inductor for the zerosequence component voltge. The relted voltges hve three levels nd re pplied to the threephse coupled inductor; the voltge Fig. 3. Simultion results: () V voltge in Fig. 1; (b) common mode voltge Vn in Fig. 1. It is verified from the simultion results in Fig. 4 tht the lod current is divided in blnced wy in the three windings of the coupled inductor. Ech prt of the current is processed for n rm of the converter. This llows the use of switch with lower current cpcity nd esier dissiption of the het produced by the semiconductors by distributing the losses. Fig. 4. Simultion results of the coupled inductor currents: () totl current in phse; (b) current in the three windings of the coupled inductor. III. EMPLOYED MODULATION AND CONVERTER OPERATION The modultor for the threephse structure is formed by 18 comprtors, which schemtic digrm is presented in Fig. 5. The employed modultion is the sinusoidl PWM levelshifted POD phse opposite disposition. The crriers Vtri 1, Vtri 3 nd Vtri 5 re symmetricl tringulr crriers shifted by 12 ; the crriers Vtri 2, Vtri 4 nd Vtri 6 re symmetricl tringulr crriers shifted by 12 nd shifted by 18 from Vtri1, Vtri3 nd Vtri5 respectively. The sinusoidl modulte signls re Vsin 1, Vsin 2 nd Vsin 3, shifted by /9/$ IEEE 914
3 possible to observe tht the high frequency of the V voltge is three times the switching frequency. Fig. 5. Modultor for the threephse converter. In Fig. 6 it is possible to observe four wveforms groups. In the first group, the crriers nd sinusoidl modulting signls re shown to switching period. In the second nd the third groups the switches signls from phse nd phse b re presented. In the lst group, the lod line voltge V b nd the voltges V nd V b re presented. { Crriers nd modulting signls { Switches signl commnds: phse { Switches signl commnds: phse b Vcc 2Vcc/3 Vcc/3 Vcc/3 Vtri 1 Vtri 3 Vtri 5 Vs11 Vs11 Vsin 2 Vs12 T Vs15 Vsin 1 Vtri 2 Vtri 4 Vtri 6 Vs22 Vs29 Vs21 Vs26 V b V V b Vsin 3 Vs19 Vs21 Vs16 Vs25 Fig. 6. Representtive wveforms for switching period. The wveforms produced in the midpoint of ech rm of the converter to the midpoint of DC power supplies re given by Fig. 7. The relted figure shows lso the V voltge. It is Fig. 7. Relevnt wve forms: () V 1 voltge; (b) V 2 voltge; (c) V 3 voltge nd (d) V voltge. Other relevnt wveforms re shown in Fig. 8 which presents the lod line nd the common mode voltges. The lod line voltge hs 13 levels with Vcc/6 steps vlue. The common mode voltge V n hs 5 levels with Vcc/18 steps vlues. This implies in reduced electromgnetic interference. Fig. 8. Relevnt wveforms: () Line lod voltge V b ; (b) Common mode voltge V n. Ech rm of the converter hs three possible sttes, therefore the commnd of the switches is complementry nd it will lwys hve two switches commnded to conduct in ech rm. This implies in 27 possible topologicl sttes shown in Fig. 7 for the structure of one of the phses of the converter, nd possible topologicl sttes when considering the 9 rms of the threephse structure. The 27 different topologicl sttes result in 7 distinct levels of V voltge, therefore some topologicl sttes re redundnt in terms of the line lod voltge. The representtion of the vilble lod line voltge vectors is presented in Fig. 9. The vector mp is formed by 343 vectors joined in 56 groups nd 7 zerovectors. Ech group is formed by 6 vectors shifted by /9/$ IEEE 915
4 Fig. 9. Avilble vectors in the threephse converter. The verge voltge vlue on the coupled inductor winding must be null in ech switching period of the converter, so tht it does not hve sturtion of the inductor or significnt unblnce in the winding currents. From the presented topologicl sttes shown in Fig. 1 it is possible to determine the vlues of the lod voltge nd inductor winding voltges. Tble 1 presents ll the V voltges for ech topologicl stte for one phse of the converter. TABLE I V voltge for the different topologicl sttes. Topologicl stte V[V] 8 16, 17, 18 Vcc/3 1, 2, 3, 25, 26, 27 Vcc/6 9, 1, 11, 12, 13, 14, 15 4, 5, 6, 22, 23, 24 Vcc/6 19, 2, 21 Vcc/3 7 (1) (2) (3) (4) (5) (6) (7) (8) (9) (1) (11) (12) (13) (14) (15) 2 v (16) (17) (18) (19) (2) (21) (22) (23) (24) (25) (26) (27) Fig. 1. Possible topologicl sttes for one phse of the converter /9/$ IEEE 916
5 IV. HARMONIC DISTORTION The presence of the threephse coupled inductor provides significnt reduction in hrmonic distortion; this fct is due to the hrmonic cncelltion. The modultor for one phse of the converter consists of six comprtors. The threephse voltges pplied to the inductor hve two components: zero sequence voltge in low frequency, nd nother one tht forms threephse blnced system t the switching frequency. The circuit shown in Fig. 11 represents phse of the threephse converter. Voltges V 1, V 2 nd V 3 hve rectngulr form s shown in Fig. 8(), Fig. 8(b) nd Fig. 8(c) cn be expressed s fundmentl sinusoidl component plus the sum of hrmonics. Fig. 11. Equivlent circuit of phse from the threephse converter. The circuit of Fig. 11 cn be nlyzed in two seprted forms: one contining only the sinusoidl voltge sources V 1, nd nother one contining the only the voltge sources of the hrmonics components V 1h, V 2h nd V 3h. Considering only de voltge source V 1, the threephse coupled inductor is subjected only to the zero sequence voltge. Since the system is symmetric nd considering the bsence of dispersion, the threephse coupled inductor behves s short circuit to the zero sequence voltge component. By inspection it is possible to observe tht: V = V1 (1) The equivlent circuit with the hrmonic voltge sources is shown in Fig. 12. Fig. 12. Circuit contining only the hrmonics voltge sources. From the circuit of Fig. 12 we cn sy tht Iht = I1 h I2h I3h (2) Where I ht totl hrmonic current; I 1h, I 2h e I 3h hrmonics currents in the coils 1, 2 nd 3 of the coupled inductor respectively. The equtions of the inductor coils voltges re shown in (3), (4) nd (5). Ldi 1 Mdi2 Mdi3 Vx = (3) dt dt dt Mdi1 Ldi2 Mdi3 Vy = (4) dt dt dt Mdi1 Mdi2 Ldi3 Vz = (5) dt dt dt Where V x, V y e V z voltges in coils 1, 2 nd 3 of the coupled inductor respectively; L inductnce of ech coil of the coupled inductor; M mutul inductnce between the coils of the coupled inductor. The lod voltge cn then be written s shown in (6). 3 Vh= V1 h V2h V3h ( Vx Vy Vz) (6) The coils voltges of the inductor re described by(7). di1 di2 di3 Vx Vy Vz = L dt dt dt (7) di1 di2 di3 2M dt dt dt Or diht Vx Vy Vz = ( L 2 M) dt (8) For the idel threephse inductor: L M = (9) 2 Soon L 2M = (1) This implies tht Vx Vy Vz = (11) The substitution of (11) in (6) results: V1 h V2h V3h Vh = (12) 3 Or V1 h V2h V3h V h= (13) 3 Voltges in the midpoint of ech rm shown in Fig. 9 cn be represented s: V1 () t = V11 V1 h (14) V2 () t = V21 V2h (15) V3 () t = V31 V3 h (16) The resulting voltge on the lod considering one phse of the converter is then the sum of the voltges of the midpoint of ech rm. The eqution (17) shows tht the hrmonics contents in the lod voltge will lwys be multiple of 3 when compred to the switching frequency. Vh= V3sin 3ω st V6sin 6ωst V9sin 9 ωst... (17) The evlution of the hrmonic distortion of the V voltge ccording to the modultion index is shown in Fig. 13. The relted nlysis ws performed by numericl simultion, /9/$ IEEE 917
6 nd compring the hrmonic distortion of two converters: the NPC converter with coupled inductor nd the NPC without coupled inductor. Fig. 13 Evolution of the hrmonic distortion of the V voltge ccording to the modultion index. V. EXPERIMENTAL RESULTS Experimentl results were obtined from singlephse prototype opertes s inverter. The presence of the seven voltge levels in the V voltge cn be clerly observed in Fig. 14(), thus proving the theoreticl nlysis nd the simultion previously presented. Fig. 14. () V voltge; (b) V 1 voltge. Fig. 15. () Phse lod current; (b) current in one inductor winding. The phse current nd the current in one of the winding of the coupled inductor is shown in Fig. 15. It is possible to observe tht the current in the winding is bout 1/3 of the phse current. The switching frequency dopted ws 9 khz, the DC link voltge ws 3V nd the modultion index ws.9. The switches gte signls were generte by the digitl signl processor TMS 32F288 from Texs Instruments. VI. CONCLUSION A new threephse DCAC multilevel converter is presented. This converter uses threephse coupled inductor to produce multilevel PWM voltge wveforms on the lod. The more relevnt wveforms re presented long with theoreticl nlysis. The results obtined from numericl simultion confirm the theoreticl nlysis performed. It is possible to verify the low hrmonic content on the lod voltge from the multilevel voltge produced, nd s consequence mjor reduction in volume nd cost of the output filter. Another fctor tht fvors the reduction of the volume of the filter is the fct tht the lod voltge frequency is three times the switching frequency. It is shown the blnced current division of ech phse in ech rm of the converter, provided by the use of threephse coupled inductor, bringing s benefit the reduction of losses in the switches nd llowing the use of semiconductors with lower current cpcity. This work do not intended to present n economicl nlysis, however, the uthor understnd the importnce of this subject in future works. REFERENCES [1] F. Ued, K. Mtsui, M. Aso, K. Tsuboi, PrllelConnections of Pulsewidth Modulted Inverters Using Current Shring Rectors, IEEE Trnsctions on Power Electronics, vol. 1, no. 6, pp , November [2] J. Slmon, A. knight, J. Ewnchuk, N. Noor, MultiLevel Single Phse Boost Rectifiers using Coupled Inductors, Power Electron. Specil. Conf. PESC, pp , June 28. [3] J. Rodríguez, JS. Li, F. Z. Peng. Multilevel inverters: survey of topologies, controls, nd pplictions IEEE Trns. on Industry Applictions, vol. 49, no.4, pp , August 22. [4] G. V. T. Bscope, I. Brbi, Genertion of fmily of nonisolted DC DC PWM converters using new threestte switching cells, Power Electron. Specil. Conf. PESC, vol. 2, pp , June 2. [5] V. Vorperin, Simplified Anlysis of PWM Converters Using Model of PWM Switch Prt II: Discontinuous Conduction Mode, IEEE Trnsctions on Aerospce nd Electronic Systems, vol. 26, pp My 199. [6] M. T. Perç, I. Brbi, The Genertion of DCDC Converters using new ThreeTerminl MultipleStte Cells, Power Electron. Specil. Conf. PESC, 25, pp [7] M. T. Perç, I. Brbi. Four Level HlfBridge Inverter Bsed on the yδ Four Stte Switching Cell, presented t the 9 th. Brzilin Power Electron. Conf. (COBEP 27), Blumenu, Brzil, 27. [8] R. H. Bker. Bridge converter circuit Exxon Reserch & Engineering Compny, Florhm Prk, N. J. U. S. Ptent, [9] A. Nbe, I. Tkhshi, H. Akgi. A new neutrlpointclmped PWM inverter IEEE Trns. on Industry Applictions, vol. IA17, no. 5, pp , September/October [1] H. Zhng, A. v. Jounne, S. Di, A. K. Wllce, F. Wng. Multilevel inverter modultion schemes to eliminte commonmode voltges IEEE Trns. on Industry Applictions, vol. 36, no. 6, pp , November/December /9/$ IEEE 918
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