Switching Algorithms for the Dual Inverter fed Open-end Winding Induction Motor Drive for 3-level Voltage Space Phasor Generation

Transcription

1 S.Srinivs et l: Swithing Algorithms for the Dul Inverter fed... Swithing Algorithms for the Dul Inverter fed Open-end Winding Indution Motor Drive for 3-level Voltge Spe Phsor Genertion S. Srinivs nd V.. Somsekhr 2 Abstrt An open-end winding indution motor, fed by two 2-level inverters onneted t either end produes spe vetor lotions, identil to those of onventionl 3-level inverter. In this pper, two swithing lgorithms re proposed to implement spe vetor PWM for the dul inverter sheme. he proposed lgorithms do not employ ny look-up tbles. he time onsuming tsk of setor identifition is ltogether voided in both these lgorithms. he proposed lgorithms employ only the instntneous referene phse voltges for the implementtion of the spe vetor PWM. An equl swithing duty for both the inverters is lso ensured with one of the proposed PWM strtegies. Also, it is observed tht the zero-sequene voltge in motor phses is signifintly redued with the proposed PWM strtegies. Keywords - Open-end winding indution motor drive, dul-inverter system, V/f ontrol, spe vetor modultion I. INRODUCION hree-level inversion hs been extensively reserhed in the pst nd severl iruit topologies were suggested. Of these topologies, the neutrl point lmped topology [], the flying pitor topology [2] nd the H-bridge topology [3] hve beome populr. Reently, iruit onfigurtion to obtin three-level inversion by sding two 2-level inverters hs lso been suggested [7]. Stemmler s pioneering work hs shown tht three-level inversion n be hieved by the open-end winding onnetion of n indution motor with two two-level inverters feeding the motor from either end [4]. In this work [4], sine-tringulr modultion tehnique is employed for the ontrol of inverters. Vrious derivtives of this power iruit nd/or the ssoited PWM shemes re lso reported in the reent pst [6]-[4]. he inverters my be ontrolled with spe vetor modultion tehnique s it improves the DC-bus utiliztion ompred to the sinetringle modultion tehnique. A spe vetor modultion tehnique for the open-end winding topology hs been suggested in [6]. In this work [6], the implementtion of spe vetor modultion requires setor identifition, whih is time onsuming tsk. Further, this swithing sheme employs lookup tbles, enhning the memory requirement with typil Digitl implementtion. Digitl ref: A74,2 Deprtment of Eletril Engineering, Ntionl Institute of ehnology-wrngl. Andhr Prdesh, INDIA. Pin: emil: srsrini@nitw..in he pper first reeived on 5 Ot 26 nd in revised form 24 April 27. In this pper, two spe vetor modultion tehniques re suggested, whih obvite the need for the setor identifition. Also these PWM shemes do not employ ny look-up tble, thus reduing the memory requirement. his setion gives generl bkground nd review of the pper or work done by other engineers in the field. It should be well supported by ittions. Moreover, the ittions re served s guide for those who wnt to lern more bout the field. Fig. shows the bsi open-end winding indution motor drive operted with single power supply. he symbols v AO, v BO nd v CO denote the pole voltges of the inverter-. Similrly, the symbols v A O, vb O nd v C O denote the pole voltges of inverter-2. he spe vetor lotions from individul inverters re shown in Fig.2. he numbers to 8 denote the sttes ssumed by inverter- nd the numbers through 8 denote the sttes ssumed by inverter-2 (Fig.2). ble- summrizes the swithing stte of the swithing devies for both the inverters in ll the sttes. In ble-, + indites tht the top swith in leg of given inverter is turned on nd - indites tht the bottom swith in leg of given inverter is turned on. As eh inverter is pble of ssuming 8 sttes independently of the other, totl of 64 spe vetor ombintions re possible with this iruit onfigurtion. he spe vetor lotions for ll spe vetor ombintions of the two inverters re shown in Fig.3. In Fig.3, OA represents the DC-link voltge of individul inverters, nd is equl to V / 2 while OG represents the DC-link voltge of n equivlent single inverter drive, nd is equl tov. Fig.: he primitive open-end winding indution motor drive 96

2 Asin Power Eletronis Journl, Vol., No., Aug 27 4(-++) 3(-+-) 8(---) 7(+++) 2(++-) 5(--+) 6(++-) V /2 (+--) 4 (-++) 3 (-+-) 8 (---) 7 (+++) 2 (++-) 5 (--+) 6 (++-) V /2 Fig. 2: Spe vetor lotions of inverter- (Left) nd inverter-2 (Right) (+--) flow s it is denied pth. Consequently, the zerosequene voltge ppers ross the points O nd O. he zero-sequene voltge resulting from eh of the 64 spe vetor ombintions is reprodued in ble-2 from [6] to filitte n esy referene. In Fig.5, the vetor O represents the referene vetor (lso lled the referene smple), with its tip situted in setor-7 (Fig.3). his vetor is to be synthesized in the verge sense by swithing the spe vetor ombintions situted in the losest proximity (the ombintions situted t the verties A, G nd H in the present se) using the spe vetor modultion tehnique. In the work reported in referene [7], the referene vetor O is trnsformed to O in the ore hexgon ABCDEF by using n pproprite oordinte trnsformtion, whih shifts the point A to point O. In the ore hexgon, the swithing timings of the tive vetors OA, OB nd the swithing time of the null vetor situted t O to synthesize the trnsformed referene vetor O re evluted. he swithing lgorithm desribed in referene [5] is employed to evlute these timings. hese timings re then employed to produe the tul referene vetor O situted in setor-7 by swithing mongst the swithing Fig.3: Resultnt spe vetor ombintions in the dul-inverter sheme ble : Swithing sttes of the individul inverters Stte of Swithes Stte of Swithes Inverter- turned on Inverter-2 turned on ( + - -) S 6, S, S 2 ( + - -) S 6, S, S 2 2 ( ) S, S 2, S 3 2 ( ) S, S 2, S 3 3 ( ) S 2, S 3, S 4 3 ( ) S 2, S 3, S 4 4 ( ) S 3, S 4, S 5 4 ( ) S 3, S 4, S 5 5 ( ) S 4, S 5, S 6 5 ( ) S 4, S 5, S 6 6 ( ) S 5, S 6, S 6 ( ) S 5, S 6, S 7 ( ) S, S 3, S 5 7 ( ) S, S 3, S 5 8 ( ) S 2, S 4, S 6 8 ( ) S 2, S 4, S 6 Fig. shows the bsi open-end winding indution motor drive. It nnot be operted with single power supply, due to the presene of zero-sequene voltges (ommonmode voltges) [5], [6]. Consequently, high zerosequene urrent would flow through the motor phse windings, whih is deleterious to the swithing devies nd the motor itself. o suppress the zero-sequene omponents in the motor phses, eh inverter is operted with n isolted - power supply s shown in Fig.4. From the Fig.4, when isolted DC power supplies re used for individul inverters, the zero-sequene urrent nnot Fig. 4: he open-end winding indution motor drive with two isolted power supplies ble 2: Zero-sequene voltge ontributions in the differene of the pole- voltges of individul inverters -V /2 -V /3 -V /6 V /6 V /3 V / , 3 4 8, , , 4 7 4, 6 2, , 5 5, 5 3, 3 5, 3 3, 4 4, 5, 3, , 5, 3, 6 4, 2 4,, 6 6, 6 2, 2 6, 2 2, , 3 8, 4 5, 4 3 4, 8 6 5, , , 6 2,

3 S.Srinivs et l: Swithing Algorithms for the Dul Inverter fed... he spe vetor ombintions t the sub-hexgonl enter A re given by the tive vetor to whih inverter- is lmped (in this se to stte-) nd the null vetors of inverter-2 (sttes 8 nd 7, ble-) respetively. 4. All the seven lotions of given sub-hexgonl enter (i.e. six verties nd the orresponding sub-hexgonl enter) show redundny of spe vetor ombintions. For the sub-hexgon OFSGHB, the spe vetor ombintions for these seven lotions my lterntively be obtined by lmping inverter-2 to stte 4 (-++) while inverter- ssumes ll the eight sttes. 5. Of the 2 spe vetor ombintions with ommonmode voltge ontribution of zero, 8 re loted t the origin O (ble-2, Fig.3). herefore, ny PWM strtegy tht mkes good use of these sttes is expeted to use redution in the zero-sequene voltges, in the differene of the pole-voltges of respetive inverters. Fig.5: Resolution of the referene voltge spe vetor in the middle nd outer setors ombintions vilble t the verties A, G nd H. he ltter step requires lookup tble in whih the spe vetor ombintions vilble t eh spe vetor lotion re stored. hus, it is evident tht with this swithing lgorithm, the ontroller negotites onsiderble omputtionl burden primrily beuse of setor identifition nd oordinte trnsformtion. Also, there is need requirement for lookup tbles, enhning the memory requirement. Further, the zero-sequene voltge in the differene of the respetive pole voltges of individul inverters (whih is dropped ross the points O nd O in Fig.4) is lso high with this PWM sheme. II.PROPOSED PWM SRAEGIES he proposed PWM strtegies re bsed on the following observtions:. he resultnt spe vetor lotions in the dul-inverter sheme (Fig.3) re obtined by superposing the spe vetor lotions resulting from inverter-2 (i.e. by superposing the enter of the right hexgon, Fig.2) t eh spe vetor lotion used by inverter- (left hexgon, Fig.2). Alterntively, the spe vetor lotions of the resulting dul inverter sheme my be obtined by superposing the enter of the left hexgon t eh of the spe vetor lotions of the right hexgon. 2. Aprt from the ore hexgon ABCDEF entered round O, there exist six outer sub-hexgons nmely OBHGSF, OCJIHA, ODLKJB, OENMLC, OFQPND nd OASRQE entered round the points A, B, C, D, E nd F respetively. For the rest of this pper, they re referred to s sub-hexgonl enters. 3. he spe vetor ombintions t the verties nd t the enter of given sub-hexgon re obtined by lmping one inverter to given stte while the other inverter ssumes ll the eight sttes. For exmple, the spe vetor ombintions t the verties of the sub-hexgon OFSGHB (entered round the point A, Fig.3), re obtined by lmping inverter- to the stte of (+--), while inverter-2 ssumes the sttes to 6 respetively. he following PWM strtegies re proposed in this pper: he Deoupled PWM strtegy he Bising inverter PWM strtegy III. HE DECOUPLED PWM SRAEGY his PWM strtegy is bsed on the ft tht the referene voltge spe vetor V sr n be synthesized with two equl nd opposite omponents V sr /2 nd -V sr /2, by subtrting the ltter omponent from the former. It is lso bsed on the observtion tht the effet of pplying vetor with inverter- while inverter-2 ssumes null stte is the sme s tht of pplying the opposite vetor with inverter-2 while inverter- ssumes null stte. Figure 6 shows the method of this PWM strtegy. It is worth noting tht the phse xes of the motor viewed with referene to individul inverters re in phse opposition. In Fig.6, the vetor O represents the tul referene voltge spe vetor tht is to be synthesized from the dul-inverter system nd is given by V sr. his vetor is resolved into two equl nd opposite omponents O (V sr /2 ) nd O 2 (V sr /2 8º + ). he vetor O is synthesized by inverter- in the verge sense by swithing mongst the sttes (8--2-7) while the vetor O 2 is reonstruted by inverter-2 in the verge sense by swithing mongst the sttes ( ). he bsi swithing lgorithm desribed in referene [5] for the lssil se of 2-level inverter feeding n ordinry indution motor is extended for the dul-inverter system to ompute the swithing timings for individul inverters. hese two strtegies re desribed in detil in the following sub-setions. his lgorithm [5] uses only the instntneous phse referene voltges nd is bsed on the onept of effetive time. he effetive time is defined s the time 98

4 Asin Power Eletronis Journl, Vol., No., Aug 27 Fig.6: he deoupled PWM strtegy for whih the inverter supplies power to the motor in given smpling time period nd is denoted s eff.he smpling time period is denoted s s. he instntneous phse referene voltges re obtined by projeting the tip of the referene vetor V sr on to the respetive phse xes nd multiplying the vlues of these projetions with ftor of (2/3). hese instntneous phse referene voltges re denoted s v, v nd v. his lgorithm omplishes the utomti genertion of the gting pulses for the individul swithing devies while pling the effetive time extly t the enter of given smpling time period. he symbols g, nd gb respetively g denote the time durtion for whih given motor phse is onneted to the positive ril of the input DC power supply of the inverter in the given smpling time period s. he timings g, gb nd g re termed s the phse swithing times. he proedure to generte the gting pulses for the individul devies using this lgorithm in setor- is pitorilly depited in Fig.7. A similr proedure is dopted for ll the other setors. In the ontext of dul inverter drive, there exist two sets of phse swithing times, one for eh inverter. he timings g, nd orrespond to inverter- while the gb g timings, nd orrespond to inverter-2. he g gb g instntneous referene phse voltges v, vb nd v orrespond to the tul referene spe vetor V sr of the dul-inverter system. As individul inverters operte with the referenes V sr /2 nd -V sr /2 respetively, it follows tht the orresponding phse referenes re given by, v / 2, v / 2 nd v / 2 for inverter- nd / 2, b v b / 2 nd v / 2 for inverter-2. hese referenes re then employed to determine the phse swithing timings of eh inverter using the forementioned swithing lgorithm [8]. It n be shown mthemtilly tht the phse swithing times of the inverters re relted by (the proof of this result is presented in ppendix-a): g = s ; g b gb = s gb ; v g = s g Fig.7: Genertion of swithing sequene with lgorithm reported in referene [8] hus, the phse swithing timings need not be exlusively omputed for inverter-2. Both inverters re operted with the sme sequene so tht the null vetor ombintions re 88 nd 77. From tble-, it my be noted tht these two ombintions result in the zero-sequene voltge tht is zero. If one inverter is operted with on-sequene nd the other with off-sequene, the null vetor ombintions would be 87 or 78. From tble-2 it is evident tht the zero-sequene voltge of the differene of the polevoltges is mximum for these two ombintions. It is interesting to note tht this zero-sequene voltge is muh lesser with this lgorithm thn the lookup tble pproh used in [6]. his is beuse the ombintions 87 nd 78 re used extensively with tht pproh [6]. he merit of the deoupled ontrol is tht there is no omputtionl burden on the ontroller nd is therefore menble to be used with slower ontrollers (proessors) nd possibly the redued zero-sequene voltge in the differene of polevoltges. However, in this pproh, both inverters re to be swithed. IV. EXPERIMENAL VERIFICAION FOR HE DECOUPLED PWM SRAEGY he performne of the dul-inverter sheme is first evluted with simultion studies using MALAB nd the indution motor is operted with the V/f ontrol sheme. he experiment is performed on H.P. open-end winding indution motor with V/f ontrol nd the gting signls to the dul-inverter re generted with MS32F24 Digitl Signl Proessor. A fixed number of smples (48) re employed for the implementtion of the spe vetor modultion per yle in the entire rnge of opertion. his mens tht the smpling time period is vrible quntity. In the present se, the number of smples used per yle is 48. his mens tht the ngulr displement between suessive smples is 7.5 (36/48). Fig.8 shows typil smple. his is the 4 th smple from the beginning of the yle nd ours t = 22.5 (Fig.6). he modultion index, denoted s m i, is given byv / V. It my be noted from Fig.8 tht g + sr = g s s mentioned erlier. herefore, the phse timings for inverter-2 need not be evluted seprtely. hey re obtined simply by subtrting the timings of the orresponding phses from s. 99

5 S.Srinivs et l: Swithing Algorithms for the Dul Inverter fed... For exmple, the normlized third hrmoni omponent is bout.4 p.u. with the strtegy dopted in [7], while it is only bout.2 p.u. (Fig.6) with the deoupled ontrol of the dul-inverter sheme for the sme modultion index of mi=.4. It my be noted from Fig.6 tht, prt from the fundmentl, the 47th nd the 49th hrmonis re dominnt s the smpling frequeny is 48 times the frequeny of the fundmentl omponent. he orresponding wveforms for modultion index of m i =.7 re shown through Fig.8 to Fig.25. Fig.8: A typil smple with deoupled ontrol he top tres of Fig.9 show the gting signls of the top devies of the A-phse legs of the individul inverters for m i =.4. he bottom tre of the sme figure shows the differene of the two pole voltges, whih ontins signifint zero-sequene voltge. Fig. shows the simulted (left) nd experimentlly obtined (right) results of the pole voltges for phse-a of the inverter- nd Fig. show the sme for inverter-2 both for modultion index of m i =.4. Fig.2 shows the differene of these pole voltges nd Fig.3 shows the simulted nd experimentlly obtined result of the tul motor phse voltge for m i =.4. Of these, the ltter wveform is obtined fter the subtrtion of the ommon-mode voltges from the differene of pole voltges shown in Fig.2. As isolted DC power supplies re employed in the present se, the zero-sequene voltge is dropped between the negtive bus terminls of the individul inverters. Fig.4 shows the simulted nd experimentlly obtined results of the zero-sequene voltge. Figure 5 shows the experimentlly obtined motor phse urrent t no-lod for the sme m i of.4. Figures 6 nd 7 respetively shows the normlized hrmoni spetr of the differene in pole voltges nd tul motor phse voltge presented in Fig.2 nd 3. It is seen from Fig.6 tht the zero-sequene voltge in the differene of pole-voltges is signifintly redued ompred with the strtegy dopted in [7]. Fig.: Simulted (top) & experimentlly obtined result (bottom) of Pole voltge of inverter- for m i =.4 Fig.9: Gting signls nd the differene of pole-voltges derived s the differene of two gte signls of top swith of the -phse legs of the two inverters for m i =.4 Fig.: Simulted (top) & experimentlly obtined result (bottom) of Pole voltge of inverter-2 for m i =.4

6 Asin Power Eletronis Journl, Vol., No., Aug 27 Fig.2: he differene of pole voltges of individul inverters for m i =.4 Fig.4: Simulted (top) & experimentlly obtined result (bottom) of the ommon-mode voltge for m i =.4 Fig.5: Experimentlly obtined motor phse urrent t no-lod for m i =.4 Fig.3: Simulted (top) & experimentlly obtined result (bottom) of the tul motor phse voltge for m i =.4 Fig.6: he normlized hrmoni spetrum of the differene of pole voltges for m i =.4 Fig.7: he normlized hrmoni spetrum of the tul motor phse voltge for m i =.4

7 S.Srinivs et l: Swithing Algorithms for the Dul Inverter fed... Fig.2: Simulted (top) & experimentlly obtined result (bottom) of Pole voltge of inverter-2 for m i =.7 Fig.8: Gting signls nd the differene of pole-voltges derived s the differene of two gte signls of top swith of the -phse legs of the two inverters for m i =.7 Fig.2: he differene of pole voltges of individul inverters for m i =.7 Fig.9: Simulted (top) & experimentlly obtined result (bottom) of Pole voltge of inverter- for m i =.7 Fig.22: Simulted (top) & experimentlly obtined result (bottom) of the ommon-mode voltge for m i =.7 2

8 Asin Power Eletronis Journl, Vol., No., Aug 27 V. HE BIASING INVERER PWM SRAEGY his PWM strtegy is bsed on the observtion tht the spe vetor ombintions t the verties nd the enter of given sub-hexgon re obtined by lmping one inverter with n tive stte, while the other inverter ssumes ll the eight sttes. Consequently, one inverter my be employed s the bising inverter to relize the bising vetor nd the other inverter my be swithed round this bising vetor. Figure 26 shows the bsi operting priniple of this PWM strtegy. In Fig 26, O represents the referene vetor with its tip situted in setor-7. It is resolved into two omponents OA nd A. he vetor OA my be output with inverter- with its stte lmped t (+--, ble-) throughout the smpling time intervl. he vetor A is relized in the verge sense by swithing inverter-2 round the subhexgonl enter, A. Alterntively, the bising vetor OA my be output with inverter-2 with its stte lmped t 4 (- ++, ble-) throughout the smpling time intervl. In tht se, the swithing vetor A is generted with inverter-. Fig.23: Simulted (top) & experimentlly obtined result (bottom) of the tul motor phse voltge for m i =.7 Fig. 24: Normlized hrmoni spetrum of the differene of the pole voltges for m i =.7 he instntneous phse referenes denoted by, v, vb nd v orresponding to the referene vetor O re obtined by projeting its tip on to the respetive phse xes nd multiplying the vlues of these projetions (OU, OV nd OW, Fig.26) with ftor of (2/3). he symbols v nd v respetively denote the omponents of O on the - nd the - xes (OU nd OX, Fig.26). he modified instntneous voltge phse referenes orresponding to the swithing vetor A re denoted by, v, vb nd v re obtined by the following proedure:. he instntneous phse referenes v, vb nd v orresponding to the referene vetor O re trnsformed into the orresponding equivlent twophse system referenes v nd v using the lssil three phse to two phse trnsformtion given by: v 3 v 2 v b 3 3 v 2 2 v Fig. 25: Normlized hrmoni spetrum of the motor phse voltge for m i =.7. Fig.26: Priniple of bising inverter PWM strtegy 3

9 S.Srinivs et l: Swithing Algorithms for the Dul Inverter fed he sub-hexgonl enter situted nerest to the tip of the referene vetor O is then determined. 3. he oordintes of the nerest sub-hexgonl enter in the v - v plne (the point A in this exmple, Fig.26), denoted s v, nd v nsh, re known for nsh ll the six sub-hexgonl enters. For exmple, the oordintes of the point A in the v - v plne re given by (V/2,). 4. Sine the vetor OA is output by the bising inverter, the oordintes of the swithing vetor (A in the present se) denoted s nd sw re given by: sw V,sw = V, v - v, nsh nd sw V, = V, v - v, nsh diretly from the instntneous phse referenes without hving to evlute V sr nd there by the vlue of, s it would be very time onsuming. he instntneous phse referene voltges v, vb nd v (solid lines) normlized w.r.t V sr nd their respetive negtions (dotted lines) re shown in Fig.28. From Fig.28 it my be noted tht v is the most positive quntity mongst these six quntities when 6º 2 º nd A is the nerest sub-hexgonl enter s reognized by Fig.27. Similrly v is the most positive quntity mongst these six when 24º 3º nd D is the nerest sub-hexgonl enter. Figure 27 lso reinfores this ft. hus, it is ler tht by finding the mximum vlue mongst these six quntities, one n determine the nerest sub-hexgonl enter. 5. he modified referene phse voltges v, vb nd v for the swithing inverter re then obtined by trnsforming into the orresponding three V, sw, V, sw phse vribles by using the lssil two phse three phse trnsformtion given by: v v v b 2 / 3 / 3 / 3 / 3 / 3 V, V, sw sw 6. If inverter-2 is employed s the bising inverter, the modified referenes re used diretly to generte the swithing vetor A with inverter-. On the other hnd, if inverter- is used s the bising inverter, it is obvious tht the modified referenes must be negted to generte the swithing vetor A with inverter-2. Fig.27: Zero rossing of the instntneous phse voltges orresponding to the referene voltge spe vetor he prinipl dvntge with this PWM strtegy is tht the inverter swithing is signifintly redued s one inverter swithes only six times, while the other swithes for 48 times. With deoupled ontrol both inverters re swithed in ll the 48 smples. It is importnt to note tht the most importnt prt of this lgorithm is to find the nerest sub-hexgonl enter to the tip of the referene vetor O (Fig.26). Fig.27 nd Fig.28 explin the method to determine the sme. In the disussion to follow, the symbol denotes the ngle subtended by the tip of the referene voltge spe vetor with respet to n instnt where the instntneous vlue of the A-phse referene voltge is zero. Fig.27 shows vrious vlues of orresponding to the positive nd the negtive zero rossings of the referene phse voltges in the V -V plne. From Fig.27, it my be noted tht if º 6º, the tip of Vsr is situted in the qudrngle OSRQ. It my lso be seen tht F is the nerest sub-hexgonl enter for this ondition. Should the tip of the referene vetor be situted within the qudrngle OSGH, A is the nerest sub-hexgonl enter to it. Similr observtions my be mde for the rest of the sub-hexgonl enters. It is desirble to identify the nerest sub-hexgonl enter Fig.28: Reognition of the nerest sub-hexgonl enter with instntneous referene quntities VI. EXPERIMENAL VERIFICAION FOR BIASING INVERER PWM SRAEGY: he top tres of Fig.29 show the gting signls of the top devies of the A-phse legs of the individul inverters for mi =.4. In this se, the smples of the referene vetor lwys lie within the ore hexgon ABCDEF. he bottom tre of the sme figure shows the differene of the two pole voltges. Figures 3 nd 3 show the respetive pole voltges (both simulted & experimentl results) of the 4

10 Asin Power Eletronis Journl, Vol., No., Aug 27 individul inverters with this PWM strtegy. From these two figures, it is evident tht the swithing of inverter- is drstilly redued s it is mde to operte s the bising inverter for ll smples in yle. However, the swithing of inverter-2 remins unltered s it is used s the swithing inverter for ll the smples in yle. Figure 32 shows the differene of the pole voltges, while Fig.33 shows the tul motor phse voltge (obtined fter the subtrtion of the zero-sequene voltge from the wveform shown in Fig.34). In this se, the phse voltge wveform is similr to the one obtined by onventionl two-level inverter. However, the swithing ripple with the open-end winding onfigurtion is muh lesser ompred to the one obtined with two-level inverter. his is beuse; the spe vetor l9 lotions situted t the losest proximity re swithed with open-end winding drive. Speifilly, if the smple is situted in setor-, the verties O, A nd B re swithed, unlike in twolevel inverter, where the lotion O, G nd I re swithed to onstrut the sme smple (Fig.3). Fig.34 shows the simulted nd experimentlly obtined results of the zero-sequene voltge. Figures 35 nd 36 respetively show the hrmoni spetr of the differene in pole voltges (shown in Fig.32) nd the tul motor phse voltge (shown in Fig.34). Figure 37 shows the experimentlly obtined motor phse urrent t no-lod for the sme m i of.4. Fig.29: Gting signls nd the differene of pole-voltges derived s the differene of two gte signls of top swith of the -phse legs of the two inverters for m i =.4 he orresponding wveforms for modultion index of m i =.7 re shown through Fig.38 to Fig.45. In this se, the tip of the referene vetor trverses through the outer setors i.e. 7 to 24. It is lso evident tht the phse voltge wveform is similr to the one obtined in 3-level inverter, s the nerest verties re swithed to synthesize the smple. With this PWM strtegy, the spe vetor ombintions-, 22, 33, 44, 55 nd 66 re exlusively employed, whenever the lotion O is swithed. It is worth noting tht with this PWM strtegy, the lotion O is employed s n tive lotion while the sub-hexgonl enters onstitute the null lotions s swithing is performed round them. From tble-2, it my be observed tht these ombintions result in zero-sequene voltge tht is zero. In ontrst, the PWM strtegy proposed in [6] employs the lotion O s null lotion. Whenever the lotion O is swithed with this PWM strtegy [6], the ombintions 87 nd 78 re used. From tble-2, it my be noted tht these two ombintions result in mximum zero-sequene voltges, prtiulrly for low modultion indies wherein the dwell time ssoited with the null vetor lotion O is more. hus, signifint redution in the zerosequene voltge in the differene of pole voltges is possible with the PWM strtegy proposed in this pper. For modultion of 4%, the zero-sequene voltge resulting with the strtegy dopted in [6] is bout.4 p.u., while with the bising inverter strtegy it is.4 p.u. for the sme modultion depth. he normlized hrmonis spetr of the differene of -phse pole voltges of the two inverters with the PWM sheme dopted in the erlier work reported [6], nd using the two PWM shemes proposed in this pper i.e. Deoupled PWM sheme nd Bising Inverter PWM sheme for different modultion indies re shown in Fig.46. Fig.3: Simulted (top) & experimentlly obtined result (bottom) of Pole voltge of inverter- for m i =.4 5

11 S.Srinivs et l: Swithing Algorithms for the Dul Inverter fed... Fig.3: Simulted (top) & experimentlly obtined result (bottom) of Pole voltge of inverter-2 for m i =.4 Fig.34: Simulted (top) & experimentlly obtined result (bottom) of the ommon-mode voltge for m i =.4 Fig.32: he differene of pole voltges of individul inverters for m i =.4 Fig. 35: Normlized hrmoni spetrum of the differene of the pole voltges for m i =.4 Fig.33: Simulted (top) & experimentlly obtined result (bottom) of the tul motor phse voltge for m i =.4 Fig. 36: Normlized hrmoni spetrum of the motor phse voltge for m i =.4 6

12 Asin Power Eletronis Journl, Vol., No., Aug 27 Fig.37: Experimentlly obtined motor phse urrent t no-lod for m i =.4 Fig.38: Gting signls nd the differene of pole-voltges derived s the differene of two gte signls of top swith of the -phse legs of the two inverters for m i =.7 Fig.4: Simulted (top) & experimentlly obtined result (bottom) of Pole voltge of inverter-2 for m i =.7 Fig.4: he differene of pole voltges of individul inverters for m i =.7 Fig.39: Simulted (top) & experimentlly obtined result (bottom) of Pole voltge of inverter- for m i =.7 7

13 S.Srinivs et l: Swithing Algorithms for the Dul Inverter fed... Fig.42: Simulted (top) & experimentlly obtined result (bottom) of the ommon-mode voltge for m i =.7 Fig.43: Simulted (top) & experimentlly obtined result (bottom) of the tul motor phse voltge for m i =.7 Fig. 44: Normlized hrmoni spetrum of the differene of the pole voltges for m i =.7 Fig. 45: Normlized hrmoni spetrum of the motor phse voltge for m i =.7 VII. CONCLUSIONS Compring the resultnt motor phse voltges with the two PWM strtegies proposed in this pper, (Fig.23 nd Fig.43) it is ler tht it is possible to synthesize onventionl three-level inverter wveform with the bising inverter PWM strtegy. With the bising inverter PWM strtegy the referene spe vetor is reprodued in the verge sense by swithing mongst the vetor ombintions vilble t the nerest three verties. Consequently the swithing ripple with this strtegy is lesser thn the deoupled PWM strtegy. From the hrmoni spetr of the resultnt motor phse voltge with these two strtegies (Fig.7 nd Fig.29), it is seen tht the distribution of hrmoni energy is better with the bising inverter PWM strtegy. However, s pointed out erlier, the prinipl dvntge with the deoupled PWM lgorithm is its fstness nd its menbility of implementtion with slower ontrollers. It is interesting to note tht the PWM strtegies proposed in this pper result in signifint redution in the zero-sequene voltge in the differene of pole-voltges ompred to the look-up tble pproh proposed in [6] t lower indies of modultion, whih ould be desirble. Both strtegies obvite the time onsuming proess of setor identifition nd the oordinte trnsformtions. Look-up tbles re not needed with the proposed PWM strtegies, reduing the memory requirements of the ontroller. REFERENCES [] Akir Nbe, Iso khshi nd Hirofumi Akgi, A New Neutrl-Point Clmped PWM Inverter, IEEE rns. Ind. Appl., Vol. IA-7, No. 5, September-Otober 98, pp [2].A. Meynrd nd H Foh, Multi-Level Conversion: High Voltge Choppers nd Voltge Soure Inverters, Conf. Pro. IEEE PESC 992, pp [3] Leon M. olbert, Fng Zheng Peng nd homs G. Hbetler, Multilevel Converters for Lrge Eletri Drives, IEEE rns. Ind. Appl., Vol. 35, No., Jnury-Februry 999, pp [4] H. Stemmler, P. Guggenbh, Configurtions of High- Power Voltge Soure Inverter Drives, Proeedings EPE Conferene, 993, pp [5] Joohn-Sheok Kim, Seung-Ki Sul, A Novel Voltge Modultion ehnique of the Spe Vetor PWM, Conferene Proeedings IPEC-995, pp

14 Hrmoni number Hrmoni number Hrmoni number Hrmoni number Hrmoni order Hrmoni order Hrmoni order Hrmoni order Hrmoni order Hrmoni order Hrmoni order Hrmoni order Asin Power Eletronis Journl, Vol., No., Aug 27 [6] E.G. Shivkumr, K. Gopkumr, S.K. Sinh, Andre Pittet, V.. Rngnthn, Spe Vetor Control of Dul Inverter Fed Open-End Winding Indution Motor Drive, EPE Journl, Vol. 2, No., Februry 22, pp [7] V.. Somsekhr, K. Gopkumr, hree-level Inverter Configurtion Csding wo wo-level Inverters, IEEE Pro. Eletr. Power Appl., Vol. 5, No. 3, My 23, pp [8] V.. Somsekhr, K. Gopkumr, A. Pittet nd V.. Rngnthn, PWM Inverter Swithing Strtegy for Dul wo-level Inverter Fed Open End Winding Indution Motor Drive with Swithed Neutrl, IEE Pro. Of Eletr. Power Appl., Vol. 49, No, 2, Mrh 22, pp [9] V.. Somsekhr, K. Gopkumr, M.R. Biju, K.K. Mohptr nd L. Umnnd, A Multilevel Inverter System for n Open End Winding Indution Motor with Open-End Windings, IEEE rnstions on Industril Eletronis, Vol. 52, No. 3, June 25, pp [] V.. Somsekhr, K. Gopkumr, E.G. Shivkumr, S.K. Sinh, A Spe Vetor Modultion Sheme for Dul wo Level Inverter Fed n Open-End Winding Indution Motor Drive for the Elimintion of Zero Sequene Current, EPE Journl, Vol. 2, No. 2, My 22, pp [] V.. Somsekhr, M.R. Biju nd K. Gopkumr, Dul wo Level Inverter Sheme for n Open-End Winding Indution Motor Drive with Single DC Power Supply nd Improved DC Bus Utiliztion, IEE Pro. of Eletr. Power. Appl., Vol. 5, No. 2, Mrh 24, pp [2] M. B. Biju, K.K. Mohptr, R.S. Knhn nd K. Gopkumr, A Dul wo-level Inverter Sheme with Common Mode Voltge Elimintion for n Indution Motor Drive, IEEE rnstions on Power Eletronis. Vol. 9, No. 3, My 24, pp [3] V. Oleshuk, B.K. Bose, A.M. Stnkovi, Phse-Shift- Bsed Synhronous Modultion of Dul-Inverters for n Open-End Winding Indution Motor Drive with Elimintion of Zero Sequene Currents, Conf. Pro. IEEE-PEDS-25, pp [4] V. Oleshuk, F. Profumo, A. enoni nd R. Bojoi, Synhronized Pulse_Width Modultion for Control of Inverter-Fed Open-End Winding Motor Drives, EPE Conf. Pro., Peline, 25, Pper-ID: 94. m i =. Normlised Hrmoni spetrumof vo-vdo m i =. NormlisedHrmoni spetrumof Vo m i =. m i =.2 NormlisedHrmoni spetrumof vo-vdo m i =.2 Normlised Hrmoni spetrumof Vo m i =.2 m i =.3 NormlisedHrmoni spetrumof vo-vdo m i =.3 Normlised Hrmoni spetrumof Vo m i =.3 m i =.4 NormlisedHrmoni spetrumof vo-vdo m i =.4 NormlisedHrmoni spetrumof Vo m i =.4 () (b) () APPENDIX he imginry swithing times [5] for inverter- nd inverter-2 re relted to the respetive phse referene voltges s follows: s s 2( ) v V () s 2( ) V b bs v s 2( ) V s v s 2( ) V g v s 2( ) V gb v s 2( ) V g v When the referene vetor is situted in setor-, For Inverter-: (2) (3) (4) (5) (6) mx s min CS As eff mx min [5] eff s s Using equtions (), (2) & (3), we hve s 2( )( v v ) eff V Similrly for Invertre-2: min mx eff s s s s Using equtions (4), (5) & (6), we hve s 2( )( v v ) eff V (7) (8) 9

15 S.Srinivs et l: Swithing Algorithms for the Dul Inverter fed... It is obvious tht the effetive-time period for inverter- nd inverter-2 re equl, s the referene vetor is resolved into two equl hlves. From equtions (7) & (8), we hve eff eff (9) o s eff o s eff As & [5] o o [from eqn.(9)] It ws shown in [5] tht the time-offset required to ple the effetive time period t the entre of the smpling time intervl is given by: offset o 2 min Hene for inverter-, the time-offset is: offset o 2 2( V s ) v o offset min Similrly, 2 o s 2( ) v 2 V From the lgorithm proposed in [5], the phse swithing time for phse-a for inverter- is given by: () g s offset s o s 2( ) v 2( ) v V 2 V o s g 2( )( v v ) () V 2 Similrly for inverter-2, g s offset s o s 2( ) v 2( ) v V 2 V o g (2) 2 From equtions () & (2), it is evident tht 2( V s g g o )( v v ) g g o eff From eqn.7, s g s g Similrly, the phse swithing times for the other two phses re given s: gb g s s gb g BIOGRAPHIES S.Srinivs reeived the B.E degree in Eletril Engineering from Osmni University College of Engineering nd his Msters degree from Regionl Engineering College-Wrngl in 997 nd 22 respetively. He is urrently working towrds the Ph.D degree t Ntionl Institute of ehnology-wrngl. He joined the Fulty of Eletril Engineering Ntionl Institute of ehnology-wrngl in the yer 997. His reserh interests re multi-level inverters, PWM Swithing Strtegies, Multi-level inversion relized through Open-end winding Indution motor drives, AC drives et. Dr. V.. Somsekhr reeived his grdute degree from Regionl Engineering College Wrngl (presently the Ntionl Institute of ehnology) in 988 nd the post grdute degree from the Indin Institute of ehnology, Bomby in 99, his re of speiliztion being Power Eletronis. He worked s n R&D engineer t M/s Perpetul Power ehnologies, Bnglore nd s senior engineer t M/s Kirloskr Eletri Co. Ltd., Mysore. He joined the fulty of eletril engineering t the Ntionl Institute of ehnology in 993, where he is urrently serving. He reeived his dotorl degree from the Indin Institute of Siene in 23. His urrent interests re multilevel inversion with open-end indution motors, AC drives nd PWM strtegies.