A 3-D Generalized Direct PWM for 3-Phase 4-Wire APFs

Transcription

1 A -D Generlized Diret PWM for -Phse -Wire APFs Ning-Yi Di*, Mn-Chung Wong*, Ying-Duo Hn* #, Chi-eng L* *Fulty of iene nd Tehnology, #Deprtent of Eletril Engineering Uniersity of Mu, Tsinghu Uniersity Mu, Chin, Beijing, Chin Astrt A -diensionl (D) generlized diret PWM lgorith for ultileel onerters in three-phse four-wire tie power filter is proposed. It is proed to e equilent to the newly proposed generlized D spe etor odultion (VM). Howeer, the diret PWM gretly siplifies the ontrol lgorith nd is uh esier to ipleent in digitl proessors. The diret PWM is pplied to n tie power filter, where three-leel NPC inerter is used. Iportnt issues for ipleenting the DPWM in three-leel inerter, suh s d.. oltge rition ontrol nd oer-odultion, re disussed in detil. A d.. oltge rition ontrol strtegy in -- oordintes is lso proposed. iultion results re gien to show the lidity of the proposed ontrol strtegy. Keywords- tie power filter, diret PWM, three-phse fourwire syste I. INTRODUCTION For the ediu nd lrge pity power qulity openstors, the ulti-leel onerters re eoing inresingly populr. It not only redues oltge stress ross the swithes ut lso iproes hroni ontents of the VI y seleting pproprite swithing etors. The oltge stress derese leds to orresponding derese of d/dt, whih n redue the eletrogneti interferene (EMI). Reently, seerl two-diensionl (D) spe etor odultion (VM) ethods for ultileel onerter he een proposed []-[]. It is neessry to extend the D spe to the -diensionl (D) spe when the ultileel onerter is onneted to three-phse four-wire syste, euse the referene etors re not on plne if the syste is unlned or if there is zero sequene or triple hronis. ine the oltges or urrents of three phses re liner independene of eh other in three-phse four-wire syste, the trnsfor etween α-β-0 oordintes nd -- oordintes is definitely reersile. Therefore, oth the two oordintes n e hosen to express the spe etors nd to ipleent D VM ontrol. The D VM is first proposed in α-β-0 oordintes sine it is nturl to extend the α-β plne to α-β-0 D oordintes [6][7]. A generlized D VM in -- oordintes hs een proposed in 00 [8], in whih the referene oltge etor is deoposed to n offset etor nd two-leel etor. Iportnt issues for the DVM, suh s deterintion of swithing sequene shees nd lultion of dwell ties re ll settled y two-leel DVM. In this pper, generlized diret PWM is proposed, in whih the swithing stte nd pulse width of eh phse output re diretly deterined ording to the norlized referene oltge etor. Therefore, the tie-onsuing id-steps of the DVM re ll oided. It is proed tht the odultion outputs of the diret PWM nd the newly proposed D VM in -- oordintes [8] re the se when the se referene oltge etor is used. The oputtionl ost of the diret PWM is uh lower nd is independent of the nuer of leels of the onerter. o, it n e used s generlized PWM lgorith for generting D ontrol etors. In order to show the lidity of the proposed diret PWM, it is pplied to three-phse four-wire tie power filter (APF), in whih three-leel neutrl-point-lped (NPC) inerter is used. One of the ost iportnt opertion issues of the threeleel NPC inerter is the d.. oltge unlne. Howeer, ost of the d.. oltge unlne ontrol strtegies re proposed for the VM in α-β-0 oordintes [9]-[]. A d.. oltge unlne ontrol strtegy, whih is ipleented y diretly odifying the pulse width of eh phse, is proposed in this pper. The oer-odultion issue for the diret PWM is lso disussed. Finlly, siultion results re gien to show the lidity of the proposed diret PWM with d.. oltge unlne ontrol. II. GENERALIZED DIRECT PWM An equilent odel for n N-leel oltge soure inerter is shown in Fig. []. The phse output oltge n e expressed s: j = j *E j=,, nd 0 j N- () where j denotes the swithing stte of the orresponding phse nd E denotes the d.. oltge of one leel. In this pper, ll the oltge etors re represented in per unit, i.e., norlized y E, so tht the output oltge of eh phse n e expressed s: j = j j=,, nd 0 j N- () The referene oltge etor is norlized y E too, s expressed in (). IA /05/$ IEEE

2 = V E () ref ref / In the generlized Diret PWM, the desired output oltge etor is deoposed into two oponents: offset oltge etor nd two-leel oltge etor. The two-leel oltge etor will e used to diretly deterine the finl pulse width, whih gretly siplifies the lultions in [8]. = + () ref offset twol It n lso e expressed in -- oordintes s: ref offset twol + ref = offset twol ref offset twol,where offset offset offset INT ( = INT ( INT ( ref ref ref ) ) ) INT( ) reoes the frtionl prt of the rel input dt. If( offset, offset, offset ) equls to (,, ), the referene oltge etor lotes inside the -leel spe etor llotion fored y (,, ), ( +,, ), (, +, ), (,, +), ( +, +, ), ( +,, +), (, +, +) nd ( +, +, +), s illustrted in Fig.. In order to redue the d/dt of the output oltge in ulti-leel onerter, the output oltge hnges only one leel in one swithing period. o the two swithing sttes of one phse re j nd j + (j=,,) in swithing period. The diret PWM is sed on the oltge seond pproxition just like tht in onentionl VM. Howeer, the oltge is pproxited in per-phse ode in -- oordintes, i.e., the referene oltge etor is synthesized in phse A, B nd C independently, s illustrted in (5). refj T = t + + ) t offsetj offj ( j=,, (5) offsetj where T s is the spling period. t offj is the dwell tie of the output stte j. t onj is the dwell tie of the output stte j + nd t offj + t onj = T s ( j=,, ). If offsetj T s is sutrted fro oth sides of (5), it n e otined: ( refj offsetj ) T s = offsetj t offj +( offsetj +) t onj offsetj (t offj + t onj ) = t onj ine refj offsetj = twolj j=,, (6) onj twolj = t onj / T s j=,, (7) nd - twolj = t offj / T s (8) The t onj is just the pulse width of the orresponding phse j (j=,,), s shown in Fig.. The norlized two-leel referene oltge etor twolj in (7) equls to the norlized pulse width of the respetie phse. Fig. Equilent odel of N-leel VI Fig. Deoposition of referene oltge etor Fig. PWM output of one spling period No tter wht PWM ontrol strtegies re used, the finl trigger signls re sending to the swithes of the respetie phse independently. After the t onj of eh phse is deterined, the odultion output of the inerter n e generted. The IA /05/$ IEEE

3 proposed PWM ontrol ethod is lled Diret PWM euse it is ipleented y diretly lulting the pulse width of eh phse in -- oordintes. This diret PWM n e esily ipleented in digitl proessors. III. EQUIVALENCE TO THE DVM A DVM in -- oordintes hs een proposed in [8], in whih following steps re required in order to generte finl output pulses. ) The referene oltge etor is deoposed to offset oltge etor nd two-leel oltge etor; ) As six tetrhedrons re onsidered in eh two-leel spe etors suue in -- oordintes, the seond step is to deterine in whih tetrhedron the two-leel oltge etor is pointing. Three oprisons re needed in this prt. ) The four spe etors, whih orrespond to the four erties of tetrhedron in the seleted suue (step ), re hosen to synthesis the two-leel referene oltge etor. The dwell ties of eh etor is lulted. ) The pulse width of eh phse is lulted in order to generte the trigger signls of eh swith. It will e proed tht step to step n e repled y the lultion in (7). The referene oltge etor is synthesized y four neighoring etors in DVM s: twol T = t + t + t + t (9) nd t + t + t +t = T s (0) Eqution (9) n lso e expressed s: t twol = t T () twol t twol t After the dwell tie of eh neighoring etors re otined, the finl output of the inerter n e generted, whih is lso illustrted in Fig.. ine,, nd re spe etors of two-leel spe etor llotion, its norlized output (j=,, ; =,,,) n only e 0 j or.it n e found tht the pulse width of eh phse is just the sution of the dwell tie of the etors, whose output in tht phse is equl to. Tht is to sy, if x equls to, the dwell tie t of this etor is dded to the pulse width. If x equls to 0, the t is not dded to the pulse width t onj. o the x n lso e used s the oeffiients for lulting the pulse width. If phse A is onsidered s n exple, ton = t + t + t + t. The following eqution n e otined. t t t on on on = t t t t () The (7) n e dedued gin if () is opred with (), whih indites tht step to step in the DVM n e repled y the siple lultion (7). Therefore, the tieonsuing id-steps, suh s neighoring etors deterintion nd dwell ties lultion, n ll e eliinted. The diret PWM nd the DVM generte the se output when the se referene oltge etor is pplied to. Howeer, the lultion in the diret PWM is uh sipler. Furtherore, the diret PWM n e esily ipleented in digitl proessors. IV. IMPLEMENT DIRECT PWM IN A THREE-LEVEL APF In order to show the lidity of the proposed diret PWM, it is pplied to three-phse four-wire APF, in whih threeleel NPC inerter is used. The three-leel neutrl point lped (NPC) inerter hs een used in APFs for threephse three-wire syste. If wire is onneted etween the syste neutrl nd the id-point of the d.. pitors, the three-leel NPC inerter n lso e utilized in three-phse four-wire syste without odifying its struture, s shown in Fig.. Copred with three-leel four-leg NPC inerter, the three-leg NPC inerter uses less swithing oponents nd its initil ost is lower. Furtherore, there re totlly 8 etors of three-leel four-leg inerter, whih gretly inreses the oplexity of the PWM ontrol. o the three-leg NPC inerter is hosen in this pper. When the diret PWM is ipleented, soe iportnt opertion issues should e onsidered first. Fig. yste onfigurtion of three-phse four-wire tie power filters A. D.C. oltge unlne ontrol One of the ost iportnt opertion issues for three-leel NPC inerter is d.. oltge unlne. The unlne etween the two d.. pitors ust e ontrolled euse lrge d.. unlne not only ffets the openstion perforne ut lso uses potentil syste unstle. The output oltge etor of the inerter in -- oordintes is expressed s: IA /05/$ IEEE

4 ( + α + α ) = () π j π j where α = e, α = e Aording to the α-β-0 trnsfortion s shown in (), the instntneous oltge etor in α-β-0 fre is gien s (5). α = () β 0 0 ( n + n + 0 n0) = α α β β (5) If (,, ) nd ( +, +, +) re sustituted to (), results indite tht the α- nd β-xes output of the two etors re the se, nd only their zero-xis outputs re different [0]. It is ssued tht the d.. oltge ross eh pitor is lrger thn the pek lue of the phse-to-neutrl oltge t the point of oon oupling. The d.. oltge ritions orresponding to the swithing stte of one leg re illustrted in Fig.5. If j =, V d dereses. If j =0, V d dereses. If j =, the output of this leg is onneted to the id-point of the d.. pitors. The urrent of this phse does not pssing through either of the d.. pitors. The swithing sttes of the three legs together deterine the ritions of the oltge ross the d.. pitors []. In order to redue the swithing losses, the swithing stte of eh leg n only hnge one leel in one spling period. Hene, the dwell ties of the etors (,, ) nd ( +, +, +) will e ried to ontrol the d.. oltge unlne. Although this ethod does not he the lrgest d.. oltge unlne ontrol pility, it gies good oproise etween the swithing losses nd the d.. oltge unlne ontrol. The openstion perforne on α- nd β-xes is not ffeted y the d.. oltge unlne ontrol. Only the openstion in zero-xis is ffeted [0]. The dwell tie of ( +, +, +) is just the iniu pulse width ong three phses, s shown in Fig.. In the proposed d.. oltge unlne ontrol strtegy, the pulse width of eh phse is hnged ording to (6). t onj = t onj - t hnge j=,, (6),where t hnge =t in k (V d -V d )/E (7) t in = iniu ( t on, t on, t on ) nd k is the gin of the feedk loop. ine the pulse widths of three phses re odified with the se lue, only the dwell ties of etors (,, ) nd ( +, +, +) re odified. The d.. oltge unlne ontrol is ipleented y rying the pulse width in -- oordintes. A lrger lue of k hs lrger d.. oltge unlne ontrol pility. Howeer, the t hnge n t e lrger thn the t in. Hene, proper k lue should e hosen ording to the syste preters. Fig. 5 D.C. pitors oltge rition () j= () j=0 () j= B. Oer-odultion The output oltge of eh phse is liited y the d.. oltge ross eh d.. pitor. In three-leel inerter, the referene oltge should e restrited etween 0 ~ V d. 0 refj V d j=,, (8) The following odifitions re dopted when refj exeeds this rnge. refj = V d if refj > V d (9) refj = 0 if refj < 0 (0) The pulse widths of eh phse re restrited etween 0 ~ T s, whih is lwys stisfied if no d.. oltge unlne ontrol is pplied. Howeer, the pulse width y he een hnged y the d.. oltge rition ontrol strtegy, s illustrted in (6). Hene, the pulse widths need to e opred with the oundry onditions nd to e odified gin. t onj = T if t onj > T () t onj = 0 if t onj < 0 () After the oprisons in (9) ~ () re done nd the orresponding odifitions re de, the proper diret PWM output of the inerter n e generted. The finl flow hrt of the diret PWM is shown in Fig.6. Fig.6 Flow hrt of diret PWM ethod V. IMULATION REULT The proposed diret PWM is pplied to three-phse fourwire tie power filter (APF) with 5kHz spling frequeny. The syste onfigurtion is shown in Fig.. The siultion is done y using Mtl/iulink. The three-phse unlned non-liner lods re used. The pek lue of the soure oltge IA /05/$ IEEE

5 is 00V nd R=Ω, L=H, V d =60V. The proposed d.. oltge rition ontrol strtegy is lso hieed, where the oeffiient k is hosen to e -8. The lod urrent is shown in Fig.7. The soure urrent is shown in Fig.8 when the diret PWM with d.. oltge rition ontrol is pplied. The APF egins to openste t 0.0s. The d.. oltge without ny ontrol nd fter eing ontroller re shown in Fig.9 nd Fig.0 respetiely. It n e seen tht the soure urrent hronis, urrent unlne nd neutrl urrent n e opensted siultneously. The APF n tre the rition in the lod urrent dynilly. The d.. oltge unlne n lso e ontrolled y using the proposed diret PWM with d.. oltge unlne ontrol. The totl hroni distortion (THD) lues of the three-phse urrents re listed in Tle. The THD lues indite tht the openstion perforne is slightly ffeted fter the d.. oltge unlne ontrol strtegy is dded to the diret PWM ontrol. Fig. 9 D.C. oltge rition without ontrol Fig.0 D.C. oltge rition fter ontrolled Fig.7 Lod Currents Fig. 8 oure urrent fter openstion y diret PWM TABLE I. THD VALUE A B C Before Copenstion 8.5% 8.5% 5.68% Diret PWM without d.. ontrol.595%.66% 8.06% Diret PWM with d.. ontrol 5.8%.989% 8.757% VI. CONCLUION. In this pper, generlized diret PWM ontrol strtegy is proposed. It is proed to e equilent to the DVM in -- oordintes. Howeer, the tie-onsuing id-steps lultions in the DVM n ll e siplified to one eqution in the diret PWM, whih gretly siplifies the PWM ontrol. The oputtionl oplexity of the proposed diret PWM is lwys the se for inerters of different leels nd it n e esily ipleented in digitl ontrollers. The diret PWM is pplied to three-phse four-wire tie power filter, in whih three-leel NPC inerter is used. A noel d.. oltge unlne ontrol strtegy is lso proposed, whih is hieed y odifying the pulse width in -- oordintes. Finlly, siultion results re gien to show the lidity of the proposed diret PWM with d.. oltge unlne ontrol. IA /05/$ IEEE

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