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1 Power Train Scaling for High Frequency Switching, Impact on Power Controller Design By Dr. Sami Ajram SL3J S, S.A.R.L. Pôle d Activité Y. Morandat 1480 Avenue d ARMENIE, Gardanne, France <Sami.Ajram@SL3J.com> Oct 2010 IEEE PowerSoC
2 Outline Background for High Frequency Switching Dealing with Noise Challenges For HF Controllers S. AJRAM, SL3J S SARL, Marseille France Oct 2010 IEEE PowerSoC
3 HF DC to DC Converters Challenges Challenges for Technologist Ultra Fast Power Switches with High Breakdown Voltage Low DCR HF Inductor Low ESR Capacitor Compatible Integration Process SiP, SoC etc VDD Challenge for Designers Voltage ringing is way higher than regulated voltage amplitude Differentiate Load transients from Ringing Power Consumption in PWM circuitry Construct Simple, Scalable and Exportable Design VOUT Only Simple Ideas work efficiently S. AJRAM, SL3J S SARL, Marseille France Oct 2010 IEEE PowerSoC
4 Background, Solid State Power Switching Hi-Lo Transition I DSH V DSH I DSL V DSL S. AJRAM, SL3J S SARL, Marseille France Oct 2010 IEEE PowerSoC
5 Background, Solid State Power Switching Lo-Hi Transition I DSH V DSH I DSL V DSL S. AJRAM, SL3J S SARL, Marseille France Oct 2010 IEEE PowerSoC
6 Background, Solid State Power Switching Hi-Lo Transition : Waveforms I DSH V DSH I DSH V DSH I DSL V DSL BBM or Adjustable Delay I SDL V DSL I Diode S. AJRAM, SL3J S SARL, Marseille France Oct 2010 IEEE PowerSoC
7 Background, Solid State Power Switching Lo-Hi Transition : Waveforms I DSH V DSH V DSH I DSH I DSL I SDL V DSL V DSL I Diode S. AJRAM, SL3J S SARL, Marseille France Oct 2010 IEEE PowerSoC
8 Overview of Switch Power Losses Low Side Switch Switching Losses Causes Qg Charging and discharging C DS Charging (Discharging is often adiabatic) Body diode charge recovery (losses induced at HS switch) Parasitic Inductor Energy L D Q G R ON C DSO Conduction Losses Conduction losses in R DSON Body diode Forward losses (short time) Shoot through current (use BBM) L S S. AJRAM, SL3J S SARL, Marseille France Oct 2010 IEEE PowerSoC
9 Overview of Switch Power Losses High Side Switch Switching Losses Causes Qg Charging and discharging C DS Discharging (Charging is often adiabatic) Ids x Vds crossing at turn on Parasitic Inductor Energy L S Q G R ON C DSO Conduction Losses Conduction losses in R DSON Shoot through current (use BBM) L D S. AJRAM, SL3J S SARL, Marseille France Oct 2010 IEEE PowerSoC
10 Intrinsic Limitations for Power Train Scaling The sum (P AC + P DC ) is minimum When (P AC = P DC ) Reason : P AC x P DC = Constant ( P AC P P IN DC ) MIN 2. P P IN AC V V IN OUT S S PW R DRV F 0 K D Stage Scaling (20, 50, 100 ) K D for CMOS ranges from 10ps to 100ps At 10MHz => for instance F 0.K D = S. AJRAM, SL3J S SARL, Marseille France Oct 2010 IEEE PowerSoC
11 Device / Process Optimization [S. Ajram, G. Salmer, IEEE Trans. Power Electronics 2001] Parameter Breakdown Voltage (V BD ) See Note (1) On-State Resistance (R ON ) Maximum Input Capacitance (C in ) Loss Factor k D =C in.r ON V V dsub dsb Physics dsubb Process Optimization 1. Set Breakdown Voltage 1.8V, 5V etc 2. Breakdown determines possible Doping 3. Doping Sets Mobility 4. Engineer Lg and T OX 5. (Mobility + Doping + Gate) Sets Loss Factor 60. V E g q. N. s D 3 2. n D W. L. C L g gd q.n.l g g D s..c 1 1 L N W gd g OX OX D n n Channel A 3 4 N + Source P Gate Oxide L g T OX N L gd Drain Wg: Gate width C OX : Oxide capacitance V gson : Gate-to-source on-state voltage V T : Threshold voltage NsD, µnd: Respectively, the surface doping level and the electron mobility in the drain-to-channel lightly doped region NA Channel: Substrate doping level under the gate b: Parasitic substrate NPN transistor current gain vs: Carrier saturation velocity Note (1) Comment by Pr. Paul Chow, RPI USA This equation does not fit for bandgap larger than 2.5eV such as for SiC or GaN, use the following reference instead T. Paul Chow and Ritu Tyagi "Wide Bandgap Compound Semiconductors for Superior High-Voltage Unipolar Power Devices" IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 41, NO. 8, AUGUST 1994 N + S. AJRAM, SL3J S SARL, Marseille France Oct 2010 IEEE PowerSoC
12 Slides to be requested S. AJRAM, SL3J S SARL, Marseille France Oct 2010 IEEE PowerSoC
S L YSTEMS. Power Train Scaling for High Frequency Switching, Impact on Power Controller. By Dr. Sami Ajram
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Features Latest MOSFET silicon technology Key parameters optimized for Class-D audio amplifier applications Low R DS(on) for improved efficiency Low Qg for better THD and improved efficiency Low Qrr for
Taiwan Goodark Technology Co.,Ltd
TGD N-Channel Enhancement Mode Power MOSFET Description The uses advanced trench technology and design to provide excellent R DS(ON) with low gate charge. This device is suitable for use in PWM, load switching
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In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.
Important notice Dear Customer, On 7 February 27 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and
2N7624U3 LOGIC LEVEL POWER MOSFET SURFACE MOUNT (SMD-0.5) 60V, P-CHANNEL TECHNOLOGY. Absolute Maximum Ratings
PD-9732 RADIATION HARDENED LOGIC LEVEL POWER MOSFET SURFACE MOUNT (SMD-.5) 2N7624U3 IRHLNJ79734 6V, P-CHANNEL TECHNOLOGY Product Summary Part Number Radiation Level RDS(on) ID IRHLNJ79734 K Rads (Si).72Ω
Battery protection Load switch Power management SOT23-6L top view
http://www.ncepower.com NCE N-Channel Enhancement Mode Power MOSFET Description The uses advanced trench technology to provide excellent R DS(ON) and low gate charge.this device is suitable for use as
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N & P-Channel -V (D-S) MOSFET Key Features: Low r DS(on) trench technology Low thermal impedance Fast switching speed Typical Applications: LED Inverter Circuits DC/DC Conversion Circuits Motor drives
ACE2020M N-Channel 200-V MOSFET
Description ACE2020M uses advanced trench technology to provide excellent R DS(ON). This device particularly suits for low voltage application such as power management of desktop computer or notebook computer