SVF4N65T/F(G)/M_Datasheet

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1 4A, 650V N-CHANNEL MOSFET SVF4N65T/F(G)/M_Datasheet GENERAL DESCRIPTION SVF4N65T/F(G)/M is an N-channel enhancement mode power MOS field effect transistor which is produced using Silan proprietary F-Cell TM structure VDMOS technology. The improved planar stripe cell and the improved guard ring terminal have been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are widely used in AC-DC power suppliers, DC- DC converters and H-bridge PWM motor drivers. FEATURES 4A,650V, R DS(on)(typ) =2.5Ω@V GS =10V Low gate charge Low Crss Fast switching Improved dv/dt capability NOMENCLATURE ORDERING INFORMATION Part No. Package Marking Material Packing SVF4N65T TO-220-3L SVF4N65T Pb free Tube SVF4N65F TO-220F-3L SVF4N65F Pb free Tube SVF4N65FG TO-220F-3L SVF4N65FG Halogen free Tube SVF4N65M TO-251-3L SVF4N65M Pb free Tube Page 1 of 9

2 ABSOLUTE MAXIMUM RATINGS (T C =25 C unless otherwise noted) Ratings Characteristics Symbol SVF4N65T SVF4N65F(G) SVF4N65M Unit Drain-Source Voltage V DS 650 V Gate-Source Voltage V GS ±30 V Drain Current T C =25 C I D 4.0 T C =100 C 2.8 A Drain Current Pulsed I DM 16 A Power Dissipation(T C =25 C) W P D -Derate above 25 C W/ C Single Pulsed Avalanche Energy (Note 1) E AS 202 mj Operation Junction Temperature Range T J -55~+150 C Storage Temperature Range T stg -55~+150 C THERMAL CHARACTERISTICS Ratings Characteristics Symbol SVF4N65T SVF4N65F(G) SVF4N65M Unit Thermal Resistance, Junction-to-Case R θjc C/W Thermal Resistance, Junction-to-Ambient R θja C/W ELECTRICAL CHARACTERISTICS (T C =25 C unless otherwise noted) Characteristics Symbol Test conditions Min. Typ. Max. Unit Drain -Source Breakdown Voltage B VDSS V GS =0V, I D =250µA V Drain-Source Leakage Current I DSS V DS =650V, V GS =0V µa Gate-Source Leakage Current I GSS V GS =±30V, V DS =0V ±100 na Gate Threshold Voltage V GS(th) V GS = V DS, I D =250µA V Static Drain- Source On State Resistance R DS(on) V GS =10V, I D =2A Ω Input Capacitance C iss V DS =25V,V GS =0V, Output Capacitance C oss f=1.0mhz Reverse Transfer Capacitance C rss Turn-on Delay Time t d(on) V DD =325V,I D =4.0A, Turn-on Rise Time t r R G =25Ω Turn-off Delay Time t d(off) Turn-off Fall Time t f (Note 2,3) Total Gate Charge Q g V DS =520V,I D =4.0A, Gate-Source Charge Q gs V GS =10V Gate-Drain Charge Q gd (Note 2,3) pf ns nc Page 2 of 9

3 SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS Characteristics Symbol Test conditions Min. Typ. Max. Unit Continuous Source Current I S Integral Reverse P-N Pulsed Source Current I SM Junction Diode in the A MOSFET Diode Forward Voltage V SD I S =4.0A,V GS =0V V Reverse Recovery Charge Q rr di F /dt=100a/µs µc Reverse Recovery Time T rr I S =4.0A,V GS=0V, ns 1. L=30mH,I AS =3.36A,V DD =150V, R G =25Ω, starting T J =25 C; 2. Pulse Test: Pulse width 300μs,Duty cycle 2%; 3. Essentially independent of operating temperature. Page 3 of 9

4 TYPICAL CHARACTERISTICS Page 4 of 9

5 TYPICAL CHARACTERISTICS(continued) 1.2 Figure 7. Breakdown Voltage Variation vs. Temperature 3.0 Figure 8. On-resistance Variation vs. Temperature Drain-Source Breakdown Voltage(Normalized) BVDSS(V) V GS=0V 2. I D=250µA Drain-Source On-Resistance (Normalized) RDS(ON)(Ω) V GS=10V 2. I D=2.0A Junction Temperature T J ( C) Junction Temperature T J ( C) 10 2 Figure 9-1. Max. Safe Operating Area(SVF4N65T) Operation in This Area is Limited by RDS(ON) Figure 9-2. Max. Safe Operating Area(SVF4N65F(G)) 10 2 Operation in This Area is Limited by RDS(ON) Drain Current - ID(A) TC=25 C 2.Tj=150 C 3.Single Pulse 100µs 1ms 10ms DC Drain Current - ID(A) TC=25 C 2.Tj=150 C 3.Single Pulse DC 10ms 100µs 1ms Drain Source Voltage - V DS (V) Drain Source Voltage - V DS (V) Figure 9-3. Max. Safe Operating Area(SVF4N65M) 10 2 Operation in This Area is 5 Figure 10. Maximum Drain Current vs. Case Temperature Drain Current - ID(A) Limited by RDS(ON) 1.TC=25 C 2.Tj=150 C 3.Single Pulse 100µs 1ms 10ms DC Drain Current - ID(A) Drain Source Voltage - V DS (V) Case Temperature T C (V) Page 5 of 9

6 TYPICAL TEST CIRCUIT Gate Charge Test Circuit & Waveform 12V 200nF 50KΩ 300nF Same Type as DUT VDS VGS 10V Qg Qgs Qgd VGS DUT 3mA Charge Resistive Switching Test Circuit & Waveform VGS VDS RL VDS 90% VDD 10V RG DUT 10% VGS td(on) tr ton td(off) tf toff Unclamped Inductive Switching Test Circuit & Waveform VDS L BVDSS EAS = 1 2 LI AS 2 BVDSS BVDSS - VDD ID IAS 10V tp RG DUT VDD VDD ID(t) VDS(t) tp Time Page 6 of 9

7 PACKAGE OUTLINE TO-220F-3L(1) UNIT: mm TO-220F-3L(2) UNIT: mm Page 7 of 9

8 PACKAGE OUTLINE (continued) TO-220-3L UNIT: mm TO-251-3L UNIT: mm Page 8 of 9

9 Disclaimer: Silan reserves the right to make changes to the information herein for the improvement of the design and performance without further notice! Customers should obtain the latest relevant information before placing orders and should verify that such information is complete and current. All semiconductor products malfunction or fail with some probability under special conditions. When using Silan products in system design or complete machine manufacturing, it is the responsibility of the buyer to comply with the safety standards strictly and take essential measures to avoid situations in which a malfunction or failure of such Silan products could cause loss of body injury or damage to property. Silan will supply the best possible product for customers! ATTACHMENT Revision History Date REV Description Page Original Page 9 of 9

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