Switch mode power supplies Excellent reverse recovery. Power factor correction modules Low gate charge Motor drives Low intrinsic capacitance

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1 Description United Silicon Carbide's cascode products co-package its xj series highperformance SiC JFETs with a cascode optimized MOSFET to produce the only standard gate drive SiC device in the market today. This series exhibits ultra-low gate charge, but also the best reverse recovery characteristics of any device of similar ratings. These devices are excellent for switching inductive loads, and any application requiring standard gate drive. xj SiC Series 45mW - 65 SiC Cascode UJC655K 1 2 CASE 3 G (1) CASE D (2) S (3) Part Number Package Marking UJC655K TO-247-3L UJC655K Features Typical Applications Max. on-resistance R DS(on)max of 45mW E charging Standard 12 gate drive P inverters Maximum operating temperature of 15 C Switch mode power supplies Excellent reverse recovery Power factor correction modules Low gate charge Motor drives Low intrinsic capacitance Induction heating RoHS compliant Maximum Ratings Drain-source voltage Gate-source voltage Parameter Continuous drain current Max. lead temperature for soldering, 1/8 from case for 5 Seconds 1 Pulse width t p limited by T j,max 2 Starting T J = 25 C Symbol DS GS t SC E AS P tot Test Conditions DC T C = 25 C T C = 1 C T j = 25 C 113 Pulsed drain current 1 I DM T j = 15 C 78 Short-circuit withstand time 2 GS =15, DS <3 Single pulsed avalanche energy 2 L=15mH, I AS =2.5A Power dissipation T C = 25 C Maximum junction temperature Operating and storage temperature I D 23.5 T J,max 15 C T J, T STG -55 to 15 C 65-2 to T L 25 C A A A ms mj W Preliminary, May For more information go to

2 Electrical Characteristics (T J = +25 C unless otherwise specified) Typical Performance - Static xj SiC Series 45mW - 65 SiC Cascode UJC655K Parameter Symbol Test Conditions Min Typ Max Drain-source breakdown voltage B DS GS =, I D =1mA 65 Total drain leakage current Total gate leakage current Drain-source on-resistance Gate threshold voltage Gate resistance DS = 65, 25 5 GS =, T J = 25 C I DSS ma DS = 65, 65 GS =, T J = 15 C DS =, T j =25 C, I GSS 5 1 na GS = -2 / +2 R DS(on) GS =12, I D =25A, T J = 25 C GS =12, I D =25A, T J = 15 C G(th) DS = 5, I D = 1mA R G f = 1MHz, open drain 1.1 W 62 mw Typical Performance - Reverse Diode Min Typ Max Diode continuous forward current I S T C = 25 C 36.5 A Diode pulse current 1 I S,pulse T C = 25 C 113 A Forward voltage Parameter Symbol Test Conditions FSD GS =, I F =25A, T J = 25 C GS =, I F = 25A, T J =15 C Reverse recovery charge Reverse recovery time Reverse recovery charge Reverse recovery time Q rr R =4, I F =25A, GS =, 92 nc di/dt=116a/ms, t rr T J = 25 C 22 ns Q rr R =4, I F =25A, GS =, TBD nc di/dt=116a/ms, t rr T J = 15 C TBD ns Preliminary, May For more information go to

3 Typical Performance - Dynamic xj SiC Series 45mW - 65 SiC Cascode UJC655K Parameter symbol Test Conditions Min Typ Max Input capacitance C iss DS = 4, 217 Output capacitance C oss GS =, 8 Reverse transfer capacitance C rss f = 1kHz 5.7 Effective output capacitance, energy related DS = to 4, C oss(er) 1 pf GS = pf Effective output capacitance, time related C OSS stored energy Total gate charge Gate-drain charge Gate-source charge Turn-on delay time Rise time Turn-off delay time Fall time Turn-on energy Turn-off energy Total switching energy Turn-on delay time Rise time Turn-off delay time Fall time Turn-on energy Turn-off energy Total switching energy C oss(tr) DS = to 4, GS = 181 pf E oss DS = 4, GS = 8 mj Q G 47.5 Q DS =4, I D = 25A, GD 15 GS = to 12 Q GS 15 nc t d(on) 29 t r DS =4, I D =25A, Gate Driver = to +12, 1 t d(off) Turn-on R G,EXT = W, 7 ns t f Turn-off R G,EXT = 2W 15 E Inductive Load, ON 196 FWD: UJD652T E OFF T 11 J = 25 C mj E TOTAL 297 t d(on) 31 t DS =4, I D =25A, Gate r 14 Driver = to +12, t d(off) Turn-on R 78 G,EXT = W, ns t f Turn-off R G,EXT = 2W 17 E ON Inductive Load, 215 FWD: UJD652T E OFF T 124 J = 15 C mj E TOTAL 339 Thermal Characteristics Parameter symbol Test Conditions Min Typ Max Thermal resistance, junction-to-case R qjc C/W Preliminary, May For more information go to

4 On Resistance, R DS_ON (P.U.) Typical Performance Diagrams xj SiC Series 45mW - 65 SiC Cascode UJC655K gs = 9 gs = 7.5 gs= 7 gs = gs = 9 gs = 7.5 gs= 7 gs = Figure 1 Typical output characteristics at T j = - 55 C, tp < 25 m s Figure 2 Typical output characteristics at T j = 25 C, tp < 25 m s gs = 7.5 gs= 7 gs = 6.5 gs = Junction Temperature, T J ( C) Figure 3 Typical output characteristics at T j = 15 C, tp < 25 m s Figure 4 Normalized on-resistance vs. temperature at GS = 12 and I D = 25A Preliminary, May For more information go to

5 Threshold oltage, th () Gate-Source oltage, GS () On-Resistance, R DS(on) (mw) xj SiC Series 45mW - 65 SiC Cascode UJC655K Tj = 15 C Tj = 1 C Tj = 25 C Tj = -55 C Tj = -55 C Tj = 25 C Tj = 15 C Gate-Source oltage, GS () Figure 5 Typical drain-source on-resistance at GS = 12 Figure 6 Typical transfer characteristics at DS = Junction Temperature, T j ( C) Gate Charge, Q G (nc) Figure 7 Threshold voltage vs. Tj Figure 8 Typical gate charge at DS = 5 and I D = 1mA at DS = 4 and I D = 25A Preliminary, May For more information go to

6 E OSS (mj) xj SiC Series 45mW - 65 SiC Cascode UJC655K -1-2 gs = gs= gs = gs= Figure 9 3rd quadrant characteristics Figure 1 3rd quadrant characteristics at T J = - 55 C at T J = 25 C -1-2 gs = gs= Figure 11 3rd quadrant characteristics at T J = 15 C Figure 12 Typical stored energy in C OSS at GS = Preliminary, May For more information go to

7 Power Dissipation, P tot (W) Thermal Impedance, Z qjc ( C/W) Capacitance, C (pf) DC xj SiC Series 45mW - 65 SiC Cascode UJC655K 1 C iss C oss C rss Case Temperature, T C ( C) Figure 13 Typical capacitances at 1kHz and GS = Figure 14 DC drain current derating D =.5 D =.3 D =.1 D =.5 D =.2 D =.1 Single Pulse Case Temperature, T C ( C).1 1.E-6 1.E-5 1.E-4 1.E-3 1.E-2 1.E-1 1.E+ Pulse Time, t p (s) Figure 15 Total power dissipation Figure 16 Maximum transient thermal impedance Preliminary, May For more information go to

8 Turn-on Energy, Eon(mJ) Turn-Off Energy, Eoff (mj) Switching Energy (mj) xj SiC Series 45mW - 65 SiC Cascode UJC655K ms 1ms 1ms DC 1ms DD = 4 GS = /+12 R G_EXT_ON = W R G_EXT_OFF = 2W FWD: UJD652T Etot Eon Eoff Figure 17 Safe operation area Figure 18 Clamped inductive switching energy T c = 25 C, D =, Parameter t p vs. drain current at T J = 25 C DD = 4 I D = 25A GS = /+12 FWD: UJD652T T J = 25 C Total External R G, R G,EXT_ON (W) 1 5 DD = 4 I D = 25A GS = /+12 FWD: UJD652T T J = 25 C Total External R G, R G,EXT_OFF (W) Figure 19 Clamped inductive switching Figure 2 Clamped inductive switching turn-on energy vs. R G,EXT_ON turn-off energy vs. R G,EXT_OFF Preliminary, May For more information go to

9 xj SiC Series 45mW - 65 SiC Cascode UJC655K R G_ON D ON 1A, 4 SiC Cascode GS to +12 R G_OFF 2W SiC Cascode Internal Schematic Figure 21 Recommended gate drive and internal circuit schematic of SiC cascode Applications Information SiC cascodes are enhancement-mode power siwtches formed by a high-voltage SiC depletion-mode JFET and a low-voltage silicon MOSFET connected in series as shown in Figure 21. The silicon MOSFET serves as the control unit while the SiC JFET provides high voltage blocking in the off state. This combination of devices in a single package provides compatibility with standard gate drivers and offers superior performance in terms of low on-resistance (R DS(on) ), output capacitance (Coss), gate charge (Qg), and reverse recovery charge (Qrr) leading to low conduction and switching losses. The SiC cascodes also provide excellent reverse conduction capability eliminating the need for an external anti-parallel diode. Like other high performance power switches, proper PCB layout design to minimize circuit parasitics is strongly recommended due to the high dv/dt and di/dt rates. In particular, separate turn-on and turn-off gate resistors are recommended as shown in Figure 21. In addition, an external gate resistor is recommended when the cascode is working in the diode mode in order to achieve the optimum reverse recover performance. For more information on cascode operation, see Disclaimer United Silicon Carbide, Inc. reserves the right to change or modify any of the products and their inherent physical and technical specifications without prior notice. United Silicon Carbide, Inc. assumes no responsibility or liability for any errors or inaccuracies within. Information on all products and contained herein is intended for description only. No license, express or implied, to any intellectual property rights is granted within this document. United Silicon Carbide, Inc. assumes no liability whatsoever relating to the choice, selection or use of the United Silicon Carbide, Inc. products and services described herein. Preliminary, May For more information go to